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 styles of a via are available to pins. Since a via hole always punches all layer
 groups and applies the same ring style on any outside layer groups, blind or
 buried vias and individually defined layer pad stacks (e.g. with changing ring
-shape per layer) are not explicitly designable in pcb-rnd. 
+shape per layer) are not possible using the via object.
 <p>
 A thermal relief property is added to the copper rings of a via when it is
 connected to the surrounding polygon of any individual layer. Physical designs