Index: root_project.lht
===================================================================
--- root_project.lht (nonexistent)
+++ root_project.lht (revision 16845)
@@ -0,0 +1,12 @@
+ha:lht_tree_doc { ha:roots {
+
+ ha:geda-project-v1 {
+ type=ha
+ desc={Project file root. Except for "common", each software package should create a single subtree under the root; the subtree shall be named after the software package }
+ li:children {
+ sy:pcb-rnd-conf-v1 = {/lht_tree_doc/roots/pcb-rnd-conf-v1}
+ }
+ }
+
+}}
+
Index: tree.html
===================================================================
--- tree.html (revision 16844)
+++ tree.html (revision 16845)
@@ -116,6 +116,13 @@
adelta | angle | | delta angle
|
li:simplepoly.ID | | | round cap arc, simplified; contains a flat list of coords; each coord pair is an x;y corner of the outline of the polygon (odd indices are x coords, even indices are y coords)
+ha:geda-project-v1
+
+
+ type:name | value | ver | description
+ |
---|
ha:geda-project-v1 | | | Project file root. Except for "common", each software package should create a single subtree under the root; the subtree shall be named after the software package
+ | li:pcb-rnd-conf-v1 | | | complete pcb-rnd configuration tree ->
+ |
li:pcb-rnd-subcircuit-v*
Index: tree.txt
===================================================================
--- tree.txt (revision 16844)
+++ tree.txt (revision 16845)
@@ -112,6 +112,12 @@
adelta angle delta angle
li:simplepoly.ID round cap arc, simplified; contains a flat list of coords; each coord pair is an x;y corner of the outline of the polygon (odd indices are x coords, even indices are y coords)
+ha:geda-project-v1
+
+type:name value ver description
+ha:geda-project-v1 Project file root. Except for "common", each software package should create a single subtree under the root; the subtree shall be named after the software package
+ li:pcb-rnd-conf-v1 complete pcb-rnd configuration tree ->
+
li:pcb-rnd-subcircuit-v*
type:name value ver description
|