Index: examples/board.lht =================================================================== --- examples/board.lht (nonexistent) +++ examples/board.lht (revision 16864) @@ -0,0 +1,284 @@ +ha:pcb-rnd-board-v5 { + + ha:attributes { + {PCB::grid::unit}=mil + } + + li:styles { + ha:Signal { + diameter = 2.0mm + thickness = 10.0mil + hole = 31.5mil + clearance = 20.0mil + } + ha:Power { + diameter = 2.2mm + thickness = 20.0mil + hole = 1.0mm + clearance = 20.0mil + } + } + + ha:meta { + ha:size { + thermal_scale = 0.500000 + x = 500.0mil + y = 150.0mil + } + ha:grid { + spacing = 25.0mil + offs_x = 0.0 + offs_y = 0.0 + } + } + + ha:data { + li:padstack_prototypes { + } + + li:objects { + } + li:layers { + + ha:top-sig { + lid=0 + group=3 + ha:combining { } + visible=1 + + li:objects { + ha:line.8 { + x1=50.0mil; y1=75.0mil; x2=450.0mil; y2=75.0mil; thickness=10.0mil; clearance=40.0mil; + ha:flags { + clearline=1 + } + } + } + color = {#8b2323} + } + + ha:bottom-sig { + lid=1 + group=10 + ha:combining { } + visible=1 + + li:objects { + } + color = {#3a5fcd} + } + + ha:top-gnd { + lid=2 + group=3 + ha:combining { } + visible=1 + + li:objects { + } + color = {#104e8b} + } + + ha:bottom-gnd { + lid=3 + group=10 + ha:combining { } + visible=1 + + li:objects { + } + color = {#cd3700} + } + + ha:int-sig2 { + lid=4 + group=7 + ha:combining { } + visible=1 + + li:objects { + } + color = {#548b54} + } + + ha:int-sig1 { + lid=5 + group=5 + ha:combining { } + visible=1 + + li:objects { + } + color = {#8b7355} + } + + ha:outline { + lid=6 + group=9 + ha:combining { } + visible=1 + + li:objects { + } + color = {#00868b} + } + + ha:bottom-silk { + lid=7 + group=12 + ha:combining { auto=1; } + visible=1 + + li:objects { + } + color = {#cccccc} + } + + ha:top-silk { + lid=8 + group=1 + ha:combining { auto=1; } + visible=1 + + li:objects { + } + color = {#000000} + } + + ha:top-paste { + lid=9 + group=0 + ha:combining { auto=1; } + visible=0 + + li:objects { + } + color = {#3a5fcd} + } + + ha:top-mask { + lid=10 + group=2 + ha:combining { sub=1; auto=1; } + visible=0 + + li:objects { + } + color = {#104e8b} + } + + ha:bottom-mask { + lid=11 + group=11 + ha:combining { sub=1; auto=1; } + visible=0 + + li:objects { + } + color = {#cd3700} + } + + ha:bottom-paste { + lid=12 + group=13 + ha:combining { auto=1; } + visible=0 + + li:objects { + } + color = {#548b54} + } + } + } + + ha:layer_stack { + li:groups { + ha:0 { + name = top_paste + ha:type { top=1; paste=1; } + li:layers { 9; } + } + ha:1 { + name = top_silk + ha:type { silk=1; top=1; } + li:layers { 8; } + } + ha:2 { + name = top_mask + ha:type { top=1; mask=1; } + li:layers { 10; } + } + ha:3 { + name = top_copper + ha:type { copper=1; top=1; } + li:layers { 0; 2; } + } + ha:4 { + name = grp_4 + ha:type { substrate=1; intern=1; } + li:layers { } + } + ha:5 { + name = Intern + ha:type { copper=1; intern=1; } + li:layers { 5; } + } + ha:6 { + name = grp_6 + ha:type { substrate=1; intern=1; } + li:layers { } + } + ha:7 { + name = Intern + ha:type { copper=1; intern=1; } + li:layers { 4; } + } + ha:8 { + name = grp_8 + ha:type { substrate=1; intern=1; } + li:layers { } + } + ha:9 { + name = global_outline + ha:type { outline=1; } + li:layers { 6; } + } + ha:10 { + name = bottom_copper + ha:type { bottom=1; copper=1; } + li:layers { 1; 3; } + } + ha:11 { + name = bottom_mask + ha:type { bottom=1; mask=1; } + li:layers { 11; } + } + ha:12 { + name = bottom_silk + ha:type { silk=1; bottom=1; } + li:layers { 7; } + } + ha:13 { + name = bottom_paste + ha:type { bottom=1; paste=1; } + li:layers { 12; } + } + } + } + li:pcb-rnd-conf-v1 { + ha:overwrite { + ha:design { + line_thickness = 10.00 mil + via_thickness = 2.0000 mm + via_drilling_hole = 31.50 mil + poly_isle_area = 200000000.0 + clearance = 20.00 mil + } + ha:editor { + grids_idx = 4 + grid = 25.00 mil + grid_unit = mil + } + } + } +} Index: examples/conf.lht =================================================================== --- examples/conf.lht (nonexistent) +++ examples/conf.lht (revision 16864) @@ -0,0 +1,26 @@ +li:pcb-rnd-conf-v1 { + ha:overwrite { + ha:plugins { + ha:hid_gtk { + ha:window_geometry { + library_x = 1342 + library_y = 316 + library_width = 580 + library_height = 448 + } + } + } + ha:editor { + auto_place = { 1 } + save_in_tmp = { 0 } + } + ha:rc { + li:library_search_paths { + ?../pcblib + ?~/pcblib/ + $(rc.path.share)/pcblib + } + backup_interval = { 60 } + } + } +} Index: examples/subc.lht =================================================================== --- examples/subc.lht (nonexistent) +++ examples/subc.lht (revision 16864) @@ -0,0 +1,236 @@ +li:pcb-rnd-subcircuit-v4 { + ha:subc.4 { + ha:attributes { + value = 1206 + footprint = Standard SMT resistor, capacitor etc + } + ha:data { + li:padstack_prototypes { + ha:ps_proto_v4.0 { + htop = 0 + hdia = 0.0 + li:shape { + ha:ps_shape_v4 { + clearance = 0.0 + li:ps_poly { + 0.649986mm + -0.94996mm + -0.649986mm + -0.94996mm + -0.649986mm + 0.94996mm + 0.649986mm + 0.94996mm + } + ha:layer_mask { + copper = 1 + top = 1 + } + ha:combining { + } + } + ha:ps_shape_v4 { + clearance = 0.0 + li:ps_poly { + 0.726186mm + -1.02616mm + -0.726186mm + -1.02616mm + -0.726186mm + 1.02616mm + 0.726186mm + 1.02616mm + } + ha:layer_mask { + top = 1 + mask = 1 + } + ha:combining { + sub = 1 + auto = 1 + } + } + ha:ps_shape_v4 { + clearance = 0.0 + li:ps_poly { + 0.649986mm + -0.94996mm + -0.649986mm + -0.94996mm + -0.649986mm + 0.94996mm + 0.649986mm + 0.94996mm + } + ha:layer_mask { + top = 1 + paste = 1 + } + ha:combining { + auto = 1 + } + } + } + hbottom = 0 + hplated = 0 + } + } + li:objects { + ha:padstack_ref.6 { + smirror = 0 + ha:attributes { + term = 1 + name = 1 + } + proto = 0 + xmirror = 0 + x = -1.49987mm + rot = 0.000000 + y = 0.0 + li:thermal { + } + ha:flags { + clearline = 1 + } + clearance = 10.0mil + } + ha:padstack_ref.7 { + smirror = 0 + ha:attributes { + term = 2 + name = 2 + } + proto = 0 + xmirror = 0 + x = 1.49987mm + rot = 0.000000 + y = 0.0 + li:thermal { + } + ha:flags { + clearline = 1 + } + clearance = 10.0mil + } + } + li:layers { + ha:top-silk { + lid = 0 + ha:type { + silk = 1 + top = 1 + } + li:objects { + ha:line.8 { + clearance = 0.0 + y2 = -0.94996mm + thickness = 8.0mil + ha:attributes { + } + x1 = -23.62mil + x2 = 23.62mil + ha:flags { + } + y1 = -0.94996mm + } + ha:line.11 { + clearance = 0.0 + y2 = 0.94996mm + thickness = 8.0mil + ha:attributes { + } + x1 = -23.62mil + x2 = 23.62mil + ha:flags { + } + y1 = 0.94996mm + } + ha:text.5 { + scale = 100 + ha:attributes { + } + direction = 0 + x = -31.5mil + y = -31.5mil + string = %a.parent.refdes% + fid = 0 + ha:flags { + dyntext = 1 + floater = 1 + } + } + } + ha:combining { + } + } + ha:subc-aux { + lid = 1 + ha:type { + top = 1 + misc = 1 + virtual = 1 + } + li:objects { + ha:line.14 { + clearance = 0.0 + y2 = 0.0 + thickness = 0.1mm + ha:attributes { + subc-role = pnp-origin + } + x1 = 0.0 + x2 = 0.0 + ha:flags { + } + y1 = 0.0 + } + ha:line.17 { + clearance = 0.0 + y2 = 0.0 + thickness = 0.1mm + ha:attributes { + subc-role = origin + } + x1 = 0.0 + x2 = 0.0 + ha:flags { + } + y1 = 0.0 + } + ha:line.20 { + clearance = 0.0 + y2 = 0.0 + thickness = 0.1mm + ha:attributes { + subc-role = x + } + x1 = 0.0 + x2 = 1.0mm + ha:flags { + } + y1 = 0.0 + } + ha:line.23 { + clearance = 0.0 + y2 = 1.0mm + thickness = 0.1mm + ha:attributes { + subc-role = y + } + x1 = 0.0 + x2 = 0.0 + ha:flags { + } + y1 = 0.0 + } + } + ha:combining { + } + } + } + } + uid = kazsgcWF3uqvvuDCYMsAAAAB + ha:flags { + } + } +} Index: index.html =================================================================== --- index.html (revision 16863) +++ index.html (revision 16864) @@ -29,10 +29,12 @@ foo.lht ha:pcb-rnd-board-v* Printed circuit board, self-contained
(struct drawing) +
(sample file) bar.lht, bar.fp li:pcb-rnd-subcircuit-v* A subcircuit, self-contained, most often used as a footprint
(struct drawing) +
(sample file) times.lht li:pcb-rnd-font-v1 Vector font @@ -41,6 +43,7 @@ pcb-conf.lht li:pcb-rnd-conf-v1 A configuration subtree: system config (e.g. /usr/share/pcb-rnd/pcb-conf.lht) or user config (~/.pcb-rnd/pcb-conf.lht)
(struct drawing) +
(sample file) project.lht ha:geda-project-v1 A project file that describes configuration and source file names for various software