Index: trunk/src/draw.c =================================================================== --- trunk/src/draw.c (revision 19368) +++ trunk/src/draw.c (revision 19369) @@ -68,20 +68,21 @@ pcb_bool delayed_labels_enabled = pcb_false; pcb_bool delayed_terms_enabled = pcb_false; -static void DrawEverything(const pcb_box_t *); -static void DrawLayerGroup(int, const pcb_box_t *, int); +static void DrawEverything(pcb_draw_info_t *info); +static void DrawLayerGroup(pcb_draw_info_t *info, int, int); static void pcb_draw_obj_label(pcb_layergrp_id_t gid, pcb_any_obj_t *obj); -static void pcb_draw_pstk_marks(const pcb_box_t *drawn_area); -static void pcb_draw_pstk_labels(const pcb_box_t *drawn_area); -static void pcb_draw_pstk_holes(pcb_layergrp_id_t group, const pcb_box_t *drawn_area, pcb_pstk_draw_hole_t holetype); +static void pcb_draw_pstk_marks(pcb_draw_info_t *info); +static void pcb_draw_pstk_labels(pcb_draw_info_t *info); +static void pcb_draw_pstk_holes(pcb_draw_info_t *info, pcb_layergrp_id_t group, pcb_pstk_draw_hole_t holetype); +static void pcb_draw_ppv(pcb_draw_info_t *info, pcb_layergrp_id_t group); /* In draw_ly_spec.c: */ -static void pcb_draw_paste(int side, const pcb_box_t *drawn_area); -static void pcb_draw_mask(int side, const pcb_box_t *screen); -static void pcb_draw_silk(unsigned long lyt_side, const pcb_box_t *drawn_area); -static void pcb_draw_boundary_mech(const pcb_box_t *drawn_area); +static void pcb_draw_paste(pcb_draw_info_t *info, int side); +static void pcb_draw_mask(pcb_draw_info_t *info, int side); +static void pcb_draw_silk(pcb_draw_info_t *info, unsigned long lyt_side); +static void pcb_draw_boundary_mech(pcb_draw_info_t *info); static void pcb_draw_rats(const pcb_box_t *); -static void pcb_draw_assembly(unsigned int lyt_side, const pcb_box_t *drawn_area); +static void pcb_draw_assembly(pcb_draw_info_t *info, unsigned int lyt_side); void pcb_draw_delay_label_add(pcb_any_obj_t *obj) @@ -177,36 +178,36 @@ pcb_gui->invalidate_all(); } -static void DrawEverything_holes(pcb_layergrp_id_t gid, const pcb_box_t *drawn_area) +static void DrawEverything_holes(pcb_draw_info_t *info, pcb_layergrp_id_t gid) { int plated, unplated; - pcb_board_count_holes(PCB, &plated, &unplated, drawn_area); + pcb_board_count_holes(PCB, &plated, &unplated, info->drawn_area); if (plated && pcb_layer_gui_set_vlayer(PCB, PCB_VLY_PLATED_DRILL, 0)) { - pcb_draw_pstk_holes(gid, drawn_area, PCB_PHOLE_PLATED); + pcb_draw_pstk_holes(info, gid, PCB_PHOLE_PLATED); pcb_gui->end_layer(); } if (unplated && pcb_layer_gui_set_vlayer(PCB, PCB_VLY_UNPLATED_DRILL, 0)) { - pcb_draw_pstk_holes(gid, drawn_area, PCB_PHOLE_UNPLATED); + pcb_draw_pstk_holes(info, gid, PCB_PHOLE_UNPLATED); pcb_gui->end_layer(); } } -static void draw_virtual_layers(const pcb_box_t *drawn_area) +static void draw_virtual_layers(pcb_draw_info_t *info) { pcb_hid_expose_ctx_t hid_exp; - hid_exp.view = *drawn_area; + hid_exp.view = *info->drawn_area; hid_exp.force = 0; if (pcb_layer_gui_set_vlayer(PCB, PCB_VLY_TOP_ASSY, 0)) { - pcb_draw_assembly(PCB_LYT_TOP, drawn_area); + pcb_draw_assembly(info, PCB_LYT_TOP); pcb_gui->end_layer(); } if (pcb_layer_gui_set_vlayer(PCB, PCB_VLY_BOTTOM_ASSY, 0)) { - pcb_draw_assembly(PCB_LYT_BOTTOM, drawn_area); + pcb_draw_assembly(info, PCB_LYT_BOTTOM); pcb_gui->end_layer(); } @@ -221,7 +222,7 @@ } } -static void draw_ui_layers(const pcb_box_t *drawn_area) +static void draw_ui_layers(pcb_draw_info_t *info) { int i; pcb_layer_t *first, *ly; @@ -242,25 +243,25 @@ ly = pcb_uilayers.array[i]; if ((ly != NULL) && (ly->meta.real.vis)) { if (!have_canvas) { - pcb_gui->set_drawing_mode(PCB_HID_COMP_RESET, pcb_draw_out.direct, drawn_area); - pcb_gui->set_drawing_mode(PCB_HID_COMP_POSITIVE, pcb_draw_out.direct, drawn_area); + pcb_gui->set_drawing_mode(PCB_HID_COMP_RESET, pcb_draw_out.direct, info->drawn_area); + pcb_gui->set_drawing_mode(PCB_HID_COMP_POSITIVE, pcb_draw_out.direct, info->drawn_area); have_canvas = 1; } - pcb_draw_layer(ly, drawn_area, NULL); + pcb_draw_layer(info->pcb, ly, info->drawn_area, NULL); } } if (have_canvas) - pcb_gui->set_drawing_mode(PCB_HID_COMP_FLUSH, pcb_draw_out.direct, drawn_area); + pcb_gui->set_drawing_mode(PCB_HID_COMP_FLUSH, pcb_draw_out.direct, info->drawn_area); pcb_gui->end_layer(); } } /* Draw subc and padstack marks in xor mode */ -static void draw_xor_marks(const pcb_box_t *drawn_area) +static void draw_xor_marks(pcb_draw_info_t *info) { int per_side = conf_core.appearance.subc_layer_per_side; - pcb_gui->set_drawing_mode(PCB_HID_COMP_RESET, pcb_draw_out.direct, drawn_area); - pcb_gui->set_drawing_mode(PCB_HID_COMP_POSITIVE_XOR, pcb_draw_out.direct, drawn_area); + pcb_gui->set_drawing_mode(PCB_HID_COMP_RESET, pcb_draw_out.direct, info->drawn_area); + pcb_gui->set_drawing_mode(PCB_HID_COMP_POSITIVE_XOR, pcb_draw_out.direct, info->drawn_area); pcb_hid_set_line_cap(pcb_draw_out.fgGC, pcb_cap_round); pcb_hid_set_line_width(pcb_draw_out.fgGC, 0); @@ -267,15 +268,15 @@ pcb_hid_set_draw_xor(pcb_draw_out.fgGC, 1); if (PCB->SubcOn) - pcb_r_search(PCB->Data->subc_tree, drawn_area, NULL, draw_subc_mark_callback, &per_side, NULL); + pcb_r_search(PCB->Data->subc_tree, info->drawn_area, NULL, draw_subc_mark_callback, &per_side, NULL); if ((PCB->padstack_mark_on) && (conf_core.appearance.padstack.cross_thick > 0)) { pcb_hid_set_line_width(pcb_draw_out.fgGC, -conf_core.appearance.padstack.cross_thick); - pcb_draw_pstk_marks(drawn_area); + pcb_draw_pstk_marks(info); } pcb_hid_set_draw_xor(pcb_draw_out.fgGC, 0); - pcb_gui->set_drawing_mode(PCB_HID_COMP_FLUSH, pcb_draw_out.direct, drawn_area); + pcb_gui->set_drawing_mode(PCB_HID_COMP_FLUSH, pcb_draw_out.direct, info->drawn_area); } static void draw_rats(const pcb_box_t *drawn_area) @@ -289,30 +290,30 @@ } } -static void draw_pins_and_pads(const pcb_box_t *drawn_area, pcb_layergrp_id_t component, pcb_layergrp_id_t solder) +static void draw_pins_and_pads(pcb_draw_info_t *info, pcb_layergrp_id_t component, pcb_layergrp_id_t solder) { int per_side = conf_core.appearance.subc_layer_per_side; - pcb_gui->set_drawing_mode(PCB_HID_COMP_RESET, pcb_draw_out.direct, drawn_area); - pcb_gui->set_drawing_mode(PCB_HID_COMP_POSITIVE, pcb_draw_out.direct, drawn_area); + pcb_gui->set_drawing_mode(PCB_HID_COMP_RESET, pcb_draw_out.direct, info->drawn_area); + pcb_gui->set_drawing_mode(PCB_HID_COMP_POSITIVE, pcb_draw_out.direct, info->drawn_area); /* Draw pins' and pads' names */ - pcb_gui->set_drawing_mode(PCB_HID_COMP_RESET, pcb_draw_out.direct, drawn_area); - pcb_gui->set_drawing_mode(PCB_HID_COMP_POSITIVE, pcb_draw_out.direct, drawn_area); + pcb_gui->set_drawing_mode(PCB_HID_COMP_RESET, pcb_draw_out.direct, info->drawn_area); + pcb_gui->set_drawing_mode(PCB_HID_COMP_POSITIVE, pcb_draw_out.direct, info->drawn_area); pcb_hid_set_line_cap(pcb_draw_out.fgGC, pcb_cap_round); pcb_hid_set_line_width(pcb_draw_out.fgGC, 0); if (PCB->SubcOn) - pcb_r_search(PCB->Data->subc_tree, drawn_area, NULL, draw_subc_label_callback, &per_side, NULL); + pcb_r_search(PCB->Data->subc_tree, info->drawn_area, NULL, draw_subc_label_callback, &per_side, NULL); if (PCB->padstack_mark_on) { pcb_hid_set_line_width(pcb_draw_out.fgGC, -conf_core.appearance.padstack.cross_thick); - pcb_draw_pstk_labels(drawn_area); + pcb_draw_pstk_labels(info); } - pcb_draw_pstk_names(conf_core.editor.show_solder_side ? solder : component, drawn_area); - pcb_gui->set_drawing_mode(PCB_HID_COMP_FLUSH, pcb_draw_out.direct, drawn_area); + pcb_draw_pstk_names(conf_core.editor.show_solder_side ? solder : component, info->drawn_area); + pcb_gui->set_drawing_mode(PCB_HID_COMP_FLUSH, pcb_draw_out.direct, info->drawn_area); } -static void DrawEverything(const pcb_box_t *drawn_area) +static void DrawEverything(pcb_draw_info_t *info) { char *old_silk_color; int i, ngroups, slk_len; @@ -326,7 +327,7 @@ old_silk_color = PCB->Data->BACKSILKLAYER.meta.real.color; PCB->Data->BACKSILKLAYER.meta.real.color = conf_core.appearance.color.invisible_objects; - pcb_gui->render_burst(PCB_HID_BURST_START, drawn_area); + pcb_gui->render_burst(PCB_HID_BURST_START, info->drawn_area); memset(do_group, 0, sizeof(do_group)); for (ngroups = 0, i = 0; i < pcb_max_layer; i++) { @@ -353,11 +354,11 @@ * first draw all 'invisible' stuff */ if (!conf_core.editor.check_planes && pcb_layer_gui_set_vlayer(PCB, PCB_VLY_INVISIBLE, 0)) { - pcb_draw_silk(PCB_LYT_INVISIBLE_SIDE(), drawn_area); + pcb_draw_silk(info, PCB_LYT_INVISIBLE_SIDE()); - pcb_gui->set_drawing_mode(PCB_HID_COMP_RESET, pcb_draw_out.direct, drawn_area); - pcb_gui->set_drawing_mode(PCB_HID_COMP_POSITIVE, pcb_draw_out.direct, drawn_area); - pcb_gui->set_drawing_mode(PCB_HID_COMP_FLUSH, pcb_draw_out.direct, drawn_area); + pcb_gui->set_drawing_mode(PCB_HID_COMP_RESET, pcb_draw_out.direct, info->drawn_area); + pcb_gui->set_drawing_mode(PCB_HID_COMP_POSITIVE, pcb_draw_out.direct, info->drawn_area); + pcb_gui->set_drawing_mode(PCB_HID_COMP_FLUSH, pcb_draw_out.direct, info->drawn_area); pcb_gui->end_layer(); } @@ -381,7 +382,7 @@ is_current = 1; } - DrawLayerGroup(group, drawn_area, is_current); + DrawLayerGroup(info, group, is_current); pcb_gui->end_layer(); } } @@ -390,22 +391,22 @@ goto finish; /* Draw padstacks below silk */ - pcb_gui->set_drawing_mode(PCB_HID_COMP_RESET, pcb_draw_out.direct, drawn_area); - pcb_gui->set_drawing_mode(PCB_HID_COMP_POSITIVE, pcb_draw_out.direct, drawn_area); + pcb_gui->set_drawing_mode(PCB_HID_COMP_RESET, pcb_draw_out.direct, info->drawn_area); + pcb_gui->set_drawing_mode(PCB_HID_COMP_POSITIVE, pcb_draw_out.direct, info->drawn_area); if (pcb_gui->gui) - pcb_draw_ppv(conf_core.editor.show_solder_side ? solder : component, drawn_area); - pcb_gui->set_drawing_mode(PCB_HID_COMP_FLUSH, pcb_draw_out.direct, drawn_area); + pcb_draw_ppv(info, conf_core.editor.show_solder_side ? solder : component); + pcb_gui->set_drawing_mode(PCB_HID_COMP_FLUSH, pcb_draw_out.direct, info->drawn_area); /* Draw the solder mask if turned on */ gid = pcb_layergrp_get_top_mask(); if ((gid >= 0) && (pcb_layer_gui_set_glayer(PCB, gid, 0))) { - pcb_draw_mask(PCB_COMPONENT_SIDE, drawn_area); + pcb_draw_mask(info, PCB_COMPONENT_SIDE); pcb_gui->end_layer(); } gid = pcb_layergrp_get_bottom_mask(); if ((gid >= 0) && (pcb_layer_gui_set_glayer(PCB, gid, 0))) { - pcb_draw_mask(PCB_SOLDER_SIDE, drawn_area); + pcb_draw_mask(info, PCB_SOLDER_SIDE); pcb_gui->end_layer(); } @@ -414,16 +415,16 @@ for(i = 0; i < slk_len; i++) { if (pcb_layer_gui_set_glayer(PCB, slk[i], 0)) { unsigned int loc = pcb_layergrp_flags(PCB, slk[i]); - pcb_draw_silk(loc & PCB_LYT_ANYWHERE, drawn_area); + pcb_draw_silk(info, loc & PCB_LYT_ANYWHERE); pcb_gui->end_layer(); } } { /* holes_after: draw holes after copper, silk and mask, to make sure it punches through everything. */ - pcb_gui->set_drawing_mode(PCB_HID_COMP_RESET, pcb_draw_out.direct, drawn_area); - pcb_gui->set_drawing_mode(PCB_HID_COMP_POSITIVE, pcb_draw_out.direct, drawn_area); - DrawEverything_holes(side_copper_grp, drawn_area); - pcb_gui->set_drawing_mode(PCB_HID_COMP_FLUSH, pcb_draw_out.direct, drawn_area); + pcb_gui->set_drawing_mode(PCB_HID_COMP_RESET, pcb_draw_out.direct, info->drawn_area); + pcb_gui->set_drawing_mode(PCB_HID_COMP_POSITIVE, pcb_draw_out.direct, info->drawn_area); + DrawEverything_holes(info, side_copper_grp); + pcb_gui->set_drawing_mode(PCB_HID_COMP_FLUSH, pcb_draw_out.direct, info->drawn_area); } gid = pcb_layergrp_get_top_paste(); @@ -430,7 +431,7 @@ if (gid >= 0) paste_empty = pcb_layergrp_is_empty(PCB, gid); if ((gid >= 0) && (pcb_layer_gui_set_glayer(PCB, gid, paste_empty))) { - pcb_draw_paste(PCB_COMPONENT_SIDE, drawn_area); + pcb_draw_paste(info, PCB_COMPONENT_SIDE); pcb_gui->end_layer(); } @@ -438,28 +439,28 @@ if (gid >= 0) paste_empty = pcb_layergrp_is_empty(PCB, gid); if ((gid >= 0) && (pcb_layer_gui_set_glayer(PCB, gid, paste_empty))) { - pcb_draw_paste(PCB_SOLDER_SIDE, drawn_area); + pcb_draw_paste(info, PCB_SOLDER_SIDE); pcb_gui->end_layer(); } - pcb_draw_boundary_mech(drawn_area); + pcb_draw_boundary_mech(info); - draw_virtual_layers(drawn_area); + draw_virtual_layers(info); if (pcb_gui->gui) { - draw_rats(drawn_area); - draw_pins_and_pads(drawn_area, component, solder); + draw_rats(info->drawn_area); + draw_pins_and_pads(info, component, solder); } - draw_ui_layers(drawn_area); + draw_ui_layers(info); if (pcb_gui->gui) - draw_xor_marks(drawn_area); + draw_xor_marks(info); finish:; - pcb_gui->render_burst(PCB_HID_BURST_END, drawn_area); + pcb_gui->render_burst(PCB_HID_BURST_END, info->drawn_area); PCB->Data->BACKSILKLAYER.meta.real.color = old_silk_color; } -static void pcb_draw_pstks(pcb_layergrp_id_t group, const pcb_box_t *drawn_area, int is_current, pcb_layer_combining_t comb) +static void pcb_draw_pstks(pcb_draw_info_t *info, pcb_layergrp_id_t group, int is_current, pcb_layer_combining_t comb) { pcb_layergrp_t *g = PCB->LayerGroups.grp + group; pcb_pstk_draw_t ctx; @@ -471,24 +472,24 @@ ctx.layer1 = pcb_get_layer(PCB->Data, g->lid[0]); else ctx.layer1 = NULL; - pcb_r_search(PCB->Data->padstack_tree, drawn_area, NULL, pcb_pstk_draw_callback, &ctx, NULL); + pcb_r_search(PCB->Data->padstack_tree, info->drawn_area, NULL, pcb_pstk_draw_callback, &ctx, NULL); } -static void pcb_draw_pstk_marks(const pcb_box_t *drawn_area) +static void pcb_draw_pstk_marks(pcb_draw_info_t *info) { pcb_pstk_draw_t ctx; ctx.pcb = PCB; - pcb_r_search(PCB->Data->padstack_tree, drawn_area, NULL, pcb_pstk_draw_mark_callback, &ctx, NULL); + pcb_r_search(PCB->Data->padstack_tree, info->drawn_area, NULL, pcb_pstk_draw_mark_callback, &ctx, NULL); } -static void pcb_draw_pstk_labels(const pcb_box_t *drawn_area) +static void pcb_draw_pstk_labels(pcb_draw_info_t *info) { pcb_pstk_draw_t ctx; ctx.pcb = PCB; - pcb_r_search(PCB->Data->padstack_tree, drawn_area, NULL, pcb_pstk_draw_label_callback, &ctx, NULL); + pcb_r_search(PCB->Data->padstack_tree, info->drawn_area, NULL, pcb_pstk_draw_label_callback, &ctx, NULL); } -static void pcb_draw_pstk_holes(pcb_layergrp_id_t group, const pcb_box_t *drawn_area, pcb_pstk_draw_hole_t holetype) +static void pcb_draw_pstk_holes(pcb_draw_info_t *info, pcb_layergrp_id_t group, pcb_pstk_draw_hole_t holetype) { pcb_pstk_draw_t ctx; @@ -498,10 +499,10 @@ ctx.pcb = PCB; ctx.gid = group; ctx.holetype = holetype; - pcb_r_search(PCB->Data->padstack_tree, drawn_area, NULL, pcb_pstk_draw_hole_callback, &ctx, NULL); + pcb_r_search(PCB->Data->padstack_tree, info->drawn_area, NULL, pcb_pstk_draw_hole_callback, &ctx, NULL); } -static void pcb_draw_pstk_slots(pcb_layergrp_id_t group, const pcb_box_t *drawn_area, pcb_pstk_draw_hole_t holetype) +static void pcb_draw_pstk_slots(pcb_draw_info_t *info, pcb_layergrp_id_t group, pcb_pstk_draw_hole_t holetype) { pcb_pstk_draw_t ctx; @@ -511,7 +512,7 @@ ctx.pcb = PCB; ctx.gid = group; ctx.holetype = holetype; - pcb_r_search(PCB->Data->padstack_tree, drawn_area, NULL, pcb_pstk_draw_slot_callback, &ctx, NULL); + pcb_r_search(PCB->Data->padstack_tree, info->drawn_area, NULL, pcb_pstk_draw_slot_callback, &ctx, NULL); } /* --------------------------------------------------------------------------- @@ -518,11 +519,11 @@ * Draws padstacks - Always draws for non-gui HIDs, * otherwise drawing depends on PCB->pstk_on */ -void pcb_draw_ppv(pcb_layergrp_id_t group, const pcb_box_t * drawn_area) +static void pcb_draw_ppv(pcb_draw_info_t *info, pcb_layergrp_id_t group) { /* draw padstack holes - copper is drawn with each group */ if (PCB->pstk_on || !pcb_gui->gui) { - pcb_draw_pstk_holes(group, drawn_area, PCB_PHOLE_PLATED | PCB_PHOLE_UNPLATED | PCB_PHOLE_BB); + pcb_draw_pstk_holes(info, group, PCB_PHOLE_PLATED | PCB_PHOLE_UNPLATED | PCB_PHOLE_BB); } } @@ -548,9 +549,9 @@ pcb_any_obj_t *o = delayed_objs.array[n]; pcb_box_t *b = (pcb_box_t *)o; switch(o->type) { - case PCB_OBJ_ARC: pcb_arc_draw_term_callback(b, NULL); break; - case PCB_OBJ_LINE: pcb_line_draw_term_callback(b, NULL); break; - case PCB_OBJ_TEXT: pcb_text_draw_term_callback(b, NULL); break; + case PCB_OBJ_ARC: pcb_arc_draw_term_callback(b, info); break; + case PCB_OBJ_LINE: pcb_line_draw_term_callback(b, info); break; + case PCB_OBJ_TEXT: pcb_text_draw_term_callback(b, info); break; case PCB_OBJ_POLY: pcb_poly_draw_term_callback(b, info); break; default: assert(!"Don't know how to draw delayed object"); @@ -562,7 +563,7 @@ #include "draw_composite.c" #include "draw_ly_spec.c" -void pcb_draw_layer(pcb_layer_t *Layer, const pcb_box_t *screen, int *num_found) +void pcb_draw_layer(const pcb_board_t *pcb, const pcb_layer_t *Layer, const pcb_box_t *screen, int *num_found) { pcb_draw_info_t info; pcb_box_t scr2; @@ -578,6 +579,7 @@ scr2.Y2 = scr2.Y1+1; } + info.pcb = pcb; info.drawn_area = screen; info.layer = Layer; @@ -606,16 +608,16 @@ /* draw all visible layer objects (with terminal gfx on copper) */ if (lflg & PCB_LYT_COPPER) { delayed_terms_enabled = pcb_true; - pcb_r_search(Layer->line_tree, screen, NULL, pcb_line_draw_term_callback, NULL, num_found); - pcb_r_search(Layer->arc_tree, screen, NULL, pcb_arc_draw_term_callback, NULL, num_found); - pcb_r_search(Layer->text_tree, screen, NULL, pcb_text_draw_term_callback, NULL, num_found); + pcb_r_search(Layer->line_tree, screen, NULL, pcb_line_draw_term_callback, &info, num_found); + pcb_r_search(Layer->arc_tree, screen, NULL, pcb_arc_draw_term_callback, &info, num_found); + pcb_r_search(Layer->text_tree, screen, NULL, pcb_text_draw_term_callback, &info, num_found); delayed_terms_enabled = pcb_false; may_have_delayed = 1; } else { - pcb_r_search(Layer->line_tree, screen, NULL, pcb_line_draw_callback, NULL, num_found); - pcb_r_search(Layer->arc_tree, screen, NULL, pcb_arc_draw_callback, NULL, num_found); - pcb_r_search(Layer->text_tree, screen, NULL, pcb_text_draw_callback, NULL, num_found); + pcb_r_search(Layer->line_tree, screen, NULL, pcb_line_draw_callback, &info, num_found); + pcb_r_search(Layer->arc_tree, screen, NULL, pcb_arc_draw_callback, &info, num_found); + pcb_r_search(Layer->text_tree, screen, NULL, pcb_text_draw_callback, &info, num_found); } if (may_have_delayed) @@ -627,7 +629,7 @@ /* This version is about 1% slower and used rarely, thus it's all dupped from pcb_draw_layer() to keep the original speed there */ -void pcb_draw_layer_under(pcb_layer_t *Layer, const pcb_box_t *screen, pcb_data_t *data) +void pcb_draw_layer_under(const pcb_board_t *pcb, const pcb_layer_t *Layer, const pcb_box_t *screen, pcb_data_t *data) { pcb_draw_info_t info; pcb_box_t scr2; @@ -644,6 +646,7 @@ scr2.Y2 = scr2.Y1+1; } + info.pcb = pcb; info.drawn_area = screen; info.layer = Layer; @@ -675,29 +678,29 @@ if (Layer->line_tree != NULL) for(o = pcb_rtree_first(&it, Layer->line_tree, (pcb_rtree_box_t *)screen); o != NULL; o = pcb_rtree_next(&it)) if (pcb_obj_is_under(o, data)) - pcb_line_draw_term_callback((pcb_box_t *)o, NULL); + pcb_line_draw_term_callback((pcb_box_t *)o, &info); if (Layer->arc_tree != NULL) for(o = pcb_rtree_first(&it, Layer->arc_tree, (pcb_rtree_box_t *)screen); o != NULL; o = pcb_rtree_next(&it)) if (pcb_obj_is_under(o, data)) - pcb_arc_draw_term_callback((pcb_box_t *)o, NULL); + pcb_arc_draw_term_callback((pcb_box_t *)o, &info); if (Layer->text_tree != NULL) for(o = pcb_rtree_first(&it, Layer->text_tree, (pcb_rtree_box_t *)screen); o != NULL; o = pcb_rtree_next(&it)) if (pcb_obj_is_under(o, data)) - pcb_text_draw_term_callback((pcb_box_t *)o, NULL); + pcb_text_draw_term_callback((pcb_box_t *)o, &info); } else { if (Layer->line_tree != NULL) for(o = pcb_rtree_first(&it, Layer->line_tree, (pcb_rtree_box_t *)screen); o != NULL; o = pcb_rtree_next(&it)) if (pcb_obj_is_under(o, data)) - pcb_line_draw_callback((pcb_box_t *)o, NULL); + pcb_line_draw_callback((pcb_box_t *)o, &info); if (Layer->arc_tree != NULL) for(o = pcb_rtree_first(&it, Layer->arc_tree, (pcb_rtree_box_t *)screen); o != NULL; o = pcb_rtree_next(&it)) if (pcb_obj_is_under(o, data)) - pcb_arc_draw_callback((pcb_box_t *)o, NULL); + pcb_arc_draw_callback((pcb_box_t *)o, &info); if (Layer->text_tree != NULL) for(o = pcb_rtree_first(&it, Layer->text_tree, (pcb_rtree_box_t *)screen); o != NULL; o = pcb_rtree_next(&it)) if (pcb_obj_is_under(o, data)) - pcb_text_draw_callback((pcb_box_t *)o, NULL); + pcb_text_draw_callback((pcb_box_t *)o, &info); } out:; @@ -708,7 +711,7 @@ * draws one layer group. If the exporter is not a GUI, * also draws the padstacks in this layer group. */ -static void DrawLayerGroup(int group, const pcb_box_t *drawn_area, int is_current) +static void DrawLayerGroup(pcb_draw_info_t *info, int group, int is_current) { int i; pcb_layer_id_t layernum; @@ -718,24 +721,24 @@ pcb_layergrp_t *grp = pcb_get_layergrp(PCB, group); unsigned int gflg = grp->ltype; - pcb_gui->set_drawing_mode(PCB_HID_COMP_RESET, pcb_draw_out.direct, drawn_area); - pcb_gui->set_drawing_mode(PCB_HID_COMP_POSITIVE, pcb_draw_out.direct, drawn_area); + pcb_gui->set_drawing_mode(PCB_HID_COMP_RESET, pcb_draw_out.direct, info->drawn_area); + pcb_gui->set_drawing_mode(PCB_HID_COMP_POSITIVE, pcb_draw_out.direct, info->drawn_area); for (i = n_entries - 1; i >= 0; i--) { layernum = layers[i]; - Layer = PCB->Data->Layer + layernum; + Layer = info->pcb->Data->Layer + layernum; if (!(gflg & PCB_LYT_SILK) && Layer->meta.real.vis) - pcb_draw_layer(Layer, drawn_area, NULL); + pcb_draw_layer(info->pcb, Layer, info->drawn_area, NULL); } if ((gflg & PCB_LYT_COPPER) && (PCB->pstk_on)) - pcb_draw_pstks(group, drawn_area, (CURRENT->meta.real.grp == group), 0); + pcb_draw_pstks(info, group, (CURRENT->meta.real.grp == group), 0); /* this draws the holes - must be the last, so holes are drawn over everything else */ if (!pcb_gui->gui) - pcb_draw_ppv(group, drawn_area); + pcb_draw_ppv(info, group); - pcb_gui->set_drawing_mode(PCB_HID_COMP_FLUSH, pcb_draw_out.direct, drawn_area); + pcb_gui->set_drawing_mode(PCB_HID_COMP_FLUSH, pcb_draw_out.direct, info->drawn_area); } void pcb_erase_obj(int type, void *lptr, void *ptr) @@ -892,7 +895,11 @@ { if (!pcb_draw_inhibit) { pcb_hid_t *old_gui = expose_begin(hid); - DrawEverything(&ctx->view); + pcb_draw_info_t info; + info.pcb = PCB; + info.drawn_area = &ctx->view; + info.layer = NULL; + DrawEverything(&info); expose_end(old_gui); } } @@ -968,7 +975,7 @@ else if ((e->content.layer_id >= 0) && (e->content.layer_id < pcb_max_layer)) { pcb_gui->set_drawing_mode(PCB_HID_COMP_RESET, 1, &e->view); pcb_gui->set_drawing_mode(PCB_HID_COMP_POSITIVE, 1, &e->view); - pcb_draw_layer(&(PCB->Data->Layer[e->content.layer_id]), &e->view, NULL); + pcb_draw_layer(PCB, &(PCB->Data->Layer[e->content.layer_id]), &e->view, NULL); pcb_gui->set_drawing_mode(PCB_HID_COMP_FLUSH, 1, &e->view); } else Index: trunk/src/draw.h =================================================================== --- trunk/src/draw.h (revision 19368) +++ trunk/src/draw.h (revision 19369) @@ -89,12 +89,12 @@ void pcb_draw(void); void pcb_redraw(void); void pcb_draw_obj(pcb_any_obj_t *obj); -void pcb_draw_layer(pcb_layer_t *ly, const pcb_box_t *screen, int *num_found); +void pcb_draw_layer(const pcb_board_t *pcb, const pcb_layer_t *ly, const pcb_box_t *screen, int *num_found); /* Same as pcb_draw_layer(), but never draws an implicit outline and ignores objects that are not in the subtree of data - useful for drawing a subtree, e.g. a subc only */ -void pcb_draw_layer_under(pcb_layer_t *Layer, const pcb_box_t *screen, pcb_data_t *data); +void pcb_draw_layer_under(const pcb_board_t *pcb, const pcb_layer_t *Layer, const pcb_box_t *screen, pcb_data_t *data); /* Composite draw all layer groups matching lyt/purpi/purpose */ void pcb_draw_groups(pcb_board_t *pcb, pcb_layer_type_t lyt, int purpi, char *purpose, const pcb_box_t *screen, const char *default_color, pcb_layer_type_t pstk_lyt_match, int thin_draw, int invert); @@ -101,7 +101,6 @@ void pcb_erase_obj(int, void *, void *); -void pcb_draw_ppv(pcb_layergrp_id_t group, const pcb_box_t * drawn_area); void pcb_draw_pstk_names(pcb_layergrp_id_t group, const pcb_box_t *drawn_area); /*#define PCB_BBOX_DEBUG*/ @@ -118,8 +117,9 @@ /* Some low level draw callback depend on this in their void *cl */ typedef struct pcb_draw_info_s { + const pcb_board_t *pcb; const pcb_box_t *drawn_area; - pcb_layer_t *layer; + const pcb_layer_t *layer; } pcb_draw_info_t; /* Returns whether lay_id is part of a group that is composite-drawn */ Index: trunk/src/draw_composite.c =================================================================== --- trunk/src/draw_composite.c (revision 19368) +++ trunk/src/draw_composite.c (revision 19369) @@ -30,8 +30,7 @@ using positive and negative draw operations. Included from draw.c. */ typedef struct comp_ctx_s { - pcb_board_t *pcb; - const pcb_box_t *screen; + pcb_draw_info_t *info; pcb_layergrp_t *grp; pcb_layergrp_id_t gid; const char *color; @@ -43,26 +42,26 @@ static void comp_fill_board(comp_ctx_t *ctx) { pcb_gui->set_color(pcb_draw_out.fgGC, ctx->color); - if (ctx->screen == NULL) - pcb_gui->fill_rect(pcb_draw_out.fgGC, 0, 0, ctx->pcb->MaxWidth, ctx->pcb->MaxHeight); + if (ctx->info->drawn_area == NULL) + pcb_gui->fill_rect(pcb_draw_out.fgGC, 0, 0, ctx->info->pcb->MaxWidth, ctx->info->pcb->MaxHeight); else - pcb_gui->fill_rect(pcb_draw_out.fgGC, ctx->screen->X1, ctx->screen->Y1, ctx->screen->X2, ctx->screen->Y2); + pcb_gui->fill_rect(pcb_draw_out.fgGC, ctx->info->drawn_area->X1, ctx->info->drawn_area->Y1, ctx->info->drawn_area->X2, ctx->info->drawn_area->Y2); } static void comp_start_sub_(comp_ctx_t *ctx) { - pcb_gui->set_drawing_mode(PCB_HID_COMP_NEGATIVE, pcb_draw_out.direct, ctx->screen); + pcb_gui->set_drawing_mode(PCB_HID_COMP_NEGATIVE, pcb_draw_out.direct, ctx->info->drawn_area); } static void comp_start_add_(comp_ctx_t *ctx) { - pcb_gui->set_drawing_mode(PCB_HID_COMP_POSITIVE, pcb_draw_out.direct, ctx->screen); + pcb_gui->set_drawing_mode(PCB_HID_COMP_POSITIVE, pcb_draw_out.direct, ctx->info->drawn_area); } static void comp_start_sub(comp_ctx_t *ctx) { if (ctx->thin) { - pcb_gui->set_drawing_mode(PCB_HID_COMP_POSITIVE, pcb_draw_out.direct, ctx->screen); + pcb_gui->set_drawing_mode(PCB_HID_COMP_POSITIVE, pcb_draw_out.direct, ctx->info->drawn_area); pcb_gui->set_color(pcb_draw_out.pmGC, ctx->color); return; } @@ -76,7 +75,7 @@ static void comp_start_add(comp_ctx_t *ctx) { if (ctx->thin) { - pcb_gui->set_drawing_mode(PCB_HID_COMP_POSITIVE, pcb_draw_out.direct, ctx->screen); + pcb_gui->set_drawing_mode(PCB_HID_COMP_POSITIVE, pcb_draw_out.direct, ctx->info->drawn_area); return; } @@ -89,16 +88,16 @@ static void comp_finish(comp_ctx_t *ctx) { if (ctx->thin) { - pcb_gui->set_drawing_mode(PCB_HID_COMP_FLUSH, pcb_draw_out.direct, ctx->screen); + pcb_gui->set_drawing_mode(PCB_HID_COMP_FLUSH, pcb_draw_out.direct, ctx->info->drawn_area); return; } - pcb_gui->set_drawing_mode(PCB_HID_COMP_FLUSH, pcb_draw_out.direct, ctx->screen); + pcb_gui->set_drawing_mode(PCB_HID_COMP_FLUSH, pcb_draw_out.direct, ctx->info->drawn_area); } static void comp_init(comp_ctx_t *ctx, int negative) { - pcb_gui->set_drawing_mode(PCB_HID_COMP_RESET, pcb_draw_out.direct, ctx->screen); + pcb_gui->set_drawing_mode(PCB_HID_COMP_RESET, pcb_draw_out.direct, ctx->info->drawn_area); if (ctx->thin) return; @@ -108,7 +107,7 @@ if ((!ctx->thin) && (negative)) { /* drawing the big poly for the negative */ - pcb_gui->set_drawing_mode(PCB_HID_COMP_POSITIVE, pcb_draw_out.direct, ctx->screen); + pcb_gui->set_drawing_mode(PCB_HID_COMP_POSITIVE, pcb_draw_out.direct, ctx->info->drawn_area); comp_fill_board(ctx); } } @@ -139,7 +138,7 @@ pcb_draw_out.fgGC = pcb_draw_out.pmGC; if (l->comb & PCB_LYC_AUTO) draw_auto(ctx, auto_data); - pcb_draw_layer(l, ctx->screen, NULL); + pcb_draw_layer(ctx->info->pcb, l, ctx->info->drawn_area, NULL); pcb_draw_out.fgGC = old_fg; } } @@ -182,16 +181,20 @@ static void pcb_draw_groups_auto(comp_ctx_t *ctx, void *lym) { pcb_layer_type_t *pstk_lyt_match = (pcb_layer_type_t *)lym; - if ((ctx->pcb->pstk_on) && (*pstk_lyt_match != 0)) - pcb_draw_pstks(ctx->gid, ctx->screen, 0, *pstk_lyt_match); + if ((ctx->info->pcb->pstk_on) && (*pstk_lyt_match != 0)) + pcb_draw_pstks(ctx->info, ctx->gid, 0, *pstk_lyt_match); } void pcb_draw_groups(pcb_board_t *pcb, pcb_layer_type_t lyt, int purpi, char *purpose, const pcb_box_t *screen, const char *default_color, pcb_layer_type_t pstk_lyt_match, int thin_draw, int invert) { + pcb_draw_info_t info; pcb_layergrp_id_t gid; pcb_layergrp_t *g; comp_ctx_t cctx; + info.pcb = pcb; + info.drawn_area = screen; + for(gid = 0, g = pcb->LayerGroups.grp; gid < pcb->LayerGroups.len; gid++,g++) { pcb_layer_t *ly = NULL; @@ -206,9 +209,9 @@ if (g->len > 0) ly = pcb_get_layer(PCB->Data, g->lid[0]); - cctx.pcb = pcb; + info.layer = ly; cctx.grp = g; - cctx.screen = screen; + cctx.info = &info; cctx.gid = gid; cctx.color = ly != NULL ? ly->meta.real.color : default_color; cctx.thin = thin_draw; Index: trunk/src/draw_ly_spec.c =================================================================== --- trunk/src/draw_ly_spec.c (revision 19368) +++ trunk/src/draw_ly_spec.c (revision 19369) @@ -36,10 +36,10 @@ static void pcb_draw_paste_auto_(comp_ctx_t *ctx, void *side) { if (PCB->pstk_on) - pcb_draw_pstks(ctx->gid, ctx->screen, 0, PCB_LYC_AUTO); + pcb_draw_pstks(ctx->info, ctx->gid, 0, PCB_LYC_AUTO); } -static void pcb_draw_paste(int side, const pcb_box_t *drawn_area) +static void pcb_draw_paste(pcb_draw_info_t *info, int side) { unsigned long side_lyt = side ? PCB_LYT_TOP : PCB_LYT_BOTTOM; pcb_layergrp_id_t gid = -1; @@ -46,15 +46,14 @@ comp_ctx_t cctx; pcb_layer_t *ly = NULL; - pcb_layergrp_list(PCB, PCB_LYT_PASTE | side_lyt, &gid, 1); + pcb_layergrp_list(info->pcb, PCB_LYT_PASTE | side_lyt, &gid, 1); - cctx.grp = pcb_get_layergrp(PCB, gid); + cctx.grp = pcb_get_layergrp((pcb_board_t *)info->pcb, gid); if (cctx.grp->len > 0) - ly = pcb_get_layer(PCB->Data, cctx.grp->lid[0]); + ly = pcb_get_layer(info->pcb->Data, cctx.grp->lid[0]); - cctx.pcb = PCB; - cctx.screen = drawn_area; + cctx.info = info; cctx.gid = gid; cctx.color = ly != NULL ? ly->meta.real.color : conf_core.appearance.color.paste; cctx.thin = conf_core.editor.thin_draw || conf_core.editor.thin_draw_poly || conf_core.editor.wireframe_draw; @@ -61,9 +60,9 @@ cctx.invert = 0; if ((cctx.grp == NULL) || (cctx.grp->len == 0)) { /* fallback: no layers -> original code: draw a single auto-add */ - pcb_gui->set_drawing_mode(PCB_HID_COMP_RESET, pcb_draw_out.direct, cctx.screen); - pcb_gui->set_drawing_mode(PCB_HID_COMP_POSITIVE, pcb_draw_out.direct, cctx.screen); - pcb_gui->set_drawing_mode(PCB_HID_COMP_FLUSH, pcb_draw_out.direct, cctx.screen); + pcb_gui->set_drawing_mode(PCB_HID_COMP_RESET, pcb_draw_out.direct, info->drawn_area); + pcb_gui->set_drawing_mode(PCB_HID_COMP_POSITIVE, pcb_draw_out.direct, info->drawn_area); + pcb_gui->set_drawing_mode(PCB_HID_COMP_FLUSH, pcb_draw_out.direct, info->drawn_area); } else { comp_draw_layer(&cctx, pcb_draw_paste_auto_, &side); @@ -75,10 +74,10 @@ static void pcb_draw_mask_auto(comp_ctx_t *ctx, void *side) { if (PCB->pstk_on) - pcb_draw_pstks(ctx->gid, ctx->screen, 0, PCB_LYC_SUB | PCB_LYC_AUTO); + pcb_draw_pstks(ctx->info, ctx->gid, 0, PCB_LYC_SUB | PCB_LYC_AUTO); } -static void pcb_draw_mask(int side, const pcb_box_t *screen) +static void pcb_draw_mask(pcb_draw_info_t *info, int side) { unsigned long side_lyt = side ? PCB_LYT_TOP : PCB_LYT_BOTTOM; pcb_layergrp_id_t gid = -1; @@ -92,9 +91,7 @@ if (cctx.grp->len > 0) ly = pcb_get_layer(PCB->Data, cctx.grp->lid[0]); - cctx.pcb = PCB; - cctx.screen = screen; - + cctx.info = info; cctx.gid = gid; cctx.color = ly != NULL ? ly->meta.real.color : conf_core.appearance.color.mask; cctx.thin = conf_core.editor.thin_draw || conf_core.editor.thin_draw_poly || conf_core.editor.wireframe_draw; @@ -119,7 +116,7 @@ static void pcb_draw_silk_auto(comp_ctx_t *ctx, void *lyt_side) { if (PCB->pstk_on) - pcb_draw_pstks(ctx->gid, ctx->screen, 0, PCB_LYC_AUTO); + pcb_draw_pstks(ctx->info, ctx->gid, 0, PCB_LYC_AUTO); } static int pcb_is_silk_old_style(comp_ctx_t *cctx, pcb_layer_id_t lid) @@ -133,34 +130,33 @@ return 0; } -static void pcb_draw_silk(unsigned long lyt_side, const pcb_box_t *drawn_area) +static void pcb_draw_silk(pcb_draw_info_t *info, unsigned long lyt_side) { pcb_layer_id_t lid; pcb_layergrp_id_t gid = -1; comp_ctx_t cctx; - if (pcb_layer_list(PCB, PCB_LYT_SILK | lyt_side, &lid, 1) == 0) + if (pcb_layer_list(info->pcb, PCB_LYT_SILK | lyt_side, &lid, 1) == 0) return; - pcb_layergrp_list(PCB, PCB_LYT_SILK | lyt_side, &gid, 1); - if (!PCB->LayerGroups.grp[gid].vis) + pcb_layergrp_list(info->pcb, PCB_LYT_SILK | lyt_side, &gid, 1); + if (!info->pcb->LayerGroups.grp[gid].vis) return; - cctx.pcb = PCB; - cctx.screen = drawn_area; - cctx.grp = pcb_get_layergrp(PCB, gid); + cctx.info = info; + cctx.grp = pcb_get_layergrp((pcb_board_t *)info->pcb, gid); cctx.gid = gid; - cctx.color = PCB->Data->Layer[lid].meta.real.color; + cctx.color = info->pcb->Data->Layer[lid].meta.real.color; cctx.thin = conf_core.editor.thin_draw || conf_core.editor.thin_draw_poly || conf_core.editor.wireframe_draw; cctx.invert = 0; if (pcb_is_silk_old_style(&cctx, lid)) { /* fallback: implicit layer -> original code: draw auto+manual */ - pcb_gui->set_drawing_mode(PCB_HID_COMP_RESET, pcb_draw_out.direct, cctx.screen); - pcb_gui->set_drawing_mode(PCB_HID_COMP_POSITIVE, pcb_draw_out.direct, cctx.screen); - pcb_draw_layer(LAYER_PTR(lid), cctx.screen, NULL); + pcb_gui->set_drawing_mode(PCB_HID_COMP_RESET, pcb_draw_out.direct, info->drawn_area); + pcb_gui->set_drawing_mode(PCB_HID_COMP_POSITIVE, pcb_draw_out.direct, info->drawn_area); + pcb_draw_layer(info->pcb, LAYER_PTR(lid), info->drawn_area, NULL); pcb_draw_silk_auto(&cctx, &lyt_side); - pcb_gui->set_drawing_mode(PCB_HID_COMP_FLUSH, pcb_draw_out.direct, cctx.screen); + pcb_gui->set_drawing_mode(PCB_HID_COMP_FLUSH, pcb_draw_out.direct, info->drawn_area); } else { comp_draw_layer(&cctx, pcb_draw_silk_auto, &lyt_side); @@ -168,7 +164,7 @@ } } -static void remember_slot(pcb_layer_t **uslot, pcb_layer_t **pslot, int *uscore, int *pscore, pcb_layergrp_t *g, pcb_layer_t *ly) +static void remember_slot(pcb_layer_t **uslot, pcb_layer_t **pslot, int *uscore, int *pscore, const pcb_layergrp_t *g, pcb_layer_t *ly) { int score; pcb_layer_t **dslot; @@ -197,7 +193,7 @@ } } -static void pcb_draw_boundary_mech(const pcb_box_t *drawn_area) +static void pcb_draw_boundary_mech(pcb_draw_info_t *info) { int count = 0; pcb_layergrp_id_t gid, goutid; @@ -207,16 +203,15 @@ int plated, unplated; comp_ctx_t cctx; - cctx.pcb = PCB; - cctx.screen = drawn_area; + cctx.info = info; cctx.thin = conf_core.editor.thin_draw || conf_core.editor.thin_draw_poly || conf_core.editor.wireframe_draw; cctx.invert = 0; - for(gid = 0, g = PCB->LayerGroups.grp; gid < PCB->LayerGroups.len; gid++,g++) { + for(gid = 0, g = info->pcb->LayerGroups.grp; gid < info->pcb->LayerGroups.len; gid++,g++) { int n, numobj; - if ((g->ltype & PCB_LYT_BOUNDARY) && (g->purpi = F_uroute)) { + if ((g->ltype & PCB_LYT_BOUNDARY) && (g->purpi == F_uroute)) { goutl = g; goutid = gid; } @@ -248,14 +243,14 @@ cctx.grp = g; /* boundary does NOT support compisiting, everything is drawn in positive */ - pcb_gui->set_drawing_mode(PCB_HID_COMP_RESET, pcb_draw_out.direct, cctx.screen); - pcb_gui->set_drawing_mode(PCB_HID_COMP_POSITIVE, pcb_draw_out.direct, cctx.screen); + pcb_gui->set_drawing_mode(PCB_HID_COMP_RESET, pcb_draw_out.direct, info->drawn_area); + pcb_gui->set_drawing_mode(PCB_HID_COMP_POSITIVE, pcb_draw_out.direct, info->drawn_area); for(n = 0; n < g->len; n++) { pcb_layer_t *ly = LAYER_PTR(g->lid[n]); cctx.color = ly->meta.real.color; - pcb_draw_layer(ly, cctx.screen, NULL); + pcb_draw_layer(info->pcb, ly, info->drawn_area, NULL); } - pcb_gui->set_drawing_mode(PCB_HID_COMP_FLUSH, pcb_draw_out.direct, cctx.screen); + pcb_gui->set_drawing_mode(PCB_HID_COMP_FLUSH, pcb_draw_out.direct, info->drawn_area); } } @@ -264,8 +259,8 @@ We should check for pcb_gui->gui here, but it's kinda cool seeing the auto-outline magically disappear when you first add something to the outline layer. */ - pcb_gui->set_drawing_mode(PCB_HID_COMP_RESET, pcb_draw_out.direct, cctx.screen); - pcb_gui->set_drawing_mode(PCB_HID_COMP_POSITIVE, pcb_draw_out.direct, cctx.screen); + pcb_gui->set_drawing_mode(PCB_HID_COMP_RESET, pcb_draw_out.direct, info->drawn_area); + pcb_gui->set_drawing_mode(PCB_HID_COMP_POSITIVE, pcb_draw_out.direct, info->drawn_area); pcb_gui->set_color(pcb_draw_out.fgGC, PCB->Data->Layer[goutl->lid[0]].meta.real.color); pcb_hid_set_line_cap(pcb_draw_out.fgGC, pcb_cap_round); @@ -272,7 +267,7 @@ pcb_hid_set_line_width(pcb_draw_out.fgGC, conf_core.design.min_wid); pcb_gui->draw_rect(pcb_draw_out.fgGC, 0, 0, PCB->MaxWidth, PCB->MaxHeight); - pcb_gui->set_drawing_mode(PCB_HID_COMP_FLUSH, pcb_draw_out.direct, cctx.screen); + pcb_gui->set_drawing_mode(PCB_HID_COMP_FLUSH, pcb_draw_out.direct, info->drawn_area); } /* draw slots */ @@ -279,22 +274,22 @@ if (((uslot == NULL) || (!uslot->meta.real.vis)) && ((pslot == NULL) || (!pslot->meta.real.vis))) return; - pcb_board_count_slots(PCB, &plated, &unplated, drawn_area); + pcb_board_count_slots(PCB, &plated, &unplated, info->drawn_area); if ((uslot != NULL) && (uslot->meta.real.vis)) { if (pcb_layer_gui_set_glayer(PCB, uslot->meta.real.grp, unplated > 0)) { - pcb_gui->set_drawing_mode(PCB_HID_COMP_RESET, pcb_draw_out.direct, cctx.screen); - pcb_gui->set_drawing_mode(PCB_HID_COMP_POSITIVE, pcb_draw_out.direct, cctx.screen); - pcb_draw_pstk_slots(CURRENT->meta.real.grp, drawn_area, PCB_PHOLE_UNPLATED | PCB_PHOLE_BB); - pcb_gui->set_drawing_mode(PCB_HID_COMP_FLUSH, pcb_draw_out.direct, cctx.screen); + pcb_gui->set_drawing_mode(PCB_HID_COMP_RESET, pcb_draw_out.direct, info->drawn_area); + pcb_gui->set_drawing_mode(PCB_HID_COMP_POSITIVE, pcb_draw_out.direct, info->drawn_area); + pcb_draw_pstk_slots(info, CURRENT->meta.real.grp, PCB_PHOLE_UNPLATED | PCB_PHOLE_BB); + pcb_gui->set_drawing_mode(PCB_HID_COMP_FLUSH, pcb_draw_out.direct, info->drawn_area); } } if ((pslot != NULL) && (pslot->meta.real.vis)) { if (pcb_layer_gui_set_glayer(PCB, pslot->meta.real.grp, plated > 0)) { - pcb_gui->set_drawing_mode(PCB_HID_COMP_RESET, pcb_draw_out.direct, cctx.screen); - pcb_gui->set_drawing_mode(PCB_HID_COMP_POSITIVE, pcb_draw_out.direct, cctx.screen); - pcb_draw_pstk_slots(CURRENT->meta.real.grp, drawn_area, PCB_PHOLE_PLATED | PCB_PHOLE_BB); - pcb_gui->set_drawing_mode(PCB_HID_COMP_FLUSH, pcb_draw_out.direct, cctx.screen); + pcb_gui->set_drawing_mode(PCB_HID_COMP_RESET, pcb_draw_out.direct, info->drawn_area); + pcb_gui->set_drawing_mode(PCB_HID_COMP_POSITIVE, pcb_draw_out.direct, info->drawn_area); + pcb_draw_pstk_slots(info, CURRENT->meta.real.grp, PCB_PHOLE_PLATED | PCB_PHOLE_BB); + pcb_gui->set_drawing_mode(PCB_HID_COMP_FLUSH, pcb_draw_out.direct, info->drawn_area); } } } @@ -310,7 +305,7 @@ pcb_gui->set_drawing_mode(PCB_HID_COMP_FLUSH, pcb_draw_out.direct, drawn_area); } -static void pcb_draw_assembly(unsigned int lyt_side, const pcb_box_t *drawn_area) +static void pcb_draw_assembly(pcb_draw_info_t *info, unsigned int lyt_side) { pcb_layergrp_id_t side_group; @@ -319,10 +314,10 @@ pcb_draw_doing_assy = pcb_true; pcb_hid_set_draw_faded(pcb_draw_out.fgGC, 1); - DrawLayerGroup(side_group, drawn_area, 0); + DrawLayerGroup(info, side_group, 0); pcb_hid_set_draw_faded(pcb_draw_out.fgGC, 0); /* draw package */ - pcb_draw_silk(lyt_side, drawn_area); + pcb_draw_silk(info, lyt_side); pcb_draw_doing_assy = pcb_false; } Index: trunk/src/layer_ui.c =================================================================== --- trunk/src/layer_ui.c (revision 19368) +++ trunk/src/layer_ui.c (revision 19369) @@ -115,7 +115,7 @@ return (pcb_layer_t *)(*p); } -long pcb_uilayer_get_id(pcb_layer_t *ly) +long pcb_uilayer_get_id(const pcb_layer_t *ly) { int n; for(n = 0; n < vtp0_len(&pcb_uilayers); n++) Index: trunk/src/layer_ui.h =================================================================== --- trunk/src/layer_ui.h (revision 19368) +++ trunk/src/layer_ui.h (revision 19369) @@ -45,6 +45,6 @@ void pcb_uilayer_uninit(void); pcb_layer_t *pcb_uilayer_get(long ui_ly_id); -long pcb_uilayer_get_id(pcb_layer_t *ly); +long pcb_uilayer_get_id(const pcb_layer_t *ly); #endif Index: trunk/src/obj_subc.c =================================================================== --- trunk/src/obj_subc.c (revision 19368) +++ trunk/src/obj_subc.c (revision 19369) @@ -1674,7 +1674,7 @@ for(n = 0; n < sc->data->LayerN; n++) { pcb_layer_t *layer = &sc->data->Layer[n]; if (layer->meta.bound.type & PCB_LYT_COPPER) - pcb_draw_layer_under(layer, drawn_area, sc->data); + pcb_draw_layer_under(PCB, layer, drawn_area, sc->data); } /* draw padstacks */ @@ -1697,7 +1697,7 @@ for(n = 0; n < sc->data->LayerN; n++) { pcb_layer_t *layer = &sc->data->Layer[n]; if (layer->meta.bound.type & (PCB_LYT_SILK | PCB_LYT_BOUNDARY | PCB_LYT_MECH | PCB_LYT_DOC)) - pcb_draw_layer_under(layer, drawn_area, sc->data); + pcb_draw_layer_under(PCB, layer, drawn_area, sc->data); } /* padstack mark goes on top */ Index: trunk/src_plugins/lib_gtk_common/dlg_propedit.c =================================================================== --- trunk/src_plugins/lib_gtk_common/dlg_propedit.c (revision 19368) +++ trunk/src_plugins/lib_gtk_common/dlg_propedit.c (revision 19369) @@ -382,10 +382,11 @@ static void prop_preview_draw(pcb_hid_gc_t gc, const pcb_hid_expose_ctx_t *e) { pcb_board_t *old_pcb; +#warning TODO: do not reimplement draw.c code here: old_pcb = PCB; PCB = &preview_pcb; - pcb_draw_layer(&(PCB->Data->Layer[0]), &e->view, NULL); - pcb_draw_ppv(0, &e->view); +/* pcb_draw_layer(&(PCB->Data->Layer[0]), &e->view, NULL); + pcb_draw_ppv(0, &e->view);*/ PCB = old_pcb; }