Index: trunk/src/draw.c
===================================================================
--- trunk/src/draw.c	(revision 19481)
+++ trunk/src/draw.c	(revision 19482)
@@ -79,7 +79,7 @@
 /* In draw_ly_spec.c: */
 static void pcb_draw_paste(pcb_draw_info_t *info, int side);
 static void pcb_draw_mask(pcb_draw_info_t *info, int side);
-static void pcb_draw_silk(pcb_draw_info_t *info, unsigned long lyt_side);
+static void pcb_draw_silk_doc(pcb_draw_info_t *info, unsigned long lyt_side, unsigned long lyt_type, int setgrp, int invis);
 static void pcb_draw_boundary_mech(pcb_draw_info_t *info);
 static void pcb_draw_rats(const pcb_box_t *);
 static void pcb_draw_assembly(pcb_draw_info_t *info, unsigned int lyt_side);
@@ -322,8 +322,8 @@
 static void draw_everything(pcb_draw_info_t *info)
 {
 	char *old_silk_color;
-	int i, ngroups, slk_len;
-	pcb_layergrp_id_t component, solder, slk[16], gid, side_copper_grp;
+	int i, ngroups;
+	pcb_layergrp_id_t component, solder, gid, side_copper_grp;
 	/* This is the list of layer groups we will draw.  */
 	char do_group[PCB_MAX_LAYERGRP];
 	/* This is the reverse of the order in which we draw them.  */
@@ -341,7 +341,7 @@
 		pcb_layergrp_id_t group = pcb_layer_get_group(PCB, pcb_layer_stack[i]);
 		unsigned int gflg = pcb_layergrp_flags(PCB, group);
 
-		if ((gflg & PCB_LYT_SILK) || (gflg & PCB_LYT_MASK) || (gflg & PCB_LYT_PASTE) || (gflg & PCB_LYT_BOUNDARY) || (gflg & PCB_LYT_MECH)) /* do not draw silk, mask, paste and boundary here, they'll be drawn separately */
+		if ((gflg & PCB_LYT_SILK) || (gflg & PCB_LYT_DOC) || (gflg & PCB_LYT_MASK) || (gflg & PCB_LYT_PASTE) || (gflg & PCB_LYT_BOUNDARY) || (gflg & PCB_LYT_MECH)) /* do not draw silk, mask, paste and boundary here, they'll be drawn separately */
 			continue;
 
 		if (l->meta.real.vis && !do_group[group]) {
@@ -360,12 +360,13 @@
 	 * first draw all 'invisible' stuff
 	 */
 	if (!conf_core.editor.check_planes && pcb_layer_gui_set_vlayer(PCB, PCB_VLY_INVISIBLE, 0, &info->xform_caller)) {
-		pcb_draw_silk(info, PCB_LYT_INVISIBLE_SIDE());
+		pcb_layer_type_t side = PCB_LYT_INVISIBLE_SIDE();
+		pcb_draw_silk_doc(info, side, PCB_LYT_DOC, 0, 1);
+		pcb_draw_silk_doc(info, side, PCB_LYT_SILK, 0, 1);
 
 		pcb_gui->set_drawing_mode(PCB_HID_COMP_RESET, pcb_draw_out.direct, info->drawn_area);
 		pcb_gui->set_drawing_mode(PCB_HID_COMP_POSITIVE, pcb_draw_out.direct, info->drawn_area);
 		pcb_gui->set_drawing_mode(PCB_HID_COMP_FLUSH, pcb_draw_out.direct, info->drawn_area);
-
 		pcb_gui->end_layer();
 	}
 
@@ -416,14 +417,14 @@
 		pcb_gui->end_layer();
 	}
 
-	/* Draw silks */
-	slk_len = pcb_layergrp_list(PCB, PCB_LYT_SILK, slk, sizeof(slk) / sizeof(slk[0]));
-	for(i = 0; i < slk_len; i++) {
-		if (pcb_layer_gui_set_glayer(PCB, slk[i], 0, &info->xform_caller)) {
-			unsigned int loc = pcb_layergrp_flags(PCB, slk[i]);
-			pcb_draw_silk(info, loc & PCB_LYT_ANYWHERE);
-			pcb_gui->end_layer();
-		}
+	/* Draw doc and silks */
+	{
+		pcb_layer_type_t side = PCB_LYT_VISIBLE_SIDE();
+
+		pcb_draw_silk_doc(info, PCB_LYT_INTERN, PCB_LYT_SILK, 1, 0);
+		pcb_draw_silk_doc(info, PCB_LYT_INTERN, PCB_LYT_DOC, 1, 0);
+		pcb_draw_silk_doc(info, side, PCB_LYT_SILK, 1, 0);
+		pcb_draw_silk_doc(info, side, PCB_LYT_DOC, 1, 0);
 	}
 
 	{ /* holes_after: draw holes after copper, silk and mask, to make sure it punches through everything. */
Index: trunk/src/draw_composite.c
===================================================================
--- trunk/src/draw_composite.c	(revision 19481)
+++ trunk/src/draw_composite.c	(revision 19482)
@@ -136,7 +136,7 @@
 		{
 			pcb_hid_gc_t old_fg = pcb_draw_out.fgGC;
 			pcb_draw_out.fgGC = pcb_draw_out.pmGC;
-			if (l->comb & PCB_LYC_AUTO)
+			if ((l->comb & PCB_LYC_AUTO) && (draw_auto != NULL))
 				draw_auto(ctx, auto_data);
 			pcb_draw_layer(ctx->info, l);
 			pcb_draw_out.fgGC = old_fg;
Index: trunk/src/draw_ly_spec.c
===================================================================
--- trunk/src/draw_ly_spec.c	(revision 19481)
+++ trunk/src/draw_ly_spec.c	(revision 19482)
@@ -130,27 +130,37 @@
 	return 0;
 }
 
-static void pcb_draw_silk(pcb_draw_info_t *info, unsigned long lyt_side)
+static void pcb_draw_silk_doc(pcb_draw_info_t *info, unsigned long lyt_side, unsigned long lyt_type, int setgrp, int invis)
 {
 	pcb_layer_id_t lid;
-	pcb_layergrp_id_t gid = -1;
+	pcb_layergrp_id_t gid[PCB_MAX_LAYERGRP];
 	comp_ctx_t cctx;
+	int len, n;
 
-	if (pcb_layer_list(info->pcb, PCB_LYT_SILK | lyt_side, &lid, 1) == 0)
+	len = pcb_layergrp_list(info->pcb, lyt_type | lyt_side, gid, PCB_MAX_LAYERGRP);
+	if (len < 1)
 		return;
 
-	pcb_layergrp_list(info->pcb, PCB_LYT_SILK | lyt_side, &gid, 1);
-	if (!info->pcb->LayerGroups.grp[gid].vis)
-		return;
+	for(n = 0; n < len; n++) {
 
+	if (!info->pcb->LayerGroups.grp[gid[n]].vis)
+		continue;
+
+	if (setgrp)
+		if (!pcb_layer_gui_set_glayer(info->pcb, gid[n], 0, &info->xform_caller))
+			continue;
+
 	cctx.info = info;
-	cctx.grp = pcb_get_layergrp((pcb_board_t *)info->pcb, gid);
-	cctx.gid = gid;
-	cctx.color = info->pcb->Data->Layer[lid].meta.real.color;
+	cctx.gid = gid[n];
+	cctx.grp = pcb_get_layergrp((pcb_board_t *)info->pcb, gid[n]);
+	if (cctx.grp->len == 0)
+		continue;
+	lid = cctx.grp->lid[0];
+	cctx.color = invis ? conf_core.appearance.color.invisible_objects : info->pcb->Data->Layer[lid].meta.real.color;
 	cctx.thin = conf_core.editor.thin_draw || conf_core.editor.thin_draw_poly || conf_core.editor.wireframe_draw;
 	cctx.invert = 0;
 
-	if (pcb_is_silk_old_style(&cctx, lid)) {
+	if ((lyt_type & PCB_LYT_SILK) && (pcb_is_silk_old_style(&cctx, lid))) {
 		/* fallback: implicit layer -> original code: draw auto+manual */
 		pcb_gui->set_drawing_mode(PCB_HID_COMP_RESET, pcb_draw_out.direct, info->drawn_area);
 		pcb_gui->set_drawing_mode(PCB_HID_COMP_POSITIVE, pcb_draw_out.direct, info->drawn_area);
@@ -162,6 +172,10 @@
 		comp_draw_layer(&cctx, pcb_draw_silk_auto, &lyt_side);
 		comp_finish(&cctx);
 	}
+	if (setgrp)
+		pcb_gui->end_layer();
+
+	}
 }
 
 static void remember_slot(pcb_layer_t **uslot, pcb_layer_t **pslot, int *uscore, int *pscore, const pcb_layergrp_t *g, pcb_layer_t *ly)
@@ -308,6 +322,6 @@
 	pcb_hid_set_draw_faded(pcb_draw_out.fgGC, 0);
 
 	/* draw package */
-	pcb_draw_silk(info, lyt_side);
+	pcb_draw_silk_doc(info, lyt_side, PCB_LYT_SILK, 0, 0);
 	pcb_draw_doing_assy = pcb_false;
 }