Index: trunk/src/plug_io.c =================================================================== --- trunk/src/plug_io.c (revision 21336) +++ trunk/src/plug_io.c (revision 21337) @@ -1078,16 +1078,16 @@ } } -pcb_cardinal_t pcb_io_incompat_save(pcb_data_t *data, pcb_any_obj_t *obj, const char *desc, const char *hint) +pcb_cardinal_t pcb_io_incompat_save(pcb_data_t *data, pcb_any_obj_t *obj, const char *type, const char *title, const char *description) { - pcb_message(PCB_MSG_ERROR, "save error: %s\n", desc); + pcb_message(PCB_MSG_ERROR, "save error: %s\n", title); if (obj != NULL) { pcb_coord_t x = (obj->BoundingBox.X1 + obj->BoundingBox.X2)/2; pcb_coord_t y = (obj->BoundingBox.Y1 + obj->BoundingBox.Y2)/2; pcb_message(PCB_MSG_ERROR, " near %$mm %$mm\n", x, y); } - if (hint != NULL) - pcb_message(PCB_MSG_ERROR, " (%s)\n", hint); + if (description != NULL) + pcb_message(PCB_MSG_ERROR, " (%s)\n", description); return 0; } Index: trunk/src/plug_io.h =================================================================== --- trunk/src/plug_io.h (revision 21336) +++ trunk/src/plug_io.h (revision 21337) @@ -187,7 +187,7 @@ used for navigating the user to the problem). Desc should be a short description (must not be NULL), details should go in hint (can be NULL). Returns a report ID. */ -pcb_cardinal_t pcb_io_incompat_save(pcb_data_t *data, pcb_any_obj_t *obj, const char *desc, const char *hint); +pcb_cardinal_t pcb_io_incompat_save(pcb_data_t *data, pcb_any_obj_t *obj, const char *type, const char *title, const char *description); void pcb_io_uninit(void); Index: trunk/src_plugins/export_fidocadj/fidocadj.c =================================================================== --- trunk/src_plugins/export_fidocadj/fidocadj.c (revision 21336) +++ trunk/src_plugins/export_fidocadj/fidocadj.c (revision 21337) @@ -150,7 +150,7 @@ (*fidoly_next)++; if (*fidoly_next > 15) { char *msg = pcb_strdup_printf("FidoCadJ can't handle this many layers - layer %s is not exported\n", lyname); - pcb_io_incompat_save(NULL, NULL, msg, NULL); + pcb_io_incompat_save(NULL, NULL, "layer", msg, NULL); free(msg); return -1; } @@ -160,7 +160,7 @@ static void write_custom_subc(FILE *f, pcb_subc_t *sc) { char *msg = pcb_strdup_printf("Can't export custom footprint for %s yet\n", sc->refdes); - pcb_io_incompat_save(sc->parent.data, (pcb_any_obj_t *)sc, msg, "subcircuit omitted - add the footprint type on the footprint list!"); + pcb_io_incompat_save(sc->parent.data, (pcb_any_obj_t *)sc, msg, "subc", "subcircuit omitted - add the footprint type on the footprint list!"); free(msg); } @@ -229,7 +229,7 @@ pcb_pline_t *pl = polygon->Clipped->contours; if (polygon->HoleIndexN > 0) { - pcb_io_incompat_save(PCB->Data, (pcb_any_obj_t *)polygon, "FidoCadJ can't handle holes in polygons, ignoring holes for this export", "(some of the polygons will look different unless you remove the holes or split up the polygons)"); + pcb_io_incompat_save(PCB->Data, (pcb_any_obj_t *)polygon, "polygon", "FidoCadJ can't handle holes in polygons, ignoring holes for this export", "(some of the polygons will look different unless you remove the holes or split up the polygons)"); } fprintf(f, "PP %ld %ld", crd(pl->head.point[0]), crd(pl->head.point[1])); @@ -292,17 +292,17 @@ pcb_pstk_compshape_t cshape; pcb_bool plated; if (!pcb_pstk_export_compat_via(padstack, &x, &y, &drill_dia, &pad_dia, &clearance, &mask, &cshape, &plated)) { - pcb_io_incompat_save(PCB->Data, (pcb_any_obj_t *)padstack, "can't export non-uniform padstacl", "use a simpler padstack - omiting this one from the export"); + pcb_io_incompat_save(PCB->Data, (pcb_any_obj_t *)padstack, "padstack-uniformity", "can't export non-uniform padstacl", "use a simpler padstack - omiting this one from the export"); continue; } switch(cshape) { case PCB_PSTK_COMPAT_OCTAGON: - pcb_io_incompat_save(PCB->Data, (pcb_any_obj_t *)padstack, "can't export octagonal shape", "use round or square instead; (fallback to round for now)"); + pcb_io_incompat_save(PCB->Data, (pcb_any_obj_t *)padstack, "padstack-shape", "can't export octagonal shape", "use round or square instead; (fallback to round for now)"); /* fall-through */ case PCB_PSTK_COMPAT_ROUND: oshape = 0; break; case PCB_PSTK_COMPAT_SQUARE: oshape = 1; break; /* rectangle with sharp corners */ default: - pcb_io_incompat_save(PCB->Data, (pcb_any_obj_t *)padstack, "can't export shaped padstack", "use round or square instead; (fallback to round for now)"); + pcb_io_incompat_save(PCB->Data, (pcb_any_obj_t *)padstack, "padstack-shape", "can't export shaped padstack", "use round or square instead; (fallback to round for now)"); oshape = 0; } fprintf(f, "pa %ld %ld %ld %ld %ld %d\n", crd(x), crd(y), crd(pad_dia), crd(pad_dia), crd(drill_dia), oshape); @@ -316,7 +316,7 @@ double rot = 0.0; int on_bottom = 0; if (pcb_subc_get_origin(subc, &x, &y)) { - pcb_io_incompat_save(PCB->Data, (pcb_any_obj_t *)subc, "can't figure subcircuit origin", "omitting this part until the proper subc-aux layer objects are added"); + pcb_io_incompat_save(PCB->Data, (pcb_any_obj_t *)subc, "subc", "can't figure subcircuit origin", "omitting this part until the proper subc-aux layer objects are added"); continue; } pcb_subc_get_rotation(subc, &rot); Index: trunk/src_plugins/export_openscad/scad_draw.c =================================================================== --- trunk/src_plugins/export_openscad/scad_draw.c (revision 21336) +++ trunk/src_plugins/export_openscad/scad_draw.c (revision 21337) @@ -114,7 +114,7 @@ pcb_pstk_proto_t *proto = pcb_pstk_get_proto(ps); if (proto == NULL) { - pcb_io_incompat_save(ps->parent.data, (pcb_any_obj_t *)ps, "failed to retrieve padstack prototype", "internal pcb-rnd error, please file a bugreport"); + pcb_io_incompat_save(ps->parent.data, (pcb_any_obj_t *)ps, "padstack-proto", "failed to retrieve padstack prototype", "internal pcb-rnd error, please file a bugreport"); return; } Index: trunk/src_plugins/export_openscad/scad_models.c =================================================================== --- trunk/src_plugins/export_openscad/scad_models.c (revision 21336) +++ trunk/src_plugins/export_openscad/scad_models.c (revision 21337) @@ -116,7 +116,7 @@ int on_bottom = 0; if (pcb_subc_get_origin(subc, &ox, &oy) != 0) { - pcb_io_incompat_save(PCB->Data, (pcb_any_obj_t *)subc, "Failed to get origin of subcircuit", "fix the missing subc-aux layer"); + pcb_io_incompat_save(PCB->Data, (pcb_any_obj_t *)subc, "subc-place", "Failed to get origin of subcircuit", "fix the missing subc-aux layer"); continue; } pcb_subc_get_rotation(subc, &rot); Index: trunk/src_plugins/io_autotrax/write.c =================================================================== --- trunk/src_plugins/io_autotrax/write.c (revision 21336) +++ trunk/src_plugins/io_autotrax/write.c (revision 21337) @@ -99,7 +99,7 @@ { char tmp[256]; pcb_snprintf(tmp, sizeof(tmp), "%s (omitting layer group): %s", msg, grp->name); - pcb_io_incompat_save(ctx->pcb->Data, NULL, tmp, hint); + pcb_io_incompat_save(ctx->pcb->Data, NULL, "layer", tmp, hint); } static int wrax_map_layers(wctx_t *ctx) @@ -157,11 +157,11 @@ name = ps->term; for(s = name, len = 0; *s != '\0'; s++,len++) { if (!isalnum(*s)) { - pcb_io_incompat_save(ps->parent.data, (pcb_any_obj_t *)ps, "autotrax pad name (terminal name) must consists of alphanumeric characters only - omitting padstack", "rename the terminal to something simpler"); + pcb_io_incompat_save(ps->parent.data, (pcb_any_obj_t *)ps, "padname", "autotrax pad name (terminal name) must consists of alphanumeric characters only - omitting padstack", "rename the terminal to something simpler"); return 0; } if (len >= 4) { - pcb_io_incompat_save(ps->parent.data, (pcb_any_obj_t *)ps, "autotrax pad name (terminal name) must consists of alphanumeric characters only - omitting padstack", "rename the terminal to something simpler"); + pcb_io_incompat_save(ps->parent.data, (pcb_any_obj_t *)ps, "padname", "autotrax pad name (terminal name) must consists of alphanumeric characters only - omitting padstack", "rename the terminal to something simpler"); return 0; } } @@ -175,7 +175,7 @@ } else if (pcb_pstk_export_compat_pad(ps, &x1, &y1, &x2, &y2, &thickness, &clearance, &mask, &square, &nopaste)) { if ((x1 != x2) && (y1 != y2)) { - pcb_io_incompat_save(ps->parent.data, (pcb_any_obj_t *)ps, "can not export rotated rectangular/line pin/pad/via", "shape must be axis-aligned"); + pcb_io_incompat_save(ps->parent.data, (pcb_any_obj_t *)ps, "padstack-rot", "can not export rotated rectangular/line pin/pad/via", "shape must be axis-aligned"); return 0; } /* convert to the same format as via */ @@ -192,12 +192,12 @@ alayer = 1; } else { - pcb_io_incompat_save(ps->parent.data, (pcb_any_obj_t *)ps, "can not export complex pin/pad/via", "use uniform shaped pins/vias and simpler pads, with simple shapes (no generic polygons)"); + pcb_io_incompat_save(ps->parent.data, (pcb_any_obj_t *)ps, "padstack-shape", "can not export complex pin/pad/via", "use uniform shaped pins/vias and simpler pads, with simple shapes (no generic polygons)"); return 0; } if ((cshape != PCB_PSTK_COMPAT_ROUND) && (ps->rot != 0)) { - pcb_io_incompat_save(ps->parent.data, (pcb_any_obj_t *)ps, "can not export rotated pin/pad/via", "remove rotation, shapes must be axis-aligned"); + pcb_io_incompat_save(ps->parent.data, (pcb_any_obj_t *)ps, "padstack-rot", "can not export rotated pin/pad/via", "remove rotation, shapes must be axis-aligned"); return 0; } @@ -207,7 +207,7 @@ case PCB_PSTK_COMPAT_OCTAGON: ashape = 3; break; case PCB_PSTK_COMPAT_RRECT: ashape = 4; break; default: - pcb_io_incompat_save(ps->parent.data, (pcb_any_obj_t *)ps, "can not export: invalid pad shape", "use circle, octagon, rectangle or round rectangle"); + pcb_io_incompat_save(ps->parent.data, (pcb_any_obj_t *)ps, "padstack-shape", "can not export: invalid pad shape", "use circle, octagon, rectangle or round rectangle"); return 0; } @@ -640,7 +640,7 @@ if (alid == 0) { char tmp[256]; pcb_snprintf(tmp, sizeof(tmp), "Ignoring unmapped layer: %s", ly->name); - pcb_io_incompat_save(data, NULL, tmp, NULL); + pcb_io_incompat_save(data, NULL, "layer", tmp, NULL); continue; } wrax_lines(ctx, alid, ly, dx, dy, in_subc); Index: trunk/src_plugins/io_kicad/write.c =================================================================== --- trunk/src_plugins/io_kicad/write.c (revision 21336) +++ trunk/src_plugins/io_kicad/write.c (revision 21337) @@ -129,7 +129,7 @@ gid[0] = -1; ngrp = pcb_layergrp_list(ctx->pcb, fl->type, gid, KICAD_COPPERS); if ((fl->place != FLP_COP_INT) && (ngrp > 1)) - pcb_io_incompat_save(ctx->pcb->Data, NULL, "Multiple layer groups of the same type - exporting only the first", "Merge the groups"); + pcb_io_incompat_save(ctx->pcb->Data, NULL, "group", "Multiple layer groups of the same type - exporting only the first", "Merge the groups"); switch(fl->place) { case FLP_COP_FIRST: @@ -140,7 +140,7 @@ for(n = 0; n < ngrp; n++) { idx = inner; if (inner >= KICAD_COPPERS-1) { - pcb_io_incompat_save(ctx->pcb->Data, NULL, "Too many internal layer groups, omitting some", "Use fewer groups"); + pcb_io_incompat_save(ctx->pcb->Data, NULL, "layer", "Too many internal layer groups, omitting some", "Use fewer groups"); continue; } sprintf(ctx->layer[idx].name, fl->name, idx); @@ -168,7 +168,7 @@ if (gid[0] >= 0) misc++; if (misc >= KICAD_MAX_LAYERS-1) { - pcb_io_incompat_save(ctx->pcb->Data, NULL, "Too many internal layer groups, omitting some", "Use fewer groups"); + pcb_io_incompat_save(ctx->pcb->Data, NULL, "layer", "Too many internal layer groups, omitting some", "Use fewer groups"); continue; } break; @@ -189,9 +189,9 @@ for(n = 0; n < ctx->pcb->LayerGroups.len; n++) { pcb_layergrp_t *grp = &ctx->pcb->LayerGroups.grp[n]; if ((mapped[n] == 0) && !(grp->ltype & PCB_LYT_SUBSTRATE)) - pcb_io_incompat_save(ctx->pcb->Data, NULL, "Failed to map layer for export - layer omitted", grp->name); + pcb_io_incompat_save(ctx->pcb->Data, NULL, "layer", "Failed to map layer for export - layer omitted", grp->name); else if (mapped[n] > 1) - pcb_io_incompat_save(ctx->pcb->Data, NULL, "Mapped layer for export multiple times", grp->name); + pcb_io_incompat_save(ctx->pcb->Data, NULL, "layer", "Mapped layer for export multiple times", grp->name); } free(mapped); @@ -198,7 +198,7 @@ ctx->num_layers++; if (ctx->num_layers < 3) - pcb_io_incompat_save(ctx->pcb->Data, NULL, "Warning: low output layer count", NULL); + pcb_io_incompat_save(ctx->pcb->Data, NULL, "layer", "Warning: low output layer count", NULL); return 0; } @@ -290,7 +290,7 @@ case KLYT_COPPER: #warning TODO: this should be a proper line approximation using a helper (to be written) pcb_fprintf(ctx->f, "(segment (start %.3mm %.3mm) (end %.3mm %.3mm) (layer %s) (width %.3mm))\n", copperStartX, copperStartY, xEnd, yEnd, kly->name, arc->Thickness); /* neglect (net ___ ) for now */ - pcb_io_incompat_save(ctx->pcb->Data, (pcb_any_obj_t *)arc, "Kicad does not support copper arcs; using line approximation", NULL); + pcb_io_incompat_save(ctx->pcb->Data, (pcb_any_obj_t *)arc, "copper-arc", "Kicad does not support copper arcs; using line approximation", NULL); break; case KLYT_GR: pcb_fprintf(ctx->f, "(gr_arc (start %.3mm %.3mm) (end %.3mm %.3mm) (angle %ma) (layer %s) (width %.3mm))\n", xStart, yStart, xEnd, yEnd, arc->Delta, kly->name, arc->Thickness); @@ -317,7 +317,7 @@ pcb_coord_t halfStringHeight; if (!(kly->lyt & PCB_LYT_COPPER) && !(kly->lyt & PCB_LYT_SILK)) { - pcb_io_incompat_save(ctx->pcb->Data, (pcb_any_obj_t *)text, "Kicad supports text only on copper or silk - omitting text object on misc layer", NULL); + pcb_io_incompat_save(ctx->pcb->Data, (pcb_any_obj_t *)text, "text-layer", "Kicad supports text only on copper or silk - omitting text object on misc layer", NULL); return; } @@ -413,7 +413,7 @@ if (polygon->HoleIndexN != 0) { #warning TODO: does kicad suppor holes? of so, use them; else (and only else) there is a polygon.h call that can split up a holed poly into a set of hole-free polygons - pcb_io_incompat_save(ctx->pcb->Data, (pcb_any_obj_t *)polygon, "can't export polygon with holes", NULL); + pcb_io_incompat_save(ctx->pcb->Data, (pcb_any_obj_t *)polygon, "poly-hole", "can't export polygon with holes", NULL); return; } @@ -464,7 +464,7 @@ textlist_foreach(&ly->Text, &it, text) { if (kly->type == KLYT_FP) { if (!PCB_FLAG_TEST(PCB_FLAG_DYNTEXT, text)) { - pcb_io_incompat_save(ctx->pcb->Data, (pcb_any_obj_t *)text, "can't export custom text in footprint", NULL); + pcb_io_incompat_save(ctx->pcb->Data, (pcb_any_obj_t *)text, "subc-text", "can't export custom text in footprint", NULL); break; } else @@ -496,11 +496,11 @@ double psrot; if (is_subc && (ps->term == NULL)) { - pcb_io_incompat_save(Data, (pcb_any_obj_t *)ps, "can't export non-terminal padstack in subcircuit, omitting the object", NULL); + pcb_io_incompat_save(Data, (pcb_any_obj_t *)ps, "padstack-nonterm", "can't export non-terminal padstack in subcircuit, omitting the object", NULL); continue; } if (!is_subc && (ps->term != NULL)) { - pcb_io_incompat_save(Data, (pcb_any_obj_t *)ps, "can't export terminal info for a padstack outside of a subcircuit (omitting terminal info)", NULL); + pcb_io_incompat_save(Data, (pcb_any_obj_t *)ps, "padstack-nonsubc", "can't export terminal info for a padstack outside of a subcircuit (omitting terminal info)", NULL); continue; } @@ -589,16 +589,16 @@ fprintf(ctx->f, "))\n"); } else - pcb_io_incompat_save(Data, (pcb_any_obj_t *)ps, "Can't convert padstack to pin or pad", "use a simpler, uniform shape"); + pcb_io_incompat_save(Data, (pcb_any_obj_t *)ps, "padstack-shape", "Can't convert padstack to pin or pad", "use a simpler, uniform shape"); } else { /* global via */ if (!pcb_pstk_export_compat_via(ps, &x, &y, &drill_dia, &pad_dia, &clearance, &mask, &cshape, &plated)) { - pcb_io_incompat_save(Data, (pcb_any_obj_t *)ps, "Can not convert padstack to old-style via", "Use round, uniform-shaped vias only"); + pcb_io_incompat_save(Data, (pcb_any_obj_t *)ps, "padstack-shape", "Can not convert padstack to old-style via", "Use round, uniform-shaped vias only"); continue; } if (cshape != PCB_PSTK_COMPAT_ROUND) { - pcb_io_incompat_save(Data, (pcb_any_obj_t *)ps, "Can not convert padstack to via", "only round vias are supported"); + pcb_io_incompat_save(Data, (pcb_any_obj_t *)ps, "padstack-shape", "Can not convert padstack to via", "only round vias are supported"); continue; } #warning TODO: set klayer_from and klayer_to using bb span of ps @@ -637,7 +637,7 @@ } if (!found) { - pcb_io_incompat_save(data, NULL, "unmapped layer on data export", NULL); + pcb_io_incompat_save(data, NULL, "layer", "unmapped layer on data export", NULL); continue; } @@ -688,11 +688,11 @@ /* let's not skip duplicate elements for layout export */ if (pcb_subc_get_origin(subc, &sox, &soy) != 0) { - pcb_io_incompat_save(Data, (pcb_any_obj_t *)subc, "Failed to get origin of subcircuit", "fix the missing subc-aux layer"); + pcb_io_incompat_save(Data, (pcb_any_obj_t *)subc, "subc-place", "Failed to get origin of subcircuit", "fix the missing subc-aux layer"); continue; } if (pcb_subc_get_side(subc, &on_bottom) != 0) { - pcb_io_incompat_save(Data, (pcb_any_obj_t *)subc, "Failed to get placement side of subcircuit", "fix the missing subc-aux layer"); + pcb_io_incompat_save(Data, (pcb_any_obj_t *)subc, "subc-place", "Failed to get placement side of subcircuit", "fix the missing subc-aux layer"); continue; } Index: trunk/src_plugins/io_kicad_legacy/write.c =================================================================== --- trunk/src_plugins/io_kicad_legacy/write.c (revision 21336) +++ trunk/src_plugins/io_kicad_legacy/write.c (revision 21337) @@ -91,7 +91,7 @@ padstacklist_foreach(&Data->padstack, &it, ps) { if (pcb_pstk_export_compat_via(ps, &x, &y, &drill_dia, &pad_dia, &clearance, &mask, &cshape, &plated)) { if (cshape != PCB_PSTK_COMPAT_ROUND) { - pcb_io_incompat_save(Data, (pcb_any_obj_t *)ps, "Failed to export via: only round shaped vias, with copper ring, are supported", NULL); + pcb_io_incompat_save(Data, (pcb_any_obj_t *)ps, "via", "Failed to export via: only round shaped vias, with copper ring, are supported", NULL); continue; } @@ -367,11 +367,11 @@ int n, silkLayer; if (pcb_subc_get_origin(subc, &sox, &soy) != 0) { - pcb_io_incompat_save(subc->parent.data, (pcb_any_obj_t *)subc, "Failed to get origin of subcircuit", "fix the missing subc-aux layer"); + pcb_io_incompat_save(subc->parent.data, (pcb_any_obj_t *)subc, "subc-place", "Failed to get origin of subcircuit", "fix the missing subc-aux layer"); return -1; } if (pcb_subc_get_side(subc, &on_bottom) != 0) { - pcb_io_incompat_save(subc->parent.data, (pcb_any_obj_t *)subc, "Failed to get placement side of subcircuit", "fix the missing subc-aux layer"); + pcb_io_incompat_save(subc->parent.data, (pcb_any_obj_t *)subc, "subc-place", "Failed to get placement side of subcircuit", "fix the missing subc-aux layer"); return -1; } @@ -411,7 +411,7 @@ double psrot; if (ps->term == NULL) { - pcb_io_incompat_save(subc->data, (pcb_any_obj_t *)ps, "can't export non-terminal padstack in subcircuit, omitting the object", NULL); + pcb_io_incompat_save(subc->data, (pcb_any_obj_t *)ps, "padstack-nonterm", "can't export non-terminal padstack in subcircuit, omitting the object", NULL); continue; } @@ -428,7 +428,7 @@ if (cshape == PCB_PSTK_COMPAT_SQUARE) fputs(" R ", FP); else if (cshape == PCB_PSTK_COMPAT_ROUND) fputs(" C ", FP); else { - pcb_io_incompat_save(subc->data, (pcb_any_obj_t *)ps, "can't export shaped pin; needs to be square or circular - using circular instead", NULL); + pcb_io_incompat_save(subc->data, (pcb_any_obj_t *)ps, "padstack-shape", "can't export shaped pin; needs to be square or circular - using circular instead", NULL); fputs(" C ", FP); } pcb_fprintf(FP, "%.0mk %.0mk ", pad_dia, pad_dia); /* height = width */ @@ -532,7 +532,7 @@ fputs("$EndPAD\n", FP); } else - pcb_io_incompat_save(subc->data, (pcb_any_obj_t *)ps, "Can't convert padstack to pin or pad", "use a simpler, uniform shape"); + pcb_io_incompat_save(subc->data, (pcb_any_obj_t *)ps, "padstack-shape", "Can't convert padstack to pin or pad", "use a simpler, uniform shape"); } @@ -549,17 +549,17 @@ if (!(lyt & PCB_LYT_SILK)) { linelist_foreach(&ly->Line, &it, line) - pcb_io_incompat_save(subc->data, (pcb_any_obj_t *)line, "can't save non-silk lines in subcircuits", "convert terminals to padstacks, remove the rest"); + pcb_io_incompat_save(subc->data, (pcb_any_obj_t *)line, "subc-obj", "can't save non-silk lines in subcircuits", "convert terminals to padstacks, remove the rest"); arclist_foreach(&ly->Arc, &it, arc) - pcb_io_incompat_save(subc->data, (pcb_any_obj_t *)arc, "can't save non-silk arc in subcircuits", "remove this arc"); + pcb_io_incompat_save(subc->data, (pcb_any_obj_t *)arc, "subc-obj", "can't save non-silk arc in subcircuits", "remove this arc"); } polylist_foreach(&ly->Polygon, &it, poly) - pcb_io_incompat_save(subc->data, (pcb_any_obj_t *)poly, "can't save polygons in subcircuits", "convert square terminals to padstacks, remove the rest"); + pcb_io_incompat_save(subc->data, (pcb_any_obj_t *)poly, "subc-obj", "can't save polygons in subcircuits", "convert square terminals to padstacks, remove the rest"); textlist_foreach(&ly->Text, &it, text) if (!PCB_FLAG_TEST(PCB_FLAG_DYNTEXT, text)) - pcb_io_incompat_save(subc->data, (pcb_any_obj_t *)text, "can't save text in subcircuits", "remove the text object"); + pcb_io_incompat_save(subc->data, (pcb_any_obj_t *)text, "subc-obj", "can't save text in subcircuits", "remove the text object"); silkLayer = (lyt & PCB_LYT_BOTTOM) ? 20 : 21; Index: trunk/src_plugins/io_lihata/write.c =================================================================== --- trunk/src_plugins/io_lihata/write.c (revision 21336) +++ trunk/src_plugins/io_lihata/write.c (revision 21337) @@ -293,7 +293,7 @@ } if (wrver < 4) - pcb_io_incompat_save(NULL, o, "lihata boards before version v4 did not support heavy terminal vias\n", "Either save in lihata v4+ or do not use heavy terminal thermals"); + pcb_io_incompat_save(NULL, o, "thermal", "lihata boards before version v4 did not support heavy terminal vias\n", "Either save in lihata v4+ or do not use heavy terminal thermals"); th = lht_dom_node_alloc(LHT_LIST, "thermal"); lht_dom_hash_put(dst, th); @@ -424,7 +424,7 @@ if (!pcb_pstk_export_compat_via(ps, &x, &y, &drill_dia, &pad_dia, &clearance, &mask, &cshape, &plated)) { - pcb_io_incompat_save(data, (pcb_any_obj_t *)ps, "Failed to convert to old-style via", "Old via format is very much restricted; try to use a simpler, uniform shape padstack"); + pcb_io_incompat_save(data, (pcb_any_obj_t *)ps, "padstack-old", "Failed to convert to old-style via", "Old via format is very much restricted; try to use a simpler, uniform shape padstack"); return NULL; } @@ -459,7 +459,7 @@ pcb_flag_t flg; if (!pcb_pstk_export_compat_pad(ps, &x1, &y1, &x2, &y2, &thickness, &clearance, &mask, &square, &nopaste)) { - pcb_io_incompat_save(data, (pcb_any_obj_t *)ps, "Failed to convert to old-style pad", "Old pad format is very much restricted; try to use a simpler, uniform shape padstack, square or round-cap line based"); + pcb_io_incompat_save(data, (pcb_any_obj_t *)ps, "padstack-old", "Failed to convert to old-style pad", "Old pad format is very much restricted; try to use a simpler, uniform shape padstack, square or round-cap line based"); return NULL; } @@ -564,12 +564,12 @@ else { int dir; if (!pcb_text_old_direction(&dir, text->rot)) - pcb_io_incompat_save(NULL, (pcb_any_obj_t *)text, "versions below lihata board v6 do not support arbitrary text rotation - rounding to 90 degree rotation", "Use only 90 degree rotations through the direction field"); + pcb_io_incompat_save(NULL, (pcb_any_obj_t *)text, "text-rot", "versions below lihata board v6 do not support arbitrary text rotation - rounding to 90 degree rotation", "Use only 90 degree rotations through the direction field"); lht_dom_hash_put(obj, build_textf("direction", "%d", dir)); if (text->thickness > 0) - pcb_io_incompat_save(NULL, (pcb_any_obj_t *)text, "versions below lihata board v6 do not support arbitrary text width - will render with default width", "Leave the thickness field empty (zero) and depend on the automatism"); + pcb_io_incompat_save(NULL, (pcb_any_obj_t *)text, "text-width", "versions below lihata board v6 do not support arbitrary text width - will render with default width", "Leave the thickness field empty (zero) and depend on the automatism"); } if (role != NULL) @@ -589,7 +589,7 @@ if (pcb_subc_get_origin(subc, &ox, &oy) != 0) { assert(subc->parent_type == PCB_PARENT_DATA); - pcb_io_incompat_save(subc->parent.data, (pcb_any_obj_t *)subc, "Failed to convert subc to old-style element: missing origin", "make sure the subcircuit has the vectors on its subc-aux layer"); + pcb_io_incompat_save(subc->parent.data, (pcb_any_obj_t *)subc, "subc-elem", "Failed to convert subc to old-style element: missing origin", "make sure the subcircuit has the vectors on its subc-aux layer"); return NULL; } @@ -636,17 +636,17 @@ } } else { - pcb_io_incompat_save(subc->parent.data, (pcb_any_obj_t *)text, "can't export custom silk text object", "the only text old pcb elements support is the refdes/value/description text"); + pcb_io_incompat_save(subc->parent.data, (pcb_any_obj_t *)text, "subc-text", "can't export custom silk text object", "the only text old pcb elements support is the refdes/value/description text"); } } if (polylist_length(&ly->Polygon) > 0) { char *desc = pcb_strdup_printf("Polygons on layer %s can not be exported in an element", ly->name); - pcb_io_incompat_save(subc->data, NULL, desc, "only lines and arcs are exported"); + pcb_io_incompat_save(subc->data, NULL, desc, "subc-objs", "only lines and arcs are exported"); free(desc); } if (textlist_length(&ly->Text) > 1) { char *desc = pcb_strdup_printf("Text on layer %s can not be exported in an element", ly->name); - pcb_io_incompat_save(subc->data, NULL, desc, "only lines and arcs are exported"); + pcb_io_incompat_save(subc->data, NULL, desc, "subc-objs", "only lines and arcs are exported"); free(desc); } continue; @@ -654,7 +654,7 @@ if (!(ly->meta.bound.type & PCB_LYT_VIRTUAL) && (!pcb_layer_is_pure_empty(ly))) { char *desc = pcb_strdup_printf("Objects on layer %s can not be exported in an element", ly->name); - pcb_io_incompat_save(subc->data, NULL, desc, "only top silk lines and arcs are exported; heavy terminals are not supported, use padstacks only"); + pcb_io_incompat_save(subc->data, NULL, desc, "subc-layer", "only top silk lines and arcs are exported; heavy terminals are not supported, use padstacks only"); free(desc); } } @@ -668,11 +668,11 @@ if (nps != NULL) lht_dom_list_append(lst, nps); else - pcb_io_incompat_save(subc->data, (pcb_any_obj_t *)ps, "Padstack can not be exported as pin or pad", "use simpler padstack; for pins, all copper layers must have the same shape and there must be no paste; for pads, use a line or a rectangle; paste and mask must match the copper shape"); + pcb_io_incompat_save(subc->data, (pcb_any_obj_t *)ps, "padstack-old", "Padstack can not be exported as pin or pad", "use simpler padstack; for pins, all copper layers must have the same shape and there must be no paste; for pads, use a line or a rectangle; paste and mask must match the copper shape"); } if (!seen_refdes) - pcb_io_incompat_save(subc->parent.data, (pcb_any_obj_t *)subc, "can't export subcircuit without refdes text on silk", "old pcb elements require refdes text on silk"); + pcb_io_incompat_save(subc->parent.data, (pcb_any_obj_t *)subc, "subc-refdes", "can't export subcircuit without refdes text on silk", "old pcb elements require refdes text on silk"); return obj; } @@ -746,7 +746,7 @@ if (wrver >= 5) lht_dom_hash_put(nproto, build_text("name", proto->name)); else - pcb_io_incompat_save(NULL, NULL, "versions below lihata board v5 do not support padstack prototype names\n", "Be aware that padstack proto names are lost in save or use lihata board v5 or higher"); + pcb_io_incompat_save(NULL, NULL, "padstack-name", "versions below lihata board v5 do not support padstack prototype names\n", "Be aware that padstack proto names are lost in save or use lihata board v5 or higher"); } else lht_dom_hash_put(nproto, dummy_node("name")); @@ -761,7 +761,7 @@ save_mask = shape->layer_mask & lyt_permit; if (save_mask != shape->layer_mask) { - pcb_io_incompat_save(data, NULL, "Can not save padstack prototype properly because it uses a layer type not supported by this version of lihata padstack.", "Either save in the latest lihata - or accept that some shapes are omitted"); + pcb_io_incompat_save(data, NULL, "padstack-layer", "Can not save padstack prototype properly because it uses a layer type not supported by this version of lihata padstack.", "Either save in the latest lihata - or accept that some shapes are omitted"); continue; } @@ -800,7 +800,7 @@ break; case PCB_PSSH_HSHADOW: if (wrver < 6) { - pcb_io_incompat_save(data, NULL, "Can not save padstack prototype shape \"hshadow\" in lihata formats below version 6.", "Either save in lihata v6 - or accept that the padstack will connect more layers than it should."); + pcb_io_incompat_save(data, NULL, "padstack-shape", "Can not save padstack prototype shape \"hshadow\" in lihata formats below version 6.", "Either save in lihata v6 - or accept that the padstack will connect more layers than it should."); nshapeo = lht_dom_node_alloc(LHT_HASH, "ps_circ"); lht_dom_hash_put(nshapeo, build_textf("dia", CFMT, 1)); } @@ -876,7 +876,7 @@ if (wrver >= 5) lht_dom_hash_put(grp, build_attributes(&g->Attributes)); else if (g->Attributes.Number > 0) - pcb_io_incompat_save(pcb->Data, (pcb_any_obj_t *)g, "Can not save layer group attributes in lihata formats below version 5.", "Either save in lihata v5 - or accept that attributes are not saved"); + pcb_io_incompat_save(pcb->Data, (pcb_any_obj_t *)g, "group-meta", "Can not save layer group attributes in lihata formats below version 5.", "Either save in lihata v5 - or accept that attributes are not saved"); lht_dom_hash_put(grp, build_text("name", g->name)); lht_dom_hash_put(grp, layers = lht_dom_node_alloc(LHT_LIST, "layers")); @@ -888,7 +888,7 @@ int is_outline = (PCB_LAYER_IS_OUTLINE(g->ltype, g->purpi)); if ((!is_outline) && (g->purpose != NULL)) - pcb_io_incompat_save(pcb->Data, (pcb_any_obj_t *)g, "Can not save layer group purpose in lihata formats below version 6.", "Either save in lihata v6 - or accept that these layers will change type in the file"); + pcb_io_incompat_save(pcb->Data, (pcb_any_obj_t *)g, "group-meta", "Can not save layer group purpose in lihata formats below version 6.", "Either save in lihata v6 - or accept that these layers will change type in the file"); if (is_outline) { lht_dom_hash_put(grp, flags = lht_dom_node_alloc(LHT_HASH, "type")); @@ -896,13 +896,13 @@ lht_dom_hash_put(flags, build_text("outline", "1")); outlines++; if (outlines > 1) { - pcb_io_incompat_save(pcb->Data, (pcb_any_obj_t *)g, "Can not save multiple outline layer groups in lihata board version below v6", "Save in lihata board v6"); + pcb_io_incompat_save(pcb->Data, (pcb_any_obj_t *)g, "group", "Can not save multiple outline layer groups in lihata board version below v6", "Save in lihata board v6"); return NULL; } } else if ((lyt & PCB_LYT_DOC) || (lyt & PCB_LYT_MECH) || (lyt & PCB_LYT_BOUNDARY)) { lyt &= ~(PCB_LYT_DOC | PCB_LYT_MECH | PCB_LYT_BOUNDARY); - pcb_io_incompat_save(pcb->Data, (pcb_any_obj_t *)g, "Can not save layer group type DOC or MECH in lihata formats below version 6, saving as MISC.", "Either save in lihata v6 - or accept that these layers will change type in the file"); + pcb_io_incompat_save(pcb->Data, (pcb_any_obj_t *)g, "group", "Can not save layer group type DOC or MECH in lihata formats below version 6, saving as MISC.", "Either save in lihata v6 - or accept that these layers will change type in the file"); } } else { @@ -1037,7 +1037,7 @@ g = pcb_get_grp(&PCB->LayerGroups, PCB_LYT_BOTTOM, PCB_LYT_SILK); if (g == NULL) { - pcb_io_incompat_save(NULL, NULL, "lihata board v1 did not support a layer stackup without bottom silk\n", "Either create the top silk layer or save in at least v2\nNote: only pcb-rnd above 2.1.0 will load boards without silk; best use v6 or higher."); + pcb_io_incompat_save(NULL, NULL, "layer", "lihata board v1 did not support a layer stackup without bottom silk\n", "Either create the top silk layer or save in at least v2\nNote: only pcb-rnd above 2.1.0 will load boards without silk; best use v6 or higher."); return NULL; } grp[g - PCB->LayerGroups.grp] = gbottom; @@ -1044,7 +1044,7 @@ g = pcb_get_grp(&PCB->LayerGroups, PCB_LYT_TOP, PCB_LYT_SILK); if (g == NULL) { - pcb_io_incompat_save(NULL, NULL, "lihata board v1 did not support a layer stackup without top silk\n", "Either create the top silk layer or save in at least v2\nNote: only pcb-rnd above 2.1.0 will load boards without silk; best use v6 or higher."); + pcb_io_incompat_save(NULL, NULL, "layer", "lihata board v1 did not support a layer stackup without top silk\n", "Either create the top silk layer or save in at least v2\nNote: only pcb-rnd above 2.1.0 will load boards without silk; best use v6 or higher."); return NULL; } grp[g - PCB->LayerGroups.grp] = gtop; @@ -1234,17 +1234,17 @@ lht_dom_hash_put(sn, dummy_text_node("via_proto")); } else - pcb_io_incompat_save(NULL, NULL, "lihata boards before version v5 did not support padstack prototype in route style\n", "Either save in lihata v5+ or be aware of losing this information"); + pcb_io_incompat_save(NULL, NULL, "route-style", "lihata boards before version v5 did not support padstack prototype in route style\n", "Either save in lihata v5+ or be aware of losing this information"); if (wrver >= 6) lht_dom_hash_put(sn, build_textf("text_thick", CFMT, s->textt)); else if (s->textt > 0) - pcb_io_incompat_save(NULL, NULL, "lihata boards before version v6 did not support text thickness in route style\n", "Either save in lihata v6+ or be aware of losing this information"); + pcb_io_incompat_save(NULL, NULL, "route-style", "lihata boards before version v6 did not support text thickness in route style\n", "Either save in lihata v6+ or be aware of losing this information"); if (wrver >= 6) lht_dom_hash_put(sn, build_textf("text_scale", "%d", s->texts)); else if (s->texts > 0) - pcb_io_incompat_save(NULL, NULL, "lihata boards before version v6 did not support text scale in route style\n", "Either save in lihata v6+ or be aware of losing this information"); + pcb_io_incompat_save(NULL, NULL, "route-style", "lihata boards before version v6 did not support text scale in route style\n", "Either save in lihata v6+ or be aware of losing this information"); lht_dom_hash_put(sn, build_attributes(&s->attr)); } @@ -1274,7 +1274,7 @@ if (wrver >= 5) lht_dom_hash_put(nnet, build_attributes(&menu->Attributes)); else if (menu->Attributes.Number > 0) - pcb_io_incompat_save(NULL, (pcb_any_obj_t *)menu, "Can not save netlist attributes in lihata formats below version 5.", "Either save in lihata v5 - or accept that attributes are not saved"); + pcb_io_incompat_save(NULL, (pcb_any_obj_t *)menu, "net-attr", "Can not save netlist attributes in lihata formats below version 5.", "Either save in lihata v5 - or accept that attributes are not saved"); pl = lht_dom_node_alloc(LHT_LIST, "conn"); lht_dom_hash_put(nnet, pl); Index: trunk/src_plugins/io_pcb/file.c =================================================================== --- trunk/src_plugins/io_pcb/file.c (revision 21336) +++ trunk/src_plugins/io_pcb/file.c (revision 21337) @@ -312,7 +312,7 @@ PCB->RouteStyle.array[group].Diameter, PCB->RouteStyle.array[group].Hole, PCB->RouteStyle.array[group].Clearance); } else { - pcb_io_incompat_save(PCB->Data, NULL, "There are no routing styles - many versions of gEDA/PCB will segfault on loading the file", "Create exactly 4 routing styles."); + pcb_io_incompat_save(PCB->Data, NULL, "route-style", "There are no routing styles - many versions of gEDA/PCB will segfault on loading the file", "Create exactly 4 routing styles."); fprintf(FP, "\"]\n\n"); } } @@ -354,7 +354,7 @@ char *name = pcb_attribute_get(&ps->Attributes, "name"); if (!pcb_pstk_export_compat_via(ps, &x, &y, &drill_dia, &pad_dia, &clearance, &mask, &cshape, &plated)) { - pcb_io_incompat_save(Data, (pcb_any_obj_t *)ps, "Failed to convert to old-style via", "Old via format is very much restricted; try to use a simpler, uniform shape padstack"); + pcb_io_incompat_save(Data, (pcb_any_obj_t *)ps, "via", "Failed to convert to old-style via", "Old via format is very much restricted; try to use a simpler, uniform shape padstack"); continue; } @@ -407,7 +407,7 @@ static void WritePCBNetlistPatchData(FILE * FP) { if (PCB->NetlistPatches != NULL) { - pcb_io_incompat_save(PCB->Data, NULL, "Saving netlist patch makes the file incompatible with geda/pcb.", "Either remove (or resolve) your netlist patches before save or remove the NetListPatch() subtree manually from the saved file before using with geda/pcb."); + pcb_io_incompat_save(PCB->Data, NULL, "net-patch", "Saving netlist patch makes the file incompatible with geda/pcb.", "Either remove (or resolve) your netlist patches before save or remove the NetListPatch() subtree manually from the saved file before using with geda/pcb."); fprintf(FP, "NetListPatch()\n(\n"); pcb_ratspatch_fexport(PCB, FP, 1); fprintf(FP, ")\n"); @@ -492,7 +492,7 @@ fprintf(FP, " %s]\n", pcb_strflg_f2s(pcb_flag_make(fl), PCB_OBJ_PAD, &ic, 1)); } else - pcb_io_incompat_save(sc->data, (pcb_any_obj_t *)ps, "Padstack can not be exported as pin or pad", "use simpler padstack; for pins, all copper layers must have the same shape and there must be no paste; for pads, use a line or a rectangle; paste and mask must match the copper shape"); + pcb_io_incompat_save(sc->data, (pcb_any_obj_t *)ps, "pin-pad", "Padstack can not be exported as pin or pad", "use simpler padstack; for pins, all copper layers must have the same shape and there must be no paste; for pads, use a line or a rectangle; paste and mask must match the copper shape"); } for(l = 0; l < sc->data->LayerN; l++) { @@ -514,12 +514,12 @@ } if (polylist_length(&ly->Polygon) > 0) { char *desc = pcb_strdup_printf("Polygons on layer %s can not be exported in an element\n", ly->name); - pcb_io_incompat_save(sc->data, NULL, desc, "only lines and arcs are exported"); + pcb_io_incompat_save(sc->data, NULL, desc, "element-obj", "only lines and arcs are exported"); free(desc); } if (textlist_length(&ly->Text) > 1) { char *desc = pcb_strdup_printf("Text on layer %s can not be exported in an element\n", ly->name); - pcb_io_incompat_save(sc->data, NULL, desc, "only lines and arcs are exported"); + pcb_io_incompat_save(sc->data, NULL, desc, "element-obj", "only lines and arcs are exported"); free(desc); } continue; @@ -527,7 +527,7 @@ if (!(ly->meta.bound.type & PCB_LYT_VIRTUAL) && (!pcb_layer_is_pure_empty(ly))) { char *desc = pcb_strdup_printf("Objects on layer %s can not be exported in an element\n", ly->name); - pcb_io_incompat_save(sc->data, NULL, desc, "only top silk lines and arcs are exported; heavy terminals are not supported, use padstacks only"); + pcb_io_incompat_save(sc->data, NULL, desc, "element-layer", "only top silk lines and arcs are exported; heavy terminals are not supported, use padstacks only"); free(desc); } } @@ -662,7 +662,7 @@ if ((!(lyt & (PCB_LYT_COPPER | PCB_LYT_SILK))) && (!PCB_LAYER_IS_ROUTE(lyt, purpi))) { if (!pcb_layer_is_pure_empty(ly)) { char *desc = pcb_strdup_printf("Layer %s can be exported only as a copper layer\n", ly->name); - pcb_io_incompat_save(data, NULL, desc, NULL); + pcb_io_incompat_save(data, NULL, "layer", desc, NULL); free(desc); } } Index: trunk/src_plugins/lib_compat_help/pstk_compat.c =================================================================== --- trunk/src_plugins/lib_compat_help/pstk_compat.c (revision 21336) +++ trunk/src_plugins/lib_compat_help/pstk_compat.c (revision 21337) @@ -709,7 +709,7 @@ flg.q = cshape; } else - pcb_io_incompat_save(ps->parent.data, (pcb_any_obj_t *)ps, "Failed to convert shape to old-style pin/via", "Old pin/via format is very much restricted; try to use a simpler shape (e.g. circle)"); + pcb_io_incompat_save(ps->parent.data, (pcb_any_obj_t *)ps, "padstack-shape", "Failed to convert shape to old-style pin/via", "Old pin/via format is very much restricted; try to use a simpler shape (e.g. circle)"); } for(n = 0; n < sizeof(flg.t) / sizeof(flg.t[0]); n++) { @@ -723,7 +723,7 @@ case PCB_THERMAL_SOLID: nt = 3; break; case PCB_THERMAL_ROUND | PCB_THERMAL_DIAGONAL: nt = 4; break; case PCB_THERMAL_ROUND: nt = 5; break; - default: nt = 0; pcb_io_incompat_save(ps->parent.data, (pcb_any_obj_t *)ps, "Failed to convert thermal to old-style via", "Old via format is very much restricted; try to use a simpler thermal shape"); + default: nt = 0; pcb_io_incompat_save(ps->parent.data, (pcb_any_obj_t *)ps, "padstack-shape", "Failed to convert thermal to old-style via", "Old via format is very much restricted; try to use a simpler thermal shape"); } PCB_FLAG_THERM_ASSIGN_(n, nt, flg); }