Index: trunk/src/layer.c
===================================================================
--- trunk/src/layer.c	(revision 25722)
+++ trunk/src/layer.c	(revision 25723)
@@ -1125,41 +1125,3 @@
 
 	return NULL;
 }
-
-
-static pcb_layer_id_t pcb_layer_get_cached(pcb_board_t *pcb, pcb_layer_id_t *cache, unsigned int loc, unsigned int typ)
-{
-	pcb_layergrp_t *g;
-
-	if (*cache < pcb->Data->LayerN) { /* check if the cache is still pointing to the right layer */
-		pcb_layergrp_id_t gid = pcb->Data->Layer[*cache].meta.real.grp;
-		if ((gid >= 0) && (gid < pcb->LayerGroups.len)) {
-			g = &(pcb->LayerGroups.grp[gid]);
-			if ((g->ltype & loc) && (g->ltype & typ) && (g->lid[0] == *cache))
-				return *cache;
-		}
-	}
-
-	/* nope: need to resolve it again */
-	g = pcb_get_grp(&pcb->LayerGroups, loc, typ);
-	if ((g == NULL) || (g->len == 0)) {
-		*cache = -1;
-		return -1;
-	}
-	*cache = g->lid[0];
-	return *cache;
-}
-
-pcb_layer_id_t pcb_layer_get_bottom_silk(void)
-{
-	static pcb_layer_id_t cache = -1;
-	pcb_layer_id_t id = pcb_layer_get_cached(PCB, &cache, PCB_LYT_BOTTOM, PCB_LYT_SILK);
-	return id;
-}
-
-pcb_layer_id_t pcb_layer_get_top_silk(void)
-{
-	static pcb_layer_id_t cache = -1;
-	pcb_layer_id_t id = pcb_layer_get_cached(PCB, &cache, PCB_LYT_TOP, PCB_LYT_SILK);
-	return id;
-}
Index: trunk/src/layer.h
===================================================================
--- trunk/src/layer.h	(revision 25722)
+++ trunk/src/layer.h	(revision 25723)
@@ -166,10 +166,6 @@
 	PCB_COMPONENT_SIDE = 1
 } pcb_side_t;
 
-/* Cached lookup of the first silk layer in the bottom or top group */
-pcb_layer_id_t pcb_layer_get_bottom_silk(void);
-pcb_layer_id_t pcb_layer_get_top_silk(void);
-
 /* Return the board the layer is under */
 #define pcb_layer_get_top(layer) pcb_data_get_top((layer)->parent.data)
 
Index: trunk/src_plugins/io_pcb/file.c
===================================================================
--- trunk/src_plugins/io_pcb/file.c	(revision 25722)
+++ trunk/src_plugins/io_pcb/file.c	(revision 25723)
@@ -633,6 +633,43 @@
 	}
 }
 
+static pcb_layer_id_t pcb_layer_get_cached(pcb_board_t *pcb, pcb_layer_id_t *cache, unsigned int loc, unsigned int typ)
+{
+	pcb_layergrp_t *g;
+
+	if (*cache < pcb->Data->LayerN) { /* check if the cache is still pointing to the right layer */
+		pcb_layergrp_id_t gid = pcb->Data->Layer[*cache].meta.real.grp;
+		if ((gid >= 0) && (gid < pcb->LayerGroups.len)) {
+			g = &(pcb->LayerGroups.grp[gid]);
+			if ((g->ltype & loc) && (g->ltype & typ) && (g->lid[0] == *cache))
+				return *cache;
+		}
+	}
+
+	/* nope: need to resolve it again */
+	g = pcb_get_grp(&pcb->LayerGroups, loc, typ);
+	if ((g == NULL) || (g->len == 0)) {
+		*cache = -1;
+		return -1;
+	}
+	*cache = g->lid[0];
+	return *cache;
+}
+
+static pcb_layer_id_t pcb_layer_get_bottom_silk(void)
+{
+	static pcb_layer_id_t cache = -1;
+	pcb_layer_id_t id = pcb_layer_get_cached(PCB, &cache, PCB_LYT_BOTTOM, PCB_LYT_SILK);
+	return id;
+}
+
+static pcb_layer_id_t pcb_layer_get_top_silk(void)
+{
+	static pcb_layer_id_t cache = -1;
+	pcb_layer_id_t id = pcb_layer_get_cached(PCB, &cache, PCB_LYT_TOP, PCB_LYT_SILK);
+	return id;
+}
+
 static void LayersFixup(void)
 {
 	pcb_layer_id_t bs, ts;