Index: trunk/src/draw.c
===================================================================
--- trunk/src/draw.c	(revision 29414)
+++ trunk/src/draw.c	(revision 29415)
@@ -329,6 +329,7 @@
 
 static void draw_everything(pcb_draw_info_t *info)
 {
+	static pcb_xform_t xf_def = {0};
 	pcb_layergrp_id_t backsilk_gid;
 	pcb_layergrp_t *backsilk_grp;
 	pcb_color_t old_silk_color[PCB_MAX_LAYERGRP];
@@ -341,6 +342,12 @@
 	pcb_bool paste_empty;
 	legacy_vlayer_t lvly;
 
+	/* no xform means we should use the default logic designed for the GUI */
+	if (info->xform_caller == NULL) {
+		info->xform = info->xform_caller = &xf_def;
+		info->xform->wireframe = conf_core.editor.wireframe_draw;
+	}
+
 	backsilk_gid = ((!conf_core.editor.show_solder_side) ? pcb_layergrp_get_bottom_silk() : pcb_layergrp_get_top_silk());
 	backsilk_grp = pcb_get_layergrp(PCB, backsilk_gid);
 	if (backsilk_grp != NULL) {
Index: trunk/src/obj_arc.c
===================================================================
--- trunk/src/obj_arc.c	(revision 29414)
+++ trunk/src/obj_arc.c	(revision 29415)
@@ -1003,7 +1003,7 @@
 
 	PCB_DRAW_BBOX(arc);
 
-	if (!conf_core.editor.thin_draw && !conf_core.editor.wireframe_draw)
+	if (!conf_core.editor.thin_draw && !info->xform->wireframe)
 	{
 		if ((allow_term_gfx) && pcb_draw_term_need_gfx(arc) && pcb_draw_term_hid_permission()) {
 			pcb_hid_set_line_cap(pcb_draw_out.active_padGC, pcb_cap_round);
@@ -1024,7 +1024,7 @@
 		if(conf_core.editor.thin_draw)
 			pcb_render->draw_arc(pcb_draw_out.fgGC, arc->X, arc->Y, arc->Width, arc->Height, arc->StartAngle, arc->Delta);
 
-		if(conf_core.editor.wireframe_draw)
+		if(info->xform->wireframe)
 			pcb_draw_wireframe_arc(pcb_draw_out.fgGC, arc, thickness);
 	}
 	if (arc->term != NULL) {
Index: trunk/src/obj_common.h
===================================================================
--- trunk/src/obj_common.h	(revision 29414)
+++ trunk/src/obj_common.h	(revision 29415)
@@ -98,6 +98,7 @@
 	unsigned omit_overlay:1;     /* do not draw overlays (which are useful on screen but normally omitted on exports, except if --as-shown is specified */
 	unsigned partial_export:1;   /* 1 if only objects with the EXPORTSEL flag should be drawn */
 	unsigned no_slot_in_nonmech:1; /* if 1, do not draw slots on non-mechanical layers (e.g. "no slot in copper") */
+	unsigned wireframe:1;        /* when 1, draw wireframe contours instead of solid objects */
 	/* WARNING: After adding new fields, make sure to update pcb_xform_add() and pcb_xform_is_nop() below */
 };
 
@@ -112,8 +113,9 @@
 		__dst__->omit_overlay |= __src__->omit_overlay; \
 		__dst__->partial_export |= __src__->partial_export; \
 		__dst__->no_slot_in_nonmech |= __src__->no_slot_in_nonmech; \
+		__dst__->wireframe |= __src__->wireframe; \
 	} while(0)
-#define pcb_xform_is_nop(src) (((src)->bloat == 0) && ((src)->layer_faded == 0) && ((src)->omit_overlay == 0) && ((src)->partial_export == 0) && ((src)->no_slot_in_nonmech == 0))
+#define pcb_xform_is_nop(src) (((src)->bloat == 0) && ((src)->layer_faded == 0) && ((src)->omit_overlay == 0) && ((src)->partial_export == 0) && ((src)->no_slot_in_nonmech == 0) && ((src)->wireframe == 0))
 
 /* Returns true if overlay drawing should be omitted */
 #define pcb_xform_omit_overlay(info) \
Index: trunk/src/obj_line.c
===================================================================
--- trunk/src/obj_line.c	(revision 29414)
+++ trunk/src/obj_line.c	(revision 29415)
@@ -1118,7 +1118,7 @@
 
 	PCB_DRAW_BBOX(line);
 	pcb_hid_set_line_cap(pcb_draw_out.fgGC, pcb_cap_round);
-	if (!conf_core.editor.thin_draw && !conf_core.editor.wireframe_draw) {
+	if (!conf_core.editor.thin_draw && !info->xform->wireframe) {
 		if ((allow_term_gfx) && pcb_draw_term_need_gfx(line) && pcb_draw_term_hid_permission()) {
 			pcb_hid_set_line_cap(pcb_draw_out.active_padGC, pcb_cap_round);
 			pcb_hid_set_line_width(pcb_draw_out.active_padGC, thickness);
@@ -1135,7 +1135,7 @@
 			pcb_render->draw_line(pcb_draw_out.fgGC, line->Point1.X, line->Point1.Y, line->Point2.X, line->Point2.Y);
 		}
 
-		if(conf_core.editor.wireframe_draw) { 
+		if (info->xform->wireframe) {
 			pcb_hid_set_line_width(pcb_draw_out.fgGC, 0);
 			pcb_draw_wireframe_line(pcb_draw_out.fgGC, line->Point1.X, line->Point1.Y, line->Point2.X, line->Point2.Y, thickness, 0);
 		}
Index: trunk/src/obj_poly.c
===================================================================
--- trunk/src/obj_poly.c	(revision 29414)
+++ trunk/src/obj_poly.c	(revision 29415)
@@ -1222,7 +1222,7 @@
 		polygon = trpoly;
 	}
 
-	if ((conf_core.editor.thin_draw || conf_core.editor.thin_draw_poly || conf_core.editor.wireframe_draw))
+	if ((conf_core.editor.thin_draw || conf_core.editor.thin_draw_poly || info->xform->wireframe))
 	{
 		pcb_dhlp_thindraw_pcb_polygon(pcb_draw_out.fgGC, polygon, info->drawn_area);
 	}
Index: trunk/src/obj_pstk.c
===================================================================
--- trunk/src/obj_pstk.c	(revision 29414)
+++ trunk/src/obj_pstk.c	(revision 29415)
@@ -566,7 +566,7 @@
 			set_ps_color(ps, info->objcb.pstk.is_current, info->objcb.pstk.shape_mask, info->objcb.pstk.layer1);
 		else
 			set_ps_color(ps, info->objcb.pstk.is_current, grp->ltype, info->objcb.pstk.layer1);
-		if (conf_core.editor.thin_draw || conf_core.editor.wireframe_draw) {
+		if (conf_core.editor.thin_draw || info->xform->wireframe) {
 			pcb_hid_set_line_width(pcb_draw_out.fgGC, 0);
 			pcb_pstk_draw_shape_thin(info, pcb_draw_out.fgGC, ps, shape);
 		}
@@ -725,7 +725,7 @@
 	/* actual slot */
 	shape = pcb_pstk_shape(ps, PCB_LYT_MECH, PCB_LYC_AUTO);
 	if (shape != NULL) {
-		if (conf_core.editor.thin_draw || conf_core.editor.wireframe_draw) {
+		if (conf_core.editor.thin_draw || info->xform->wireframe) {
 			pcb_hid_set_line_width(pcb_draw_out.drillGC, 0);
 			pcb_pstk_draw_shape_thin(info, pcb_draw_out.drillGC, ps, shape);
 		}
Index: trunk/src/obj_rat.c
===================================================================
--- trunk/src/obj_rat.c	(revision 29414)
+++ trunk/src/obj_rat.c	(revision 29415)
@@ -442,6 +442,7 @@
 pcb_r_dir_t pcb_rat_draw_callback(const pcb_box_t * b, void *cl)
 {
 	pcb_rat_t *rat = (pcb_rat_t *) b;
+	pcb_draw_info_t *info = cl;
 
 	if (PCB_FLAG_TEST(PCB_FLAG_SELECTED | PCB_FLAG_FOUND, rat)) {
 		if (PCB_FLAG_TEST(PCB_FLAG_SELECTED, rat))
@@ -461,7 +462,7 @@
 	if (PCB_FLAG_TEST(PCB_FLAG_VIA, rat)) {
 		int w = rat->Thickness;
 
-		if (conf_core.editor.thin_draw || conf_core.editor.wireframe_draw)
+		if (conf_core.editor.thin_draw || info->xform->wireframe)
 			pcb_hid_set_line_width(pcb_draw_out.fgGC, 0);
 		else
 			pcb_hid_set_line_width(pcb_draw_out.fgGC, w);
Index: trunk/src/obj_text.c
===================================================================
--- trunk/src/obj_text.c	(revision 29414)
+++ trunk/src/obj_text.c	(revision 29415)
@@ -1190,7 +1190,7 @@
 			}
 
 			/* draw the polygons */
-			poly_thin = conf_core.editor.thin_draw || conf_core.editor.wireframe_draw;
+			poly_thin = conf_core.editor.thin_draw || info->xform->wireframe;
 			for(p = polylist_first(&font->Symbol[*string].polys); p != NULL; p = polylist_next(p))
 				draw_text_poly(info, p, mx, x, xordraw, poly_thin, xordx, xordy, cb, cb_ctx);
 
@@ -1212,7 +1212,7 @@
 			py[3] = pcb_round(pcb_xform_y(mx, font->DefaultSymbol.X1 + x, font->DefaultSymbol.Y2));
 
 			/* draw move on to next cursor position */
-			if ((cb == NULL) && (xordraw || (conf_core.editor.thin_draw || conf_core.editor.wireframe_draw))) {
+			if ((cb == NULL) && (xordraw || (conf_core.editor.thin_draw || info->xform->wireframe))) {
 				if (xordraw) {
 					pcb_render->draw_line(pcb_crosshair.GC, px[0] + xordx, py[0] + xordy, px[1] + xordx, py[1] + xordy);
 					pcb_render->draw_line(pcb_crosshair.GC, px[1] + xordx, py[1] + xordy, px[2] + xordx, py[2] + xordy);