Index: src_plugins/io_bxl/bxl.h =================================================================== --- src_plugins/io_bxl/bxl.h (revision 30645) +++ src_plugins/io_bxl/bxl.h (revision 30646) @@ -60,6 +60,8 @@ unsigned delayed_poly:1; unsigned is_text:1; + unsigned has_mask_shape:1; + int copper_shape_idx; } state; struct { Index: src_plugins/io_bxl/read.c =================================================================== --- src_plugins/io_bxl/read.c (revision 30645) +++ src_plugins/io_bxl/read.c (revision 30646) @@ -216,10 +216,44 @@ ctx->state.proto.name = name; ctx->state.proto.in_use = 1; + ctx->state.copper_shape_idx = -1; if (e == NULL) htsi_set(&ctx->proto_name2id, name, ctx->proto_id++); } + + /* create mask shapes for thru-hole */ +static void pcb_bxl_padstack_end_automask(pcb_bxl_ctx_t *ctx) +{ + const pcb_proto_layer_t *n; + int i, dst; + + if (ctx->state.surface) + return; + + if (ctx->state.proto.hdia <= 0) + pcb_message(PCB_MSG_WARNING, "bxl footprint error: padstack '%s' marked as non-surface-mounted yet there is no hole in it\n", ctx->state.proto.name); + if (ctx->state.has_mask_shape) + return; /* do not override user's mask */ + + if (ctx->state.copper_shape_idx < 0) { + pcb_message(PCB_MSG_WARNING, "bxl footprint error: padstack '%s' is thru-hole, does not have mask or copper\n", ctx->state.proto.name); + return; + } + + for(n = pcb_proto_layers, i = 0; i < pcb_proto_num_layers; i++,n++) { + pcb_pstk_tshape_t *ts; + + if ((n->mask & PCB_LYT_MASK) == 0) + continue; + + ts = &ctx->state.proto.tr.array[0]; + pcb_pstk_alloc_append_shape(ts); + dst = ts->len-1; + pcb_pstk_shape_derive(&ctx->state.proto, dst, ctx->state.copper_shape_idx, n->auto_bloat, n->mask, n->comb); + } +} + void pcb_bxl_padstack_end(pcb_bxl_ctx_t *ctx) { pcb_cardinal_t i; @@ -227,6 +261,8 @@ ctx->state.proto.hdia = ctx->state.hole; ctx->state.proto.hplated = ctx->state.plated; + pcb_bxl_padstack_end_automask(ctx); + i = pcb_pstk_proto_insert_forcedup(ctx->subc->data, &ctx->state.proto, 0, 0); if (ctx->proto_id-1 != i) pcb_message(PCB_MSG_WARNING, "bxl footprint error: failed to insert padstack '%s'\n", ctx->state.proto.name); @@ -265,6 +301,12 @@ ts = &ctx->state.proto.tr.array[0]; sh = pcb_pstk_alloc_append_shape(ts); + if (ctx->state.layer->meta.bound.type & PCB_LYT_MASK) + ctx->state.has_mask_shape = 1; + + if (ctx->state.layer->meta.bound.type & PCB_LYT_COPPER) + ctx->state.copper_shape_idx = ts->len-1; + sh->layer_mask = ctx->state.layer->meta.bound.type; sh->comb = ctx->state.layer->comb; sh->clearance = 0;