Index: read.c =================================================================== --- read.c (revision 30902) +++ read.c (revision 30903) @@ -86,7 +86,7 @@ { if (sattr->refdes != NULL) { if (sattr->footprint == NULL) - pcb_message(PCB_MSG_ERROR, "protel autotrax: not importing refdes=%s: no footprint specified\n", sattr->refdes); + rnd_message(PCB_MSG_ERROR, "protel autotrax: not importing refdes=%s: no footprint specified\n", sattr->refdes); else rnd_actionva(hl, "ElementList", "Need", null_empty(sattr->refdes), null_empty(sattr->footprint), null_empty(sattr->value), NULL); } @@ -107,9 +107,9 @@ conf_role_t settings_dest; pcb_layer_id_t protel_to_stackup[14]; int lineno; - pcb_coord_t mask_clearance; - pcb_coord_t copper_clearance; - pcb_coord_t minimum_comp_pin_drill; + rnd_coord_t mask_clearance; + rnd_coord_t copper_clearance; + rnd_coord_t minimum_comp_pin_drill; int trax_version; int ignored_keepout_element; int ignored_layer_zero_element; @@ -128,7 +128,7 @@ return NULL; } if (autotrax_layer == 0) { - pcb_message(PCB_MSG_ERROR, "Ignored '%s' on easy/autotrax layer zero, %s:%d\n", otyp, st->Filename, st->lineno); + rnd_message(PCB_MSG_ERROR, "Ignored '%s' on easy/autotrax layer zero, %s:%d\n", otyp, st->Filename, st->lineno); st->ignored_layer_zero_element++; return NULL; } @@ -135,7 +135,7 @@ lid = st->protel_to_stackup[autotrax_layer]; if (lid < 0) { - pcb_message(PCB_MSG_ERROR, "Ignored '%s' on easy/autotrax unknown layer %d, %s:%d\n", otyp, autotrax_layer, st->Filename, st->lineno); + rnd_message(PCB_MSG_ERROR, "Ignored '%s' on easy/autotrax unknown layer %d, %s:%d\n", otyp, autotrax_layer, st->Filename, st->lineno); return NULL; } @@ -155,7 +155,7 @@ char line[MAXREAD], *t; int success; int valid = 1; - pcb_coord_t X, Y, linewidth; + rnd_coord_t X, Y, linewidth; int scaling = 100; unsigned direction = 0; /* default is horizontal */ pcb_flag_t Flags; @@ -189,7 +189,7 @@ qparse_free(argc, &argv); } else { - pcb_message(PCB_MSG_ERROR, "Insufficient free string attribute fields, %s:%d\n", st->Filename, st->lineno); + rnd_message(PCB_MSG_ERROR, "Insufficient free string attribute fields, %s:%d\n", st->Filename, st->lineno); qparse_free(argc, &argv); return -1; } @@ -196,12 +196,12 @@ } if (!valid) { - pcb_message(PCB_MSG_ERROR, "Failed to parse text attribute fields, %s:%d\n", st->Filename, st->lineno); + rnd_message(PCB_MSG_ERROR, "Failed to parse text attribute fields, %s:%d\n", st->Filename, st->lineno); return -1; } if (fgetline(line, sizeof(line), FP, st->lineno) == NULL) { - pcb_message(PCB_MSG_ERROR, "Empty free string text field, %s:%d\n", st->Filename, st->lineno); + rnd_message(PCB_MSG_ERROR, "Empty free string text field, %s:%d\n", st->Filename, st->lineno); strcpy(line, "(empty text field)"); } /* this helps the parser fail more gracefully if excessive newlines, or empty text field */ @@ -227,7 +227,7 @@ TODO("do not use strlen() for this, decide where to move this code") /* if (strlen(t) == 0) { - pcb_message(PCB_MSG_ERROR, "Empty free string not placed on layout, %s:%d\n", st->Filename, st->lineno); + rnd_message(PCB_MSG_ERROR, "Empty free string not placed on layout, %s:%d\n", st->Filename, st->lineno); return 0; } */ @@ -237,7 +237,7 @@ static int rdax_track(read_state_t *st, FILE *FP, pcb_subc_t *subc) { char line[MAXREAD]; - pcb_coord_t X1, Y1, X2, Y2, Thickness, Clearance; + rnd_coord_t X1, Y1, X2, Y2, Thickness, Clearance; pcb_flag_t Flags = pcb_flag_make(0); int autotrax_layer = 0; int success; @@ -272,7 +272,7 @@ qparse_free(argc, &argv); } else { - pcb_message(PCB_MSG_ERROR, "Insufficient track attribute fields, %s:%d\n", st->Filename, st->lineno); + rnd_message(PCB_MSG_ERROR, "Insufficient track attribute fields, %s:%d\n", st->Filename, st->lineno); qparse_free(argc, &argv); return -1; } @@ -297,7 +297,7 @@ int autotrax_layer = 0; pcb_layer_t *ly; - pcb_coord_t centreX, centreY, width, height, Thickness, Clearance, radius; + rnd_coord_t centreX, centreY, width, height, Thickness, Clearance, radius; pcb_angle_t start_angle = 0.0; pcb_angle_t delta = 360.0; @@ -333,13 +333,13 @@ } else { qparse_free(argc, &argv); - pcb_message(PCB_MSG_ERROR, "Insufficient arc attribute fields, %s:%d\n", st->Filename, st->lineno); + rnd_message(PCB_MSG_ERROR, "Insufficient arc attribute fields, %s:%d\n", st->Filename, st->lineno); return -1; } } if (!valid) { - pcb_message(PCB_MSG_ERROR, "Unable to parse arc attribute fields, %s:%d\n", st->Filename, st->lineno); + rnd_message(PCB_MSG_ERROR, "Unable to parse arc attribute fields, %s:%d\n", st->Filename, st->lineno); return -1; } @@ -440,7 +440,7 @@ int valid = 1; pcb_data_t *data = (subc == NULL) ? st->pcb->Data : subc->data; pcb_pstk_t *ps; - pcb_coord_t X, Y, Thickness, Clearance, Mask, Drill; /* not sure what to do with mask */ + rnd_coord_t X, Y, Thickness, Clearance, Mask, Drill; /* not sure what to do with mask */ Thickness = 0; Clearance = st->copper_clearance; /* start with sane default */ @@ -469,13 +469,13 @@ } else { qparse_free(argc, &argv); - pcb_message(PCB_MSG_ERROR, "Insufficient via attribute fields, %s:%d\n", st->Filename, st->lineno); + rnd_message(PCB_MSG_ERROR, "Insufficient via attribute fields, %s:%d\n", st->Filename, st->lineno); return -1; } } if (!valid) { - pcb_message(PCB_MSG_ERROR, "Unable to parse via attribute fields, %s:%d\n", st->Filename, st->lineno); + rnd_message(PCB_MSG_ERROR, "Unable to parse via attribute fields, %s:%d\n", st->Filename, st->lineno); return -1; } @@ -498,7 +498,7 @@ int autotrax_layer = 0; int valid = 1; int success; - pcb_coord_t X, Y, X_size, Y_size, Thickness, Clearance, Mask, Drill; + rnd_coord_t X, Y, X_size, Y_size, Thickness, Clearance, Mask, Drill; pcb_data_t *data = (subc == NULL) ? st->pcb->Data : subc->data; pcb_pstk_t *ps; @@ -516,7 +516,7 @@ argc = qparse2(s, &argv, 0); if (argc <= 6) { qparse_free(argc, &argv); - pcb_message(PCB_MSG_ERROR, "Insufficient pad attribute fields, %s:%d\n", st->Filename, st->lineno); + rnd_message(PCB_MSG_ERROR, "Insufficient pad attribute fields, %s:%d\n", st->Filename, st->lineno); return -1; } X = pcb_get_value_ex(argv[0], NULL, NULL, NULL, "mil", &success); @@ -541,7 +541,7 @@ } if (!valid) { - pcb_message(PCB_MSG_ERROR, "Insufficient pad attribute fields, %s:%d\n", st->Filename, st->lineno); + rnd_message(PCB_MSG_ERROR, "Insufficient pad attribute fields, %s:%d\n", st->Filename, st->lineno); return -1; } @@ -548,7 +548,7 @@ /* now find name as string on next line and copy it */ TODO("can not exit above if we need to read this line") if (fgetline(line, sizeof(line), FP, st->lineno) == NULL) { - pcb_message(PCB_MSG_ERROR, "Error parsing pad text field line, %s:%d\n", st->Filename, st->lineno); + rnd_message(PCB_MSG_ERROR, "Error parsing pad text field line, %s:%d\n", st->Filename, st->lineno); return -1; } s = line; @@ -561,19 +561,19 @@ so we warn the user is this is the case */ switch (Connects) { case 1: - pcb_message(PCB_MSG_ERROR, "pin clears PWR/GND, %s:%d.\n", st->Filename, st->lineno); + rnd_message(PCB_MSG_ERROR, "pin clears PWR/GND, %s:%d.\n", st->Filename, st->lineno); break; case 2: - pcb_message(PCB_MSG_ERROR, "pin requires relief to GND plane, %s:%d.\n", st->Filename, st->lineno); + rnd_message(PCB_MSG_ERROR, "pin requires relief to GND plane, %s:%d.\n", st->Filename, st->lineno); break; case 4: - pcb_message(PCB_MSG_ERROR, "pin requires relief to PWR plane, %s:%d.\n", st->Filename, st->lineno); + rnd_message(PCB_MSG_ERROR, "pin requires relief to PWR plane, %s:%d.\n", st->Filename, st->lineno); break; case 3: - pcb_message(PCB_MSG_ERROR, "pin should connect to PWR plane, %s:%d.\n", st->Filename, st->lineno); + rnd_message(PCB_MSG_ERROR, "pin should connect to PWR plane, %s:%d.\n", st->Filename, st->lineno); break; case 5: - pcb_message(PCB_MSG_ERROR, "pin should connect to GND plane, %s:%d.\n", st->Filename, st->lineno); + rnd_message(PCB_MSG_ERROR, "pin should connect to GND plane, %s:%d.\n", st->Filename, st->lineno); break; } @@ -581,7 +581,7 @@ Mask = Thickness + st->mask_clearance; if (autotrax_layer == 0) { - pcb_message(PCB_MSG_ERROR, "Ignored pad on easy/autotrax layer zero, %s:%d\n", st->Filename, st->lineno); + rnd_message(PCB_MSG_ERROR, "Ignored pad on easy/autotrax layer zero, %s:%d\n", st->Filename, st->lineno); st->ignored_layer_zero_element++; return 0; } @@ -597,7 +597,7 @@ 5 Cross Hair Target 6 Moiro Target */ if ((Shape == 5) || (Shape == 6)) { - pcb_message(PCB_MSG_ERROR, "Unsupported FP target shape %d, %s:%d.\n", Shape, st->Filename, st->lineno); + rnd_message(PCB_MSG_ERROR, "Unsupported FP target shape %d, %s:%d.\n", Shape, st->Filename, st->lineno); return 0; } @@ -633,7 +633,7 @@ sh[n].layer_mask |= PCB_LYT_BOTTOM; break; default: - pcb_message(PCB_MSG_ERROR, "Unsupported FP layer: %d, %s:%d.\n", autotrax_layer, st->Filename, st->lineno); + rnd_message(PCB_MSG_ERROR, "Unsupported FP layer: %d, %s:%d.\n", autotrax_layer, st->Filename, st->lineno); return 0; } @@ -640,7 +640,7 @@ switch(Shape) { case 1: /* round */ for(n = 0; n < 7; n++) { - pcb_coord_t clr = (sh[n].layer_mask & PCB_LYT_MASK) ? Clearance : 0; + rnd_coord_t clr = (sh[n].layer_mask & PCB_LYT_MASK) ? Clearance : 0; if (sh[n].layer_mask == 0) break; pcb_shape_oval(&sh[n], X_size+clr, Y_size+clr); } @@ -649,7 +649,7 @@ case 4: /* round-rect - for now */ TODO("generate round-rect") for(n = 0; n < 7; n++) { - pcb_coord_t clr = (sh[n].layer_mask & PCB_LYT_MASK) ? Clearance : 0; + rnd_coord_t clr = (sh[n].layer_mask & PCB_LYT_MASK) ? Clearance : 0; if (sh[n].layer_mask == 0) break; pcb_shape_rect(&sh[n], X_size+clr, Y_size+clr); } @@ -657,12 +657,12 @@ case 3: /* octa */ TODO("generate octa") default: - pcb_message(PCB_MSG_ERROR, "Unsupported FP shape: %d, %s:%d.\n", Shape, st->Filename, st->lineno); + rnd_message(PCB_MSG_ERROR, "Unsupported FP shape: %d, %s:%d.\n", Shape, st->Filename, st->lineno); return 0; } ps = pcb_pstk_new_from_shape(data, X, Y, Drill, 1, Clearance, sh); if (ps == NULL) - pcb_message(PCB_MSG_ERROR, "Failed to convert FP to padstack, %s:%d.\n", st->Filename, st->lineno); + rnd_message(PCB_MSG_ERROR, "Failed to convert FP to padstack, %s:%d.\n", st->Filename, st->lineno); return (ps != NULL); } @@ -677,7 +677,7 @@ char line[MAXREAD]; pcb_poly_t *polygon = NULL; pcb_flag_t flags = pcb_flag_make(PCB_FLAG_CLEARPOLY); - pcb_coord_t X1, Y1, X2, Y2, Clearance; + rnd_coord_t X1, Y1, X2, Y2, Clearance; pcb_layer_t *ly; Clearance = st->copper_clearance; /* start with sane default */ @@ -705,13 +705,13 @@ } else { qparse_free(argc, &argv); - pcb_message(PCB_MSG_ERROR, "Insufficient fill attribute fields, %s:%d\n", st->Filename, st->lineno); + rnd_message(PCB_MSG_ERROR, "Insufficient fill attribute fields, %s:%d\n", st->Filename, st->lineno); return -1; } } if (!valid) { - pcb_message(PCB_MSG_ERROR, "Fill attribute fields unable to be parsed, %s:%d\n", st->Filename, st->lineno); + rnd_message(PCB_MSG_ERROR, "Fill attribute fields unable to be parsed, %s:%d\n", st->Filename, st->lineno); return -1; } @@ -723,7 +723,7 @@ polygon = pcb_poly_new(ly, 0, flags); if (polygon == NULL) { - pcb_message(PCB_MSG_ERROR, "Failed to allocate polygon, %s:%d\n", st->Filename, st->lineno); + rnd_message(PCB_MSG_ERROR, "Failed to allocate polygon, %s:%d\n", st->Filename, st->lineno); return -1; } @@ -737,7 +737,7 @@ return 1; } else { - pcb_coord_t w = X2-X1, h = Y2-Y1; + rnd_coord_t w = X2-X1, h = Y2-Y1; pcb_pstk_shape_t sh[4]; pcb_layer_type_t side; int n; @@ -756,7 +756,7 @@ pcb_shape_rect(&sh[2], w, h); if (pcb_pstk_new_from_shape(subc->data, (X1+X2)/2, (Y1+Y2)/2, 0, 0, Clearance, sh) != NULL) return 1; - pcb_message(PCB_MSG_ERROR, "SMD pad: filed to convert from polygon, %s:%d\n", st->Filename, st->lineno); + rnd_message(PCB_MSG_ERROR, "SMD pad: filed to convert from polygon, %s:%d\n", st->Filename, st->lineno); } return -1; @@ -796,7 +796,7 @@ st->protel_to_stackup[13] = pcb_layer_create(st->pcb, gid, "Multi", 0); } else { - pcb_message(PCB_MSG_ERROR, "Unable to create Keepout, Multi layers in default top silk group\n"); + rnd_message(PCB_MSG_ERROR, "Unable to create Keepout, Multi layers in default top silk group\n"); } g = pcb_get_grp_new_intern(st->pcb, -1); @@ -853,7 +853,7 @@ netname = pcb_strdup(line); } else { - pcb_message(PCB_MSG_ERROR, "Empty netlist name found, %s:%d\n", st->Filename, st->lineno); + rnd_message(PCB_MSG_ERROR, "Empty netlist name found, %s:%d\n", st->Filename, st->lineno); return -1; } fgetline(line, sizeof(line), FP, st->lineno); @@ -865,11 +865,11 @@ in_comp = 1; while(in_comp) { if (fgetline(line, sizeof(line), FP, st->lineno) == NULL) { - pcb_message(PCB_MSG_ERROR, "Empty line in netlist COMP, %s:%d\n", st->Filename, st->lineno); + rnd_message(PCB_MSG_ERROR, "Empty line in netlist COMP, %s:%d\n", st->Filename, st->lineno); } else { if (fgetline(line, sizeof(line), FP, st->lineno) == NULL) { - pcb_message(PCB_MSG_ERROR, "Empty netlist REFDES, %s:%d\n", st->Filename, st->lineno); + rnd_message(PCB_MSG_ERROR, "Empty netlist REFDES, %s:%d\n", st->Filename, st->lineno); } else { s = line; @@ -879,7 +879,7 @@ sattr.refdes = pcb_strdup(line); } if (fgetline(line, sizeof(line), FP, st->lineno) == NULL) { - pcb_message(PCB_MSG_ERROR, "Empty NETDEF package, %s:%d\n", st->Filename, st->lineno); + rnd_message(PCB_MSG_ERROR, "Empty NETDEF package, %s:%d\n", st->Filename, st->lineno); free(sattr.footprint); sattr.footprint = pcb_strdup("unknown"); } @@ -934,7 +934,7 @@ } } else if (length >= 6 && strncmp(line, "ENDPCB", 6) == 0) { - pcb_message(PCB_MSG_ERROR, "End of protel Autotrax file found in netlist section?!, %s:%d\n", st->Filename, st->lineno); + rnd_message(PCB_MSG_ERROR, "End of protel Autotrax file found in netlist section?!, %s:%d\n", st->Filename, st->lineno); endpcb = 1; /* if we get here, something went wrong */ } } @@ -950,7 +950,7 @@ int success; int valid = 1; int refdes_scaling = 100; - pcb_coord_t module_X, module_Y; + rnd_coord_t module_X, module_Y; unsigned direction = 0; /* default is horizontal */ char module_name[MAXREAD], module_refdes[MAXREAD], module_value[MAXREAD]; pcb_subc_t *new_module; @@ -1004,13 +1004,13 @@ } else { qparse_free(argc, &argv); - pcb_message(PCB_MSG_ERROR, "Insufficient COMP attribute fields, %s:%d\n", st->Filename, st->lineno); + rnd_message(PCB_MSG_ERROR, "Insufficient COMP attribute fields, %s:%d\n", st->Filename, st->lineno); return -1; } } if (!valid) { - pcb_message(PCB_MSG_ERROR, "Unable to parse COMP attributes, %s:%d\n", st->Filename, st->lineno); + rnd_message(PCB_MSG_ERROR, "Unable to parse COMP attributes, %s:%d\n", st->Filename, st->lineno); return -1; } @@ -1034,7 +1034,7 @@ break; } else { - pcb_message(PCB_MSG_ERROR, "Empty module/COMP found, not added to layout, %s:%d\n", st->Filename, st->lineno); + rnd_message(PCB_MSG_ERROR, "Empty module/COMP found, not added to layout, %s:%d\n", st->Filename, st->lineno); TODO("TODO safely free new_module") return 0; } @@ -1154,10 +1154,10 @@ fclose(FP); box = pcb_data_bbox(&board_size, Ptr->Data, pcb_false); if (st.ignored_keepout_element) { - pcb_message(PCB_MSG_ERROR, "Ignored %d keepout track(s) on auto/easytrax layer 12\n", st.ignored_keepout_element); + rnd_message(PCB_MSG_ERROR, "Ignored %d keepout track(s) on auto/easytrax layer 12\n", st.ignored_keepout_element); } if (st.ignored_layer_zero_element) { - pcb_message(PCB_MSG_ERROR, "Ignored %d auto/easytrax layer zero feature(s)\n", st.ignored_layer_zero_element); + rnd_message(PCB_MSG_ERROR, "Ignored %d auto/easytrax layer zero feature(s)\n", st.ignored_layer_zero_element); } if (box != NULL) { @@ -1165,7 +1165,7 @@ Ptr->hidlib.size_y = box->Y2; } else - pcb_message(PCB_MSG_ERROR, "Can not determine board extents - empty board?\n"); + rnd_message(PCB_MSG_ERROR, "Can not determine board extents - empty board?\n"); /* we now flip the board about the X-axis, to invert the Y coords used by autotrax */ pcb_undo_freeze_add(); Index: write.c =================================================================== --- write.c (revision 30902) +++ write.c (revision 30903) @@ -43,7 +43,7 @@ typedef struct { pcb_layer_type_t lyt; - pcb_bool plane; + rnd_bool plane; } layer_map_t; /* The hardwired layer map of autotrax */ @@ -143,12 +143,12 @@ #define PCB_PSTK_COMPAT_RRECT 250 -static int wrax_padstack(wctx_t *ctx, pcb_pstk_t *ps, pcb_coord_t dx, pcb_coord_t dy, pcb_bool in_subc) +static int wrax_padstack(wctx_t *ctx, pcb_pstk_t *ps, rnd_coord_t dx, rnd_coord_t dy, rnd_bool in_subc) { const char *name; - pcb_coord_t x, y, drill_dia, pad_dia, clearance, mask, x1, y1, x2, y2, thickness, w, h; + rnd_coord_t x, y, drill_dia, pad_dia, clearance, mask, x1, y1, x2, y2, thickness, w, h; pcb_pstk_compshape_t cshape; - pcb_bool plated, square, nopaste; + rnd_bool plated, square, nopaste; int ashape, alayer; if (ps->term != NULL) { @@ -229,9 +229,9 @@ return 0; } -int wrax_data(wctx_t *ctx, pcb_data_t *data, pcb_coord_t dx, pcb_coord_t dy); +int wrax_data(wctx_t *ctx, pcb_data_t *data, rnd_coord_t dx, rnd_coord_t dy); -static int wrax_vias(wctx_t *ctx, pcb_data_t *Data, pcb_coord_t dx, pcb_coord_t dy, pcb_bool in_subc) +static int wrax_vias(wctx_t *ctx, pcb_data_t *Data, rnd_coord_t dx, rnd_coord_t dy, rnd_bool in_subc) { gdl_iterator_t it; pcb_pstk_t *ps; @@ -244,7 +244,7 @@ } /* writes generic autotrax track descriptor line for components and layouts */ -static int wrax_line(wctx_t *ctx, pcb_line_t *line, pcb_cardinal_t layer, pcb_coord_t dx, pcb_coord_t dy) +static int wrax_line(wctx_t *ctx, pcb_line_t *line, pcb_cardinal_t layer, rnd_coord_t dx, rnd_coord_t dy) { int user_routed = 1; pcb_fprintf(ctx->f, "%.0ml %.0ml %.0ml %.0ml %.0ml %d %d\r\n", line->Point1.X+dx, PCB->hidlib.size_y - (line->Point1.Y+dy), line->Point2.X+dx, PCB->hidlib.size_y - (line->Point2.Y+dy), line->Thickness, layer, user_routed); @@ -252,7 +252,7 @@ } /* writes autotrax track descriptor for a pair of polyline vertices */ -static int wrax_pline_segment(wctx_t *ctx, pcb_coord_t x1, pcb_coord_t y1, pcb_coord_t x2, pcb_coord_t y2, pcb_coord_t Thickness, pcb_cardinal_t layer) +static int wrax_pline_segment(wctx_t *ctx, rnd_coord_t x1, rnd_coord_t y1, rnd_coord_t x2, rnd_coord_t y2, rnd_coord_t Thickness, pcb_cardinal_t layer) { int user_routed = 1; pcb_fprintf(ctx->f, "FT\r\n%.0ml %.0ml %.0ml %.0ml %.0ml %d %d\r\n", x1, PCB->hidlib.size_y - y1, x2, PCB->hidlib.size_y - y2, Thickness, layer, user_routed); @@ -262,12 +262,12 @@ typedef struct { wctx_t *wctx; pcb_cardinal_t layer; - pcb_coord_t dx, dy; - pcb_coord_t thickness; + rnd_coord_t dx, dy; + rnd_coord_t thickness; } autotrax_hatch_ctx_t; -static void autotrax_hatch_cb(void *ctx_, pcb_coord_t x1, pcb_coord_t y1, pcb_coord_t x2, pcb_coord_t y2) +static void autotrax_hatch_cb(void *ctx_, rnd_coord_t x1, rnd_coord_t y1, rnd_coord_t x2, rnd_coord_t y2) { autotrax_hatch_ctx_t *hctx = (autotrax_hatch_ctx_t *) ctx_; wrax_pline_segment( @@ -277,7 +277,7 @@ } /* generates autotrax tracks to cross hatch a complex polygon being exported */ -static void autotrax_cpoly_hatch_lines(wctx_t *ctx, const pcb_poly_t *src, pcb_cpoly_hatchdir_t dir, pcb_coord_t period, pcb_coord_t thickness, pcb_cardinal_t layer, pcb_coord_t dx, pcb_coord_t dy) +static void autotrax_cpoly_hatch_lines(wctx_t *ctx, const pcb_poly_t *src, pcb_cpoly_hatchdir_t dir, rnd_coord_t period, rnd_coord_t thickness, pcb_cardinal_t layer, rnd_coord_t dx, rnd_coord_t dy) { autotrax_hatch_ctx_t hctx; @@ -331,9 +331,9 @@ } /* writes generic autotrax arc descriptor line for components and layouts */ -static int wrax_arc(wctx_t *ctx, pcb_arc_t *arc, int current_layer, pcb_coord_t dx, pcb_coord_t dy) +static int wrax_arc(wctx_t *ctx, pcb_arc_t *arc, int current_layer, rnd_coord_t dx, rnd_coord_t dy) { - pcb_coord_t radius; + rnd_coord_t radius; if (arc->Width > arc->Height) { radius = arc->Height; } @@ -373,7 +373,7 @@ } -static int wrax_lines(wctx_t *ctx, pcb_cardinal_t number, pcb_layer_t *layer, pcb_coord_t dx, pcb_coord_t dy, pcb_bool in_subc) +static int wrax_lines(wctx_t *ctx, pcb_cardinal_t number, pcb_layer_t *layer, rnd_coord_t dx, rnd_coord_t dy, rnd_bool in_subc) { gdl_iterator_t it; pcb_line_t *line; @@ -397,7 +397,7 @@ } /* writes autotrax arcs for layouts */ -static int wrax_arcs(wctx_t *ctx, pcb_cardinal_t number, pcb_layer_t *layer, pcb_coord_t dx, pcb_coord_t dy, pcb_bool in_subc) +static int wrax_arcs(wctx_t *ctx, pcb_cardinal_t number, pcb_layer_t *layer, rnd_coord_t dx, rnd_coord_t dy, rnd_bool in_subc) { gdl_iterator_t it; pcb_arc_t *arc; @@ -421,13 +421,13 @@ } /* writes generic autotrax text descriptor line layouts onl, since no text in .fp */ -static int wrax_text(wctx_t *ctx, pcb_cardinal_t number, pcb_layer_t *layer, pcb_coord_t dx, pcb_coord_t dy, pcb_bool in_subc) +static int wrax_text(wctx_t *ctx, pcb_cardinal_t number, pcb_layer_t *layer, rnd_coord_t dx, rnd_coord_t dy, rnd_bool in_subc) { pcb_font_t *myfont = pcb_font(PCB, 0, 1); - pcb_coord_t mHeight = myfont->MaxHeight; /* autotrax needs the width of the widest letter */ + rnd_coord_t mHeight = myfont->MaxHeight; /* autotrax needs the width of the widest letter */ int autotrax_mirrored = 0; /* 0 is not mirrored, +16 is mirrored */ - pcb_coord_t default_stroke_thickness, strokeThickness, textHeight; + rnd_coord_t default_stroke_thickness, strokeThickness, textHeight; int rotation; int local_flag; @@ -498,10 +498,10 @@ { int res, on_bottom = 0, silk_layer; pcb_box_t *box = &subc->BoundingBox; - pcb_coord_t xPos, yPos, yPos2, yPos3; + rnd_coord_t xPos, yPos, yPos2, yPos3; TODO("do not hardcode things like this, especially when actual data is available") - pcb_coord_t text_offset = PCB_MIL_TO_COORD(400); /* this gives good placement of refdes relative to element */ + rnd_coord_t text_offset = PCB_MIL_TO_COORD(400); /* this gives good placement of refdes relative to element */ TODO("rename these variables to something more expressive") TODO("instead of hardwiring coords, just read existing dyntex coords") @@ -544,7 +544,7 @@ } /* writes polygon data in autotrax fill (rectangle) format for use in a layout .PCB file */ -static int wrax_polygons(wctx_t *ctx, pcb_cardinal_t number, pcb_layer_t *layer, pcb_coord_t dx, pcb_coord_t dy, pcb_bool in_subc) +static int wrax_polygons(wctx_t *ctx, pcb_cardinal_t number, pcb_layer_t *layer, rnd_coord_t dx, rnd_coord_t dy, rnd_bool in_subc) { int i; gdl_iterator_t it; @@ -554,7 +554,7 @@ pcb_poly_it_t poly_it; pcb_polyarea_t *pa; - pcb_coord_t minx, miny, maxx, maxy; + rnd_coord_t minx, miny, maxx, maxy; /* write information about non empty layers */ if (!pcb_layer_is_empty_(PCB, layer)) { /*|| (layer->name && *layer->name)) { */ @@ -586,11 +586,11 @@ /* here we need to test for non rectangular polygons to flag imperfect export to easy/autotrax if (helper_clipped_polygon_type_function(clipped_thing)) { - pcb_message(PCB_MSG_ERROR, "Polygon exported as a bounding box only.\n"); + rnd_message(PCB_MSG_ERROR, "Polygon exported as a bounding box only.\n"); }*/ } else { - pcb_coord_t Thickness; + rnd_coord_t Thickness; Thickness = PCB_MIL_TO_COORD(10); autotrax_cpoly_hatch_lines(ctx, polygon, PCB_CPOLY_HATCH_HORIZONTAL | PCB_CPOLY_HATCH_VERTICAL, Thickness * 3, Thickness, current_layer, dx, dy); TODO("do we really need to reimplement this, can not cpoly_hatch_lines handle it?") @@ -630,10 +630,10 @@ return 0; } -int wrax_data(wctx_t *ctx, pcb_data_t *data, pcb_coord_t dx, pcb_coord_t dy) +int wrax_data(wctx_t *ctx, pcb_data_t *data, rnd_coord_t dx, rnd_coord_t dy) { int n; - pcb_bool in_subc = (data->parent_type == PCB_PARENT_SUBC); + rnd_bool in_subc = (data->parent_type == PCB_PARENT_SUBC); for(n = 0; n < data->LayerN; n++) { pcb_layer_t *ly = &data->Layer[n]; @@ -656,7 +656,7 @@ } /* writes autotrax PCB to file */ -int io_autotrax_write_pcb(pcb_plug_io_t *ctx, FILE *FP, const char *old_filename, const char *new_filename, pcb_bool emergency) +int io_autotrax_write_pcb(pcb_plug_io_t *ctx, FILE *FP, const char *old_filename, const char *new_filename, rnd_bool emergency) { wctx_t wctx; @@ -670,7 +670,7 @@ TODO("this is a bug - exporting to a file shall not change the content we are exporting") if (pcb_board_normalize(PCB) < 0) { - pcb_message(PCB_MSG_ERROR, "Unable to normalise layout prior to attempting export.\n"); + rnd_message(PCB_MSG_ERROR, "Unable to normalise layout prior to attempting export.\n"); return -1; } @@ -681,7 +681,7 @@ /* we sort out if the layout dimensions exceed the autotrax maxima */ if (PCB_COORD_TO_MIL(PCB->hidlib.size_x) > max_width_mil || PCB_COORD_TO_MIL(PCB->hidlib.size_y) > max_height_mil) { - pcb_message(PCB_MSG_ERROR, "Layout size exceeds protel autotrax 32000 mil x 32000 mil maximum."); + rnd_message(PCB_MSG_ERROR, "Layout size exceeds protel autotrax 32000 mil x 32000 mil maximum."); return -1; } Index: write.h =================================================================== --- write.h (revision 30902) +++ write.h (revision 30903) @@ -32,4 +32,4 @@ int io_autotrax_write_element(pcb_plug_io_t *ctx, FILE *FP, pcb_data_t *Data); int io_autotrax_write_buffer(pcb_plug_io_t *ctx, FILE *FP, pcb_buffer_t *buff); -int io_autotrax_write_pcb(pcb_plug_io_t *ctx, FILE *FP, const char *old_filename, const char *new_filename, pcb_bool emergency); +int io_autotrax_write_pcb(pcb_plug_io_t *ctx, FILE *FP, const char *old_filename, const char *new_filename, rnd_bool emergency);