Index: font.c =================================================================== --- font.c (revision 30902) +++ font.c (revision 30903) @@ -48,7 +48,7 @@ - height is the total net height from bottom to top (depends on number of lines) - yoffs is the vertical offset because of the baseline (does not depend on number of lines) */ -static font_size_res_t font_text_nominal_size(int font_id, const char *txt, pcb_coord_t *width, pcb_coord_t *height, pcb_coord_t *yoffs) +static font_size_res_t font_text_nominal_size(int font_id, const char *txt, rnd_coord_t *width, rnd_coord_t *height, rnd_coord_t *yoffs) { const char *s; double lw = 0; /* current line width */ Index: read.c =================================================================== --- read.c (revision 30902) +++ read.c (revision 30903) @@ -85,8 +85,8 @@ node_t *subtree; unsigned valid:1; /* whether it's already parsed */ unsigned plated:1; - pcb_coord_t dia; /* Should be zero when defining w,h slot */ - pcb_coord_t w,h; /* Slot width and height */ + rnd_coord_t dia; /* Should be zero when defining w,h slot */ + rnd_coord_t w,h; /* Slot width and height */ } hkp_hole_t; typedef struct { @@ -105,7 +105,7 @@ } hkp_clearance_type_t; typedef struct { - pcb_coord_t clearance[PCB_MAX_LAYER][HKP_CLR_max]; + rnd_coord_t clearance[PCB_MAX_LAYER][HKP_CLR_max]; } hkp_netclass_t; typedef struct { @@ -130,7 +130,7 @@ static void set_pstk_clearance(hkp_ctx_t *ctx, const hkp_netclass_t *nc, pcb_pstk_t *ps, node_t *errnd); /*** read_net.c ***/ -static pcb_coord_t net_get_clearance(hkp_ctx_t *ctx, pcb_layer_t *ly, const hkp_netclass_t *nc, hkp_clearance_type_t type, node_t *errnode); +static rnd_coord_t net_get_clearance(hkp_ctx_t *ctx, pcb_layer_t *ly, const hkp_netclass_t *nc, hkp_clearance_type_t type, node_t *errnode); /*** local ***/ static pcb_layer_t *parse_layer(hkp_ctx_t *ctx, pcb_subc_t *subc, const char *ln, int user, node_t *err_node); @@ -153,7 +153,7 @@ pcb_safe_append_vprintf(&str, 0, fmt, ap); va_end(ap); - pcb_message(PCB_MSG_ERROR, "%s", str.array); + rnd_message(PCB_MSG_ERROR, "%s", str.array); gds_uninit(&str); return -1; @@ -173,10 +173,10 @@ } /* parse a string it into a coord - modifies s; returns 0 on success */ -static int parse_coord(hkp_ctx_t *ctx, char *s, pcb_coord_t *crd) +static int parse_coord(hkp_ctx_t *ctx, char *s, rnd_coord_t *crd) { char *end; - pcb_bool suc; + rnd_bool suc; end = strchr(s, ','); if (end != NULL) @@ -186,15 +186,15 @@ return !suc; } -static int parse_x(hkp_ctx_t *ctx, char *s, pcb_coord_t *crd) +static int parse_x(hkp_ctx_t *ctx, char *s, rnd_coord_t *crd) { return parse_coord(ctx, s, crd); } -static int parse_y(hkp_ctx_t *ctx, char *s, pcb_coord_t *crd) +static int parse_y(hkp_ctx_t *ctx, char *s, rnd_coord_t *crd) { - pcb_coord_t tmp; + rnd_coord_t tmp; if (parse_coord(ctx, s, &tmp) != 0) return -1; *crd = -tmp; @@ -203,11 +203,11 @@ /* split s and parse it into (x,y) - modifies s */ -static int parse_xy(hkp_ctx_t *ctx, char *s, pcb_coord_t *x, pcb_coord_t *y, int xform) +static int parse_xy(hkp_ctx_t *ctx, char *s, rnd_coord_t *x, rnd_coord_t *y, int xform) { char *sy; - pcb_coord_t xx, yy; - pcb_bool suc1, suc2; + rnd_coord_t xx, yy; + rnd_bool suc1, suc2; if (s == NULL) return -1; @@ -232,11 +232,11 @@ } /* split s and parse it into (x,y,r) - modifies s */ -static int parse_xyr(hkp_ctx_t *ctx, char *s, pcb_coord_t *x, pcb_coord_t *y, pcb_coord_t *r, int xform) +static int parse_xyr(hkp_ctx_t *ctx, char *s, rnd_coord_t *x, rnd_coord_t *y, rnd_coord_t *r, int xform) { char *sy, *sr; - pcb_coord_t xx, yy, rr; - pcb_bool suc1, suc2, suc3; + rnd_coord_t xx, yy, rr; + rnd_bool suc1, suc2, suc3; if (s == NULL) return -1; @@ -327,7 +327,7 @@ static int parse_dwg_path_polyline(hkp_ctx_t *ctx, pcb_subc_t *subc, pcb_layer_t *ly, const hkp_netclass_t *nc, node_t *pp, int is_shape) { node_t *tmp; - pcb_coord_t th = 1, px, py, x, y; + rnd_coord_t th = 1, px, py, x, y; int n, filled = 0; DWG_REQ_LY(pp); @@ -362,7 +362,7 @@ pcb_poly_init_clip(ctx->pcb->Data, ly, poly); } else { /* "polyline" = a bunch of line objects */ - pcb_coord_t cl = net_get_clearance(ctx, ly, nc, HKP_CLR_POLY2TRACE, tmp) * 2; + rnd_coord_t cl = net_get_clearance(ctx, ly, nc, HKP_CLR_POLY2TRACE, tmp) * 2; if (parse_xy(ctx, tmp->argv[1], &px, &py, 1) != 0) return hkp_error(pp, "Failed to parse polyline start point (%s), can't place polygon\n", tmp->argv[1]); for(n = 2; n < tmp->argc; n++) { @@ -377,13 +377,13 @@ return 0; } -static void convert_arc(pcb_coord_t sx, pcb_coord_t sy, pcb_coord_t cx, pcb_coord_t cy, pcb_coord_t ex, pcb_coord_t ey, pcb_coord_t *r, double *sa, double *da) +static void convert_arc(rnd_coord_t sx, rnd_coord_t sy, rnd_coord_t cx, rnd_coord_t cy, rnd_coord_t ex, rnd_coord_t ey, rnd_coord_t *r, double *sa, double *da) { /* In pcb-rnd, start angle 0 is towards the left of the screen (-x direction)*/ /* da > 0 is counterclockwise */ /* In HKP format, r<0 means counterclockwise, r>0 means clockwise */ double ea; - pcb_coord_t srx, sry, erx, ery; /* relative x;y from the center for start and end */ + rnd_coord_t srx, sry, erx, ery; /* relative x;y from the center for start and end */ srx = -(sx - cx); sry = sy - cy; /* Since angle = 0 is towards -x, change sign to x part */ erx = -(ex - cx); ery = ey - cy; /* Since angle = 0 is towards -x, change sign to x part */ @@ -413,10 +413,10 @@ static int parse_dwg_path_polyarc(hkp_ctx_t *ctx, pcb_subc_t *subc, pcb_layer_t *ly, const hkp_netclass_t *nc, node_t *pp, int is_shape) { node_t *tmp; - pcb_coord_t th = 1, r, ex, ey, dummy, x, y, px, py; + rnd_coord_t th = 1, r, ex, ey, dummy, x, y, px, py; double sa, da; int n, filled = 0; - pcb_coord_t cl; + rnd_coord_t cl; DWG_REQ_LY(pp); @@ -475,7 +475,7 @@ static int parse_dwg_rect(hkp_ctx_t *ctx, pcb_subc_t *subc, pcb_layer_t *ly, const hkp_netclass_t *nc, node_t *rp, int is_shape) { node_t *tmp; - pcb_coord_t th = 1, x1, y1, x2, y2; + rnd_coord_t th = 1, x1, y1, x2, y2; int filled = 0; DWG_REQ_LY(rp); @@ -497,12 +497,12 @@ if (parse_xy(ctx, tmp->argv[2], &x2, &y2, 1) != 0) return hkp_error(tmp, "Failed to parse rect end point (%s), can't place rectangle\n", tmp->argv[2]); if (filled) { - pcb_coord_t cl = net_get_clearance(ctx, ly, nc, HKP_CLR_POLY2POLY, tmp) * 2; + rnd_coord_t cl = net_get_clearance(ctx, ly, nc, HKP_CLR_POLY2POLY, tmp) * 2; TODO("when to generate a rounded corner?"); pcb_poly_new_from_rectangle(ly, x1, y1, x2, y2, cl, DEFAULT_POLY_FLAG); } else { - pcb_coord_t cl = net_get_clearance(ctx, ly, nc, HKP_CLR_POLY2TRACE, tmp) * 2; + rnd_coord_t cl = net_get_clearance(ctx, ly, nc, HKP_CLR_POLY2TRACE, tmp) * 2; pcb_line_new(ly, x1, y1, x2, y1, th, cl, DEFAULT_OBJ_FLAG); pcb_line_new(ly, x2, y1, x2, y2, th, cl, DEFAULT_OBJ_FLAG); pcb_line_new(ly, x2, y2, x1, y2, th, cl, DEFAULT_OBJ_FLAG); @@ -514,8 +514,8 @@ static void parse_dwg_text(hkp_ctx_t *ctx, pcb_subc_t *subc, pcb_layer_t *ly, const hkp_netclass_t *nc, node_t *nt, int omit_on_silk, pcb_flag_values_t flg) { node_t *attr, *tmp; - pcb_coord_t tx, ty, h, thickness = 0, width = 0, height = 0, ymin = 0; - pcb_coord_t x1 = 0, x2 = 0, y1 = 0, y2 = 0; + rnd_coord_t tx, ty, h, thickness = 0, width = 0, height = 0, ymin = 0; + rnd_coord_t x1 = 0, x2 = 0, y1 = 0, y2 = 0; double rot = 0; unsigned long mirrored = 0; @@ -634,10 +634,10 @@ tmp = find_nth(attr->first_child, "VERT_JUST", 0); if (tmp != NULL) { - pcb_coord_t ymax = height+ymin; + rnd_coord_t ymax = height+ymin; TODO( "Consider rotation, using:" - " pcb_rotate(pcb_coord_t * x, pcb_coord_t * y, pcb_coord_t cx, pcb_coord_t cy, double cosa, double sina)" + " pcb_rotate(rnd_coord_t * x, rnd_coord_t * y, rnd_coord_t cx, rnd_coord_t cy, double cosa, double sina)" "Maybe:" " double sina = sin(-(double)rot / PCB_RAD_TO_DEG), cosa = cos(-(double)rot / PCB_RAD_TO_DEG);"); if (strcmp(tmp->argv[1], "Top") == 0) { @@ -660,7 +660,7 @@ { TODO("Remove this block after checking text bounding box calculations"); TODO("Use an UI layer for this. UI layer API in src/layer_ui.h"); - pcb_coord_t cl = net_get_clearance(ctx, ly, nc, HKP_CLR_POLY2TRACE, tmp) * 2; + rnd_coord_t cl = net_get_clearance(ctx, ly, nc, HKP_CLR_POLY2TRACE, tmp) * 2; pcb_line_new(ly, x1, y1, x2, y1, thickness, cl, DEFAULT_OBJ_FLAG); pcb_line_new(ly, x2, y1, x2, y2, thickness, cl, DEFAULT_OBJ_FLAG); pcb_line_new(ly, x2, y2, x1, y2, thickness, cl, DEFAULT_OBJ_FLAG); @@ -684,7 +684,7 @@ static void parse_dgw_via(hkp_ctx_t *ctx, const hkp_netclass_t *nc, node_t *nv) { - pcb_coord_t vx, vy; + rnd_coord_t vx, vy; node_t *tmp; hkp_pstk_t *hps; pcb_cardinal_t pid; @@ -1042,7 +1042,7 @@ { pcb_subc_t *subc; node_t *n; - pcb_coord_t ox, oy; + rnd_coord_t ox, oy; double rot = 0; int on_bottom = 0, seen_oxy = 0; const hkp_netclass_t *nc = NULL; @@ -1408,7 +1408,7 @@ flay = pcb_fopen(&pcb->hidlib, fn, "r"); if (flay == NULL) { - pcb_message(PCB_MSG_ERROR, "can't open layout hkp '%s' for read\n", fn); + rnd_message(PCB_MSG_ERROR, "can't open layout hkp '%s' for read\n", fn); goto err; } Index: read_net.c =================================================================== --- read_net.c (revision 30902) +++ read_net.c (revision 30903) @@ -28,7 +28,7 @@ */ -static pcb_coord_t net_get_clearance_(hkp_ctx_t *ctx, pcb_layer_id_t lid, const hkp_netclass_t *nc, hkp_clearance_type_t type, node_t *errnode) +static rnd_coord_t net_get_clearance_(hkp_ctx_t *ctx, pcb_layer_id_t lid, const hkp_netclass_t *nc, hkp_clearance_type_t type, node_t *errnode) { if ((lid < 0) || (lid >= PCB_MAX_LAYER)) { hkp_error(errnode, "failed to determine clearance, falling back to default value\n"); @@ -37,7 +37,7 @@ return ctx->nc_dflt.clearance[lid][type]; } -static pcb_coord_t net_get_clearance(hkp_ctx_t *ctx, pcb_layer_t *ly, const hkp_netclass_t *nc, hkp_clearance_type_t type, node_t *errnode) +static rnd_coord_t net_get_clearance(hkp_ctx_t *ctx, pcb_layer_t *ly, const hkp_netclass_t *nc, hkp_clearance_type_t type, node_t *errnode) { pcb_layer_id_t lid; @@ -60,7 +60,7 @@ fnc = pcb_fopen(&ctx->pcb->hidlib, fn, "r"); if (fnc == NULL) { - pcb_message(PCB_MSG_ERROR, "can't open netclass hkp '%s' for read\n", fn); + rnd_message(PCB_MSG_ERROR, "can't open netclass hkp '%s' for read\n", fn); return -1; } @@ -91,7 +91,7 @@ if (ncrs == NULL) { tree_destroy(&nc_tree); - pcb_message(PCB_MSG_ERROR, "netclass hkp '%s' does not contain any NET_CLASS_SCHEME/CLEARANCE_RULE_SET section\n", fn); + rnd_message(PCB_MSG_ERROR, "netclass hkp '%s' does not contain any NET_CLASS_SCHEME/CLEARANCE_RULE_SET section\n", fn); return -1; } @@ -99,7 +99,7 @@ for(ns = ncrs->first_child; ns != NULL; ns = ns->next) { pcb_layergrp_id_t gid; pcb_layergrp_t *grp; - pcb_coord_t val; + rnd_coord_t val; int i; if (strcmp(ns->argv[0], "SUBRULE") != 0) continue; @@ -144,7 +144,7 @@ fnet = pcb_fopen(&ctx->pcb->hidlib, fn, "r"); if (fnet == NULL) { - pcb_message(PCB_MSG_ERROR, "can't open netprops hkp '%s' for read\n", fn); + rnd_message(PCB_MSG_ERROR, "can't open netprops hkp '%s' for read\n", fn); return -1; } Index: read_pstk.c =================================================================== --- read_pstk.c (revision 30902) +++ read_pstk.c (revision 30903) @@ -27,7 +27,7 @@ * mailing list: pcb-rnd (at) list.repo.hu (send "subscribe") */ -static int parse_dia(hkp_ctx_t *ctx, node_t *roundn, pcb_coord_t *dia) +static int parse_dia(hkp_ctx_t *ctx, node_t *roundn, rnd_coord_t *dia) { node_t *hr = roundn->first_child; if ((hr == NULL) || (strcmp(hr->argv[0], "DIAMETER") != 0)) @@ -104,7 +104,7 @@ { const pcb_unit_t *old_unit; node_t *n, *on, *tmp; - pcb_coord_t ox = 0, oy = 0; + rnd_coord_t ox = 0, oy = 0; hkp_shape_t *s = htsp_get(&ctx->shapes, name); int has_shape = 0; @@ -125,7 +125,7 @@ for(n = s->subtree->first_child; n != NULL; n = n->next) { if (strcmp(n->argv[0], "ROUND") == 0) { - pcb_coord_t dia; + rnd_coord_t dia; SHAPE_CHECK_DUP; if (parse_dia(ctx, n, &dia) != 0) goto error; @@ -135,7 +135,7 @@ s->shp.data.circ.y = oy; } else if ((strcmp(n->argv[0], "RECTANGLE") == 0) || (strcmp(n->argv[0], "SQUARE") == 0)) { - pcb_coord_t w, h; + rnd_coord_t w, h; SHAPE_CHECK_DUP; tmp = find_nth(n->first_child, "WIDTH", 0); if (parse_coord(ctx, tmp->argv[1], &w) != 0) { @@ -160,7 +160,7 @@ s->shp.data.poly.x[3] = ox + w/2; s->shp.data.poly.y[3] = oy - h/2; } else if (strcmp(n->argv[0], "OBLONG") == 0) { - pcb_coord_t w, h; + rnd_coord_t w, h; SHAPE_CHECK_DUP; tmp = find_nth(n->first_child, "WIDTH", 0); if (parse_coord(ctx, tmp->argv[1], &w) != 0) { @@ -208,7 +208,7 @@ {NULL, 0} }; -static void slot_shape(pcb_pstk_shape_t *shape, pcb_coord_t sx, pcb_coord_t sy) +static void slot_shape(pcb_pstk_shape_t *shape, rnd_coord_t sx, rnd_coord_t sy) { shape->shape = PCB_PSSH_LINE; if (sx > sy) { /* horizontal */ @@ -230,7 +230,7 @@ static hkp_pstk_t *parse_pstk(hkp_ctx_t *ctx, const char *ps) { const pcb_unit_t *old_unit; - pcb_coord_t ox = 0, oy = 0; + rnd_coord_t ox = 0, oy = 0; node_t *n, *hn, *on, *tn; hkp_pstk_t *p = htsp_get(&ctx->pstks, ps); int top_only = 0; @@ -346,7 +346,7 @@ static void parse_pin(hkp_ctx_t *ctx, pcb_subc_t *subc, const hkp_netclass_t *nc, node_t *nd, int on_bottom) { node_t *tmp; - pcb_coord_t px, py; + rnd_coord_t px, py; hkp_pstk_t *hpstk; pcb_cardinal_t pid; pcb_pstk_t *ps; @@ -397,7 +397,7 @@ fpstk = pcb_fopen(&ctx->pcb->hidlib, fn, "r"); if (fpstk == NULL) { - pcb_message(PCB_MSG_ERROR, "can't open padstack hkp '%s' for read\n", fn); + rnd_message(PCB_MSG_ERROR, "can't open padstack hkp '%s' for read\n", fn); return -1; }