Index: read.c
===================================================================
--- read.c	(revision 30954)
+++ read.c	(revision 30955)
@@ -148,7 +148,7 @@
 
 	gds_append(&str, '\n');
 
-	rnd_message(PCB_MSG_ERROR, "%s", str.array);
+	rnd_message(RND_MSG_ERROR, "%s", str.array);
 
 	gds_uninit(&str);
 	return -1;
@@ -168,7 +168,7 @@
 
 	gds_append(&str, '\n');
 
-	rnd_message(PCB_MSG_WARNING, "%s", str.array);
+	rnd_message(RND_MSG_WARNING, "%s", str.array);
 
 	gds_uninit(&str);
 	return 0;
@@ -503,7 +503,7 @@
 		pcb_idx = kicad_get_layeridx(st, layer_name);
 		lnm = layer_name;
 		if (pcb_idx < 0) {
-			rnd_message(PCB_MSG_ERROR, "\tfp_* layer '%s' not found for module object, using unbound subc layer instead.\n", layer_name);
+			rnd_message(RND_MSG_ERROR, "\tfp_* layer '%s' not found for module object, using unbound subc layer instead.\n", layer_name);
 			lyt = PCB_LYT_VIRTUAL;
 			comb = 0;
 			return pcb_subc_get_layer(subc, lyt, comb, 1, lnm, pcb_true);
@@ -515,7 +515,7 @@
 		if (lid >= 0)
 			return &subc->data->Layer[lid];
 
-		rnd_message(PCB_MSG_ERROR, "\tfp_* layer '%s' not found for module object, using module layer '%s' instead.\n", layer_name, default_layer_name);
+		rnd_message(RND_MSG_ERROR, "\tfp_* layer '%s' not found for module object, using module layer '%s' instead.\n", layer_name, default_layer_name);
 		pcb_idx = kicad_get_layeridx(st, default_layer_name);
 		if (pcb_idx < 0)
 			return NULL;
@@ -1594,7 +1594,7 @@
 						case 3: (*th) |= PCB_THERMAL_ON | PCB_THERMAL_ROUND | PCB_THERMAL_DIAGONAL; break;
 					}
 					htpp_set(&poly_upd, p, p);
-					pcb_trace("CONN lid=%ld p=%p in %s style=%d\n", lid, p, pnet, zc->style);
+					rnd_trace("CONN lid=%ld p=%p in %s style=%d\n", lid, p, pnet, zc->style);
 				}
 			}
 		}
@@ -2777,7 +2777,7 @@
 	pcb_layer_auto_fixup(Ptr);
 
 	if (pcb_board_normalize(Ptr) > 0)
-		rnd_message(PCB_MSG_WARNING, "Had to make changes to the coords so that the design fits the board.\n");
+		rnd_message(RND_MSG_WARNING, "Had to make changes to the coords so that the design fits the board.\n");
 	pcb_layer_colors_from_conf(Ptr, 1);
 
 	{ /* free layer hack */
@@ -2822,13 +2822,13 @@
 
 	if (res != GSX_RES_EOE) {
 		if (!pcb_io_err_inhibit)
-			rnd_message(PCB_MSG_ERROR, "Error parsing s-expression '%s'\n", name);
+			rnd_message(RND_MSG_ERROR, "Error parsing s-expression '%s'\n", name);
 		gsxl_uninit(&st.dom);
 		return -1;
 	}
 
 	if ((st.dom.root->str == NULL) || (strcmp(st.dom.root->str, "module") != 0)) {
-		rnd_message(PCB_MSG_ERROR, "Wrong root node '%s', expected 'module'\n", st.dom.root->str);
+		rnd_message(RND_MSG_ERROR, "Wrong root node '%s', expected 'module'\n", st.dom.root->str);
 		gsxl_uninit(&st.dom);
 		return -1;
 	}
Index: read_net.c
===================================================================
--- read_net.c	(revision 30954)
+++ read_net.c	(revision 30955)
@@ -49,7 +49,7 @@
 #define if_strval(node, name) \
 	if (strcmp(node->str, #name) == 0) { \
 		if (name != NULL) { \
-			rnd_message(PCB_MSG_ERROR, "Invalid eeschema: multiple %s subtrees\n", #name); \
+			rnd_message(RND_MSG_ERROR, "Invalid eeschema: multiple %s subtrees\n", #name); \
 			return -1; \
 		} \
 		if (node->children != NULL) \
@@ -59,7 +59,7 @@
 #define if_subtree(node, name) \
 	if (strcmp(node->str, #name) == 0) { \
 		if (name != NULL) { \
-			rnd_message(PCB_MSG_ERROR, "Invalid eeschema: multiple %s subtrees\n", #name); \
+			rnd_message(RND_MSG_ERROR, "Invalid eeschema: multiple %s subtrees\n", #name); \
 			return -1; \
 		} \
 		name = node; \
@@ -67,7 +67,7 @@
 
 #define req_subtree(name) \
 	if (name == NULL) { \
-		rnd_message(PCB_MSG_ERROR, "Invalid eeschema: missing %s subtree\n", #name); \
+		rnd_message(RND_MSG_ERROR, "Invalid eeschema: missing %s subtree\n", #name); \
 		return -1; \
 	} \
 
@@ -78,7 +78,7 @@
 
 	/* check the header */
 	if (strcmp(dom->root->str, "export") != 0) {
-		rnd_message(PCB_MSG_ERROR, "Invalid eeschema netlist header: not an export\n");
+		rnd_message(RND_MSG_ERROR, "Invalid eeschema netlist header: not an export\n");
 		return -1;
 	}
 
@@ -93,7 +93,7 @@
 	req_subtree(nets);
 
 	if ((version->children == NULL) || (strcmp(version->children->str, "D") != 0)) {
-		rnd_message(PCB_MSG_ERROR, "Invalid eeschema version: expected 'D', got '%s'\n", version->children->str);
+		rnd_message(RND_MSG_ERROR, "Invalid eeschema version: expected 'D', got '%s'\n", version->children->str);
 		return -1;
 	}
 
@@ -110,11 +110,11 @@
 			else if_strval(n, footprint)
 		}
 		if (ref == NULL) {
-			rnd_message(PCB_MSG_WARNING, "eeschema: ignoring component with no refdes\n");
+			rnd_message(RND_MSG_WARNING, "eeschema: ignoring component with no refdes\n");
 			continue;
 		}
 		if (footprint == NULL) {
-			rnd_message(PCB_MSG_WARNING, "eeschema: ignoring component %s with no footprint\n", ref);
+			rnd_message(RND_MSG_WARNING, "eeschema: ignoring component %s with no footprint\n", ref);
 			continue;
 		}
 		rnd_actionva(&PCB->hidlib, "ElementList", "Need", ref, footprint, value == NULL ? "" : value, NULL);
@@ -154,13 +154,13 @@
 						netname = code;
 				}
 				if (netname == NULL) {
-					rnd_message(PCB_MSG_WARNING, "eeschema: ignoring pins of incomplete net\n");
+					rnd_message(RND_MSG_WARNING, "eeschema: ignoring pins of incomplete net\n");
 					continue;
 				}
 
 				/* do the binding */
 				if ((ref == NULL) || (pin == NULL)) {
-					rnd_message(PCB_MSG_WARNING, "eeschema: ignoring incomplete connection to net %s: refdes=%s pin=%s \n", netname, ref, pin);
+					rnd_message(RND_MSG_WARNING, "eeschema: ignoring incomplete connection to net %s: refdes=%s pin=%s \n", netname, ref, pin);
 					continue;
 				}
 				pcb_snprintf(refpin, sizeof(refpin), "%s-%s", ref, pin);
@@ -186,7 +186,7 @@
 
 	fn = pcb_fopen(&PCB->hidlib, fname_net, "r");
 	if (fn == NULL) {
-		rnd_message(PCB_MSG_ERROR, "can't open file '%s' for read\n", fname_net);
+		rnd_message(RND_MSG_ERROR, "can't open file '%s' for read\n", fname_net);
 		return -1;
 	}
 
@@ -276,7 +276,7 @@
 static int eeschema_import(pcb_plug_import_t *ctx, unsigned int aspects, const char **fns, int numfns)
 {
 	if (numfns != 1) {
-		rnd_message(PCB_MSG_ERROR, "import_eeschema: requires exactly 1 input file name\n");
+		rnd_message(RND_MSG_ERROR, "import_eeschema: requires exactly 1 input file name\n");
 		return -1;
 	}
 	return eeschema_load(fns[0]);
Index: write.c
===================================================================
--- write.c	(revision 30954)
+++ write.c	(revision 30955)
@@ -763,7 +763,7 @@
 
 TODO(": why the heck do we hardwire timestamps?!!?!?!")
 		fprintf(ctx->f, "%*s", ind, "");
-pcb_trace("copper layer=\n", copperLayer);
+rnd_trace("copper layer=\n", copperLayer);
 		pcb_fprintf(ctx->f, "(module %[4] (layer %s) (tedit 4E4C0E65) (tstamp 5127A136)\n", currentElementName, kicad_sexpr_layer_to_text(ctx, copperLayer));
 		fprintf(ctx->f, "%*s", ind + 2, "");
 		pcb_fprintf(ctx->f, "(at %.3mm %.3mm)\n", xPos, yPos);
@@ -848,7 +848,7 @@
 int io_kicad_write_subcs_head(pcb_plug_io_t *ctx, void **udata, FILE *f, int lib, long num_subcs)
 {
 	if ((lib) || (num_subcs > 1)) {
-		rnd_message(PCB_MSG_ERROR, "Can't save a library and/or multiple modules (footprints) in a single s-experssion mod file\n");
+		rnd_message(RND_MSG_ERROR, "Can't save a library and/or multiple modules (footprints) in a single s-experssion mod file\n");
 		return -1;
 	}
 	return 0;
@@ -1000,7 +1000,7 @@
 		}
 	}
 
-	rnd_message(PCB_MSG_ERROR, "io_kicad: internal error: can not find output outline layer for drawing the implicit outline\n");
+	rnd_message(RND_MSG_ERROR, "io_kicad: internal error: can not find output outline layer for drawing the implicit outline\n");
 }
 
 /* writes PCB to file in s-expression format */