Index: act.c
===================================================================
--- act.c	(revision 30954)
+++ act.c	(revision 30955)
@@ -64,7 +64,7 @@
 			if (pcb_get_selection_bbox(&sb, PCB->Data) > 0)
 				pcb_gui->zoom_win(pcb_gui, sb.X1, sb.Y1, sb.X2, sb.Y2, 1);
 			else
-				rnd_message(PCB_MSG_ERROR, "Can't zoom to selection: nothing selected\n");
+				rnd_message(RND_MSG_ERROR, "Can't zoom to selection: nothing selected\n");
 			return 0;
 		}
 
@@ -73,7 +73,7 @@
 			if (pcb_get_found_bbox(&sb, PCB->Data) > 0)
 				pcb_gui->zoom_win(pcb_gui, sb.X1, sb.Y1, sb.X2, sb.Y2, 1);
 			else
-				rnd_message(PCB_MSG_ERROR, "Can't zoom to 'found': nothing found\n");
+				rnd_message(RND_MSG_ERROR, "Can't zoom to 'found': nothing found\n");
 			return 0;
 		}
 	}
@@ -105,7 +105,7 @@
 	ycent = (double)(vb.Y1 + vb.Y2)/2.0;
 	xoffs = xcent - x;
 	yoffs = ycent - y;
-/*	pcb_trace("SwapSides: xy=%mm;%mm cent=%mm;%mm ofs=%mm;%mm\n", x, y, (rnd_coord_t)xcent, (rnd_coord_t)ycent, (rnd_coord_t)xoffs, (rnd_coord_t)yoffs);*/
+/*	rnd_trace("SwapSides: xy=%mm;%mm cent=%mm;%mm ofs=%mm;%mm\n", x, y, (rnd_coord_t)xcent, (rnd_coord_t)ycent, (rnd_coord_t)xoffs, (rnd_coord_t)yoffs);*/
 
 	if (pcb_layergrp_list(PCB, PCB_LYT_BOTTOM | PCB_LYT_COPPER, &solder_group, 1) > 0)
 		solder_on = pcb_get_layer(PCB->Data, PCB->LayerGroups.grp[solder_group].lid[0])->meta.real.vis;
@@ -174,7 +174,7 @@
 
 	pcb_draw_inhibit_dec();
 
-/*pcb_trace("-jump-> %mm;%mm -> %mm;%mm\n", x, y, (rnd_coord_t)(x + xoffs), (rnd_coord_t)(y + yoffs));*/
+/*rnd_trace("-jump-> %mm;%mm -> %mm;%mm\n", x, y, (rnd_coord_t)(x + xoffs), (rnd_coord_t)(y + yoffs));*/
 	pcb_gui->pan(pcb_gui, rnd_round(x + xoffs), rnd_round(y + yoffs), 0);
 	pcb_gui->set_crosshair(pcb_gui, x, y, HID_SC_PAN_VIEWPORT);
 
Index: layer_menu.c
===================================================================
--- layer_menu.c	(revision 30954)
+++ layer_menu.c	(revision 30955)
@@ -276,7 +276,7 @@
 
 static void timed_layer_menu_key_update_cb(pcb_hidval_t user_data)
 {
-/*	pcb_trace("************ layer key update timer!\n");*/
+/*	rnd_trace("************ layer key update timer!\n");*/
 	layer_install_menu_keys();
 	layer_menu_key_timer_active = 0;
 }
@@ -286,7 +286,7 @@
 {
 	pcb_hidval_t timerdata;
 
-/*	pcb_trace("************ layer key update ev!\n");*/
+/*	rnd_trace("************ layer key update ev!\n");*/
 
 	if ((pcb_gui == NULL) || (!pcb_gui->gui))
 		return;
Index: routest_dlg.c
===================================================================
--- routest_dlg.c	(revision 30954)
+++ routest_dlg.c	(revision 30955)
@@ -44,7 +44,7 @@
 	{ /* can be safely removed when route style switches over to padstacks */
 		pcb_route_style_t *rst = vtroutestyle_get(&PCB->RouteStyle, ctx->curr, 0);
 		if (rst->Diameter <= rst->Hole) {
-			rnd_message(PCB_MSG_ERROR, "had to increase the via ring diameter - can not be smaller than the hole");
+			rnd_message(RND_MSG_ERROR, "had to increase the via ring diameter - can not be smaller than the hole");
 			rst->Diameter = rst->Hole+PCB_MIL_TO_COORD(1);
 		}
 	}
@@ -121,7 +121,7 @@
 	pcb_hid_attr_val_t hv;
 
 	if (rst == NULL) {
-		rnd_message(PCB_MSG_ERROR, "route style does not exist");
+		rnd_message(RND_MSG_ERROR, "route style does not exist");
 		return;
 	}
 
@@ -158,7 +158,7 @@
 
 	}
 	else {
-		rnd_message(PCB_MSG_ERROR, "Internal error: route style field does not exist");
+		rnd_message(RND_MSG_ERROR, "Internal error: route style field does not exist");
 		return;
 	}
 
@@ -342,7 +342,7 @@
 	rnd_PCB_ACT_MAY_CONVARG(1, FGW_LONG, AdjustStyle, idx = argv[1].val.nat_long);
 
 	if (idx >= (long)vtroutestyle_len(&PCB->RouteStyle)) {
-		rnd_message(PCB_MSG_ERROR, "Invalid route style %ld index; max value: %ld\n", idx, vtroutestyle_len(&PCB->RouteStyle)-1);
+		rnd_message(RND_MSG_ERROR, "Invalid route style %ld index; max value: %ld\n", idx, vtroutestyle_len(&PCB->RouteStyle)-1);
 		RND_ACT_IRES(-1);
 		return 0;
 	}
@@ -350,7 +350,7 @@
 	if (idx < 0) {
 		idx = pcb_route_style_lookup(&PCB->RouteStyle, conf_core.design.line_thickness, conf_core.design.via_thickness, conf_core.design.via_drilling_hole, conf_core.design.clearance, NULL);
 		if (idx < 0) {
-			rnd_message(PCB_MSG_ERROR, "No style selected\n");
+			rnd_message(RND_MSG_ERROR, "No style selected\n");
 			RND_ACT_IRES(-1);
 		}
 	}