Index: read.c
===================================================================
--- read.c	(revision 30970)
+++ read.c	(revision 30971)
@@ -1387,7 +1387,7 @@
 static void layer_fixup(pcb_board_t *pcb)
 {
 	int n;
-	pcb_layergrp_id_t top_silk, bottom_silk;
+	rnd_layergrp_id_t top_silk, bottom_silk;
 	pcb_layergrp_t *g;
 
 	pcb_layergrp_inhibit_inc();
@@ -1404,7 +1404,7 @@
 
 	for(n = 0; n < pcb->Data->LayerN - 2; n++) {
 		pcb_layer_t *l = &pcb->Data->Layer[n];
-		pcb_layergrp_id_t grp = l->meta.real.grp;
+		rnd_layergrp_id_t grp = l->meta.real.grp;
 		/*rnd_trace("********* l=%d %s g=%ld (top=%ld bottom=%ld)\n", n, l->name, grp, top_silk, bottom_silk);*/
 		l->meta.real.grp = -1;
 
@@ -1442,7 +1442,7 @@
 /* outline layers did not have auto flkag back then but we need that now for padstack slots */
 static void outline_fixup(pcb_board_t *pcb)
 {
-	pcb_layer_id_t n;
+	rnd_layer_id_t n;
 	pcb_layergrp_inhibit_inc();
 
 	for(n = 0; n < pcb->Data->LayerN; n++) {
@@ -1458,8 +1458,8 @@
 
 static int validate_layer_stack_lyr(pcb_board_t *pcb, lht_node_t *loc)
 {
-	pcb_layer_id_t tmp[2], lid;
-	pcb_layergrp_id_t gid;
+	rnd_layer_id_t tmp[2], lid;
+	rnd_layergrp_id_t gid;
 		int n, found;
 
 	/* check layer->group cross-links */
@@ -1511,7 +1511,7 @@
 
 static int validate_layer_stack_grp(pcb_board_t *pcb, lht_node_t *loc)
 {
-	pcb_layergrp_id_t tmp[2];
+	rnd_layergrp_id_t tmp[2];
 
 	if (rdver == 1) { /*v1 required top and bottom silk */
 		if (pcb_layergrp_list(pcb, PCB_LYT_TOP | PCB_LYT_SILK, tmp, 2) < 1)
@@ -1536,7 +1536,7 @@
 
 	grps = lht_dom_hash_get(nd, "groups");
 	for(grp = lht_dom_first(&it, grps); grp != NULL; grp = lht_dom_next(&it)) {
-		pcb_layergrp_id_t gid;
+		rnd_layergrp_id_t gid;
 		pcb_layergrp_t *g;
 		char *end;
 		const char *prp;
@@ -1605,7 +1605,7 @@
 		layers = lht_dom_hash_get(grp, "layers");
 		if (layers != NULL) {
 			for(lyr = lht_dom_first(&itt, layers); lyr != NULL; lyr = lht_dom_next(&itt)) {
-				pcb_layer_id_t lid;
+				rnd_layer_id_t lid;
 				if (lyr->type != LHT_TEXT) {
 					iolht_error(lyr, "Invalid layer node type in group '%s' (ignoring the layer)\n", g->name);
 					continue;
Index: write.c
===================================================================
--- write.c	(revision 30970)
+++ write.c	(revision 30971)
@@ -920,7 +920,7 @@
 }
 
 
-static lht_node_t *build_data_layer(pcb_data_t *data, pcb_layer_t *layer, pcb_layergrp_id_t layer_group, pcb_layer_id_t lid)
+static lht_node_t *build_data_layer(pcb_data_t *data, pcb_layer_t *layer, rnd_layergrp_id_t layer_group, rnd_layer_id_t lid)
 {
 	lht_node_t *obj, *grp, *comb;
 	pcb_line_t *li;
@@ -1018,7 +1018,7 @@
 	layers = lht_dom_node_alloc(LHT_LIST, "layers");
 
 	if (wrver == 1) { /* produce an old layer group assignment from top to bottom (needed for v1, good for other versions too) */
-		pcb_layergrp_id_t gm, grp[PCB_MAX_LAYERGRP], gtop = -1, gbottom = -1;
+		rnd_layergrp_id_t gm, grp[PCB_MAX_LAYERGRP], gtop = -1, gbottom = -1;
 
 		gm = 0;
 		for(n = 0; n < pcb_max_group(PCB); n++) {
@@ -1053,7 +1053,7 @@
 		/* v1 needs to have silk at the end of the list */
 		for(n = 0; n < pcb_max_layer(PCB); n++) {
 			if ((pcb_layer_flags(PCB, n) & PCB_LYT_SILK) == 0) {
-				pcb_layergrp_id_t gid = pcb_layer_get_group(PCB, n);
+				rnd_layergrp_id_t gid = pcb_layer_get_group(PCB, n);
 				LAYER_GID_FIX_V1();
 				lht_dom_list_append(layers, build_data_layer(data, data->Layer+n, gid, n));
 			}
@@ -1060,7 +1060,7 @@
 		}
 		for(n = 0; n < pcb_max_layer(PCB); n++) {
 			if (pcb_layer_flags(PCB, n) & PCB_LYT_SILK) {
-				pcb_layer_id_t gid = pcb_layer_get_group(PCB, n);
+				rnd_layer_id_t gid = pcb_layer_get_group(PCB, n);
 				LAYER_GID_FIX_V1();
 				lht_dom_list_append(layers, build_data_layer(data, data->Layer+n, gid, n));
 			}
@@ -1069,7 +1069,7 @@
 	else {
 		/* keep the original order from v2, to minimize diffs */
 		for(n = 0; n < data->LayerN; n++) {
-			pcb_layergrp_id_t gid = pcb_layer_get_group(PCB, n);
+			rnd_layergrp_id_t gid = pcb_layer_get_group(PCB, n);
 			lht_dom_list_append(layers, build_data_layer(data, data->Layer+n, gid, n));
 		}
 	}
@@ -1751,7 +1751,7 @@
 	int ver;
 } io_lihata_save_t;
 
-void *io_lihata_save_as_subd_init(const pcb_plug_io_t *ctx, pcb_hid_dad_subdialog_t *sub, pcb_plug_iot_t type)
+void *io_lihata_save_as_subd_init(const pcb_plug_io_t *ctx, rnd_hid_dad_subdialog_t *sub, pcb_plug_iot_t type)
 {
 	io_lihata_save_t *save = calloc(sizeof(io_lihata_save_t), 1);
 
@@ -1781,7 +1781,7 @@
 	return save;
 }
 
-void io_lihata_save_as_subd_uninit(const pcb_plug_io_t *ctx, void *plg_ctx, pcb_hid_dad_subdialog_t *sub, rnd_bool apply)
+void io_lihata_save_as_subd_uninit(const pcb_plug_io_t *ctx, void *plg_ctx, rnd_hid_dad_subdialog_t *sub, rnd_bool apply)
 {
 	io_lihata_save_t *save = plg_ctx;
 
@@ -1803,7 +1803,7 @@
 	free(save);
 }
 
-void io_lihata_save_as_fmt_changed(const pcb_plug_io_t *ctx, void *plg_ctx, pcb_hid_dad_subdialog_t *sub)
+void io_lihata_save_as_fmt_changed(const pcb_plug_io_t *ctx, void *plg_ctx, rnd_hid_dad_subdialog_t *sub)
 {
 	io_lihata_save_t *save = plg_ctx;
 	save->ver = plug2ver(ctx);
Index: write.h
===================================================================
--- write.h	(revision 30970)
+++ write.h	(revision 30971)
@@ -38,6 +38,6 @@
 int io_lihata_write_subcs_subc(pcb_plug_io_t *ctx, void **udata, FILE *f, pcb_subc_t *subc);
 int io_lihata_write_subcs_tail(pcb_plug_io_t *ctx, void **udata, FILE *f);
 
-void *io_lihata_save_as_subd_init(const pcb_plug_io_t *ctx, pcb_hid_dad_subdialog_t *sub, pcb_plug_iot_t type);
-void io_lihata_save_as_subd_uninit(const pcb_plug_io_t *ctx, void *plg_ctx, pcb_hid_dad_subdialog_t *sub, rnd_bool apply);
-void io_lihata_save_as_fmt_changed(const pcb_plug_io_t *ctx, void *plg_ctx, pcb_hid_dad_subdialog_t *sub);
+void *io_lihata_save_as_subd_init(const pcb_plug_io_t *ctx, rnd_hid_dad_subdialog_t *sub, pcb_plug_iot_t type);
+void io_lihata_save_as_subd_uninit(const pcb_plug_io_t *ctx, void *plg_ctx, rnd_hid_dad_subdialog_t *sub, rnd_bool apply);
+void io_lihata_save_as_fmt_changed(const pcb_plug_io_t *ctx, void *plg_ctx, rnd_hid_dad_subdialog_t *sub);