Index: footprint.c
===================================================================
--- footprint.c	(revision 31006)
+++ footprint.c	(revision 31007)
@@ -56,10 +56,10 @@
 	rnd_coord_t x[4], y[4];
 
 	pcb_sqline_to_rect((pcb_line_t *)Pad, x, y);
-	pcb_fprintf(f, " %.9mm %.9mm", x[0] - cx, y[0] - cy);
-	pcb_fprintf(f, " %.9mm %.9mm", x[1] - cx, y[1] - cy);
-	pcb_fprintf(f, " %.9mm %.9mm", x[2] - cx, y[2] - cy);
-	pcb_fprintf(f, " %.9mm %.9mm", x[3] - cx, y[3] - cy);
+	rnd_fprintf(f, " %.9mm %.9mm", x[0] - cx, y[0] - cy);
+	rnd_fprintf(f, " %.9mm %.9mm", x[1] - cx, y[1] - cy);
+	rnd_fprintf(f, " %.9mm %.9mm", x[2] - cx, y[2] - cy);
+	rnd_fprintf(f, " %.9mm %.9mm", x[3] - cx, y[3] - cy);
 }
 
 #define elem_layer(elem, obj) \
@@ -121,7 +121,7 @@
 		return 1;
 	}
 	if (proto->hdia > 0)
-		pcb_fprintf(f, "	hole %s %mm %mm %mm %s\n", TERM_NAME(padstack->term), padstack->x - ox, padstack->y - oy, proto->hdia, proto->hplated ? "-" : "unplated");
+		rnd_fprintf(f, "	hole %s %mm %mm %mm %s\n", TERM_NAME(padstack->term), padstack->x - ox, padstack->y - oy, proto->hdia, proto->hplated ? "-" : "unplated");
 
 	tshp = pcb_pstk_get_tshape(padstack);
 	for(n = 0, shp = tshp->shape; n < tshp->len; n++,shp++) {
@@ -134,7 +134,7 @@
 			case PCB_PSSH_HSHADOW:
 				break;
 			case PCB_PSSH_CIRC:
-				pcb_fprintf(f, "	fillcircle %s %s %s %mm %mm %mm %mm\n", lloc, ltyp, TERM_NAME(padstack->term),
+				rnd_fprintf(f, "	fillcircle %s %s %s %mm %mm %mm %mm\n", lloc, ltyp, TERM_NAME(padstack->term),
 					padstack->x + shp->data.circ.x - ox, padstack->y + shp->data.circ.y - oy,
 					shp->data.circ.dia/2, clr);
 				break;
@@ -146,12 +146,12 @@
 					tmp.Point2.X = shp->data.line.x2 + padstack->x;
 					tmp.Point2.Y = shp->data.line.y2 + padstack->y;
 					tmp.Thickness = shp->data.line.thickness;
-					pcb_fprintf(f, "	polygon %s %s %s %mm 4", lloc, ltyp, TERM_NAME(padstack->term), clr);
+					rnd_fprintf(f, "	polygon %s %s %s %mm 4", lloc, ltyp, TERM_NAME(padstack->term), clr);
 					print_sqpad_coords(f, &tmp, ox, oy);
-					pcb_fprintf(f, "\n");
+					rnd_fprintf(f, "\n");
 				}
 				else {
-					pcb_fprintf(f, "	line %s %s %s %mm %mm %mm %mm %mm %mm\n", lloc, ltyp, TERM_NAME(padstack->term),
+					rnd_fprintf(f, "	line %s %s %s %mm %mm %mm %mm %mm %mm\n", lloc, ltyp, TERM_NAME(padstack->term),
 						shp->data.line.x1 + padstack->x - ox, shp->data.line.y1 + padstack->y - oy,
 						shp->data.line.x2 + padstack->x - ox, shp->data.line.y2 + padstack->y - oy,
 						shp->data.line.thickness, clr);
@@ -158,13 +158,13 @@
 				}
 				break;
 			case PCB_PSSH_POLY:
-				pcb_fprintf(f, "	polygon %s %s %s %.06mm %ld", lloc, ltyp, TERM_NAME(padstack->term),
+				rnd_fprintf(f, "	polygon %s %s %s %.06mm %ld", lloc, ltyp, TERM_NAME(padstack->term),
 					clr, shp->data.poly.len);
 				for(i = 0; i < shp->data.poly.len; i++)
-					pcb_fprintf(f, " %.06mm %.06mm",
+					rnd_fprintf(f, " %.06mm %.06mm",
 						shp->data.poly.x[i] + padstack->x - ox,
 						shp->data.poly.y[i] + padstack->y - oy);
-				pcb_fprintf(f, "\n");
+				rnd_fprintf(f, "\n");
 				break;
 		}
 	}
@@ -200,7 +200,7 @@
 			PCB_LINE_LOOP(ly)
 			{
 				if (line->term != NULL) print_terma(&terms, line->term, line);
-				pcb_fprintf(f, "	line %s %s %s %mm %mm %mm %mm %mm %mm\n", lloc, ltyp, TERM_NAME(line->term),
+				rnd_fprintf(f, "	line %s %s %s %mm %mm %mm %mm %mm %mm\n", lloc, ltyp, TERM_NAME(line->term),
 					line->Point1.X - ox, line->Point1.Y - oy, line->Point2.X - ox, line->Point2.Y - oy,
 					line->Thickness, line->Clearance);
 			}
@@ -209,7 +209,7 @@
 			PCB_ARC_LOOP(ly)
 			{
 				if (arc->term != NULL) print_terma(&terms, arc->term, arc);
-				pcb_fprintf(f, "	arc %s %s %s %mm %mm %mm %f %f %mm %mm\n", lloc, ltyp, TERM_NAME(arc->term),
+				rnd_fprintf(f, "	arc %s %s %s %mm %mm %mm %f %f %mm %mm\n", lloc, ltyp, TERM_NAME(arc->term),
 					arc->X - ox, arc->Y - oy, (arc->Width + arc->Height)/2, arc->StartAngle, arc->Delta,
 					arc->Thickness, arc->Clearance);
 			}
@@ -242,7 +242,7 @@
 				}
 
 				if (polygon->term != NULL) print_terma(&terms, polygon->term, polygon);
-				pcb_fprintf(f, "	polygon %s %s %s %.06mm %ld", lloc, ltyp, TERM_NAME(polygon->term),
+				rnd_fprintf(f, "	polygon %s %s %s %.06mm %ld", lloc, ltyp, TERM_NAME(polygon->term),
 					(PCB_FLAG_TEST(PCB_FLAG_CLEARPOLYPOLY, polygon) ? 0 : polygon->Clearance),
 					numpt);
 
@@ -250,8 +250,8 @@
 				pcb_poly_iterate_polyarea(polygon->Clipped, &it);
 				pcb_poly_contour(&it);
 				for(go = pcb_poly_vect_first(&it, &x, &y); go; go = pcb_poly_vect_next(&it, &x, &y))
-					pcb_fprintf(f, " %.06mm %.06mm", x - ox, y - oy);
-				pcb_fprintf(f, "\n");
+					rnd_fprintf(f, " %.06mm %.06mm", x - ox, y - oy);
+				rnd_fprintf(f, "\n");
 			}
 			PCB_END_LOOP;
 		}
Index: stackup.c
===================================================================
--- stackup.c	(revision 31006)
+++ stackup.c	(revision 31007)
@@ -156,7 +156,7 @@
 			save_prop(pcb, f, name, "fab-color", fab_color);
 		}
 		else {
-			char *title = pcb_strdup_printf("Unsupported group fab-color: %s", grp->name);
+			char *title = rnd_strdup_printf("Unsupported group fab-color: %s", grp->name);
 			pcb_io_incompat_save(pcb->Data, NULL, "stackup", title, "Only outer layer groups should have fab-color.");
 			free(title);
 		}
@@ -166,7 +166,7 @@
 			save_prop(pcb, f, name, "dielect", dielect);
 		}
 		else {
-			char *title = pcb_strdup_printf("Unsupported group dielect: %s", grp->name);
+			char *title = rnd_strdup_printf("Unsupported group dielect: %s", grp->name);
 			pcb_io_incompat_save(pcb->Data, NULL, "stackup", title, "Group type should not have dielect constant - only substrate layers should.");
 			free(title);
 		}
@@ -176,7 +176,7 @@
 			save_prop(pcb, f, name, "material", mat);
 		}
 		else {
-			char *title = pcb_strdup_printf("Unsupported group material: %s", grp->name);
+			char *title = rnd_strdup_printf("Unsupported group material: %s", grp->name);
 			pcb_io_incompat_save(pcb->Data, NULL, "stackup", title, "Group type should not have a material - only substrate layers should.");
 			free(title);
 		}
@@ -188,17 +188,17 @@
 			double th = rnd_get_value(thick, NULL, NULL, &succ);
 			if (succ) {
 				char tmp[64];
-				pcb_sprintf(tmp, "%mu", (rnd_coord_t)th);
+				rnd_sprintf(tmp, "%mu", (rnd_coord_t)th);
 				save_prop(pcb, f, name, "thickness", tmp);
 			}
 			else {
-				char *title = pcb_strdup_printf("Invalid thickness value: %s", grp->name);
+				char *title = rnd_strdup_printf("Invalid thickness value: %s", grp->name);
 				pcb_io_incompat_save(pcb->Data, NULL, "stackup", title, "Thicnkess value must be a numeric with an unit suffix, e.g. 0.7mm");
 				free(title);
 			}
 		}
 		else {
-			char *title = pcb_strdup_printf("Unsupported group thickness: %s", grp->name);
+			char *title = rnd_strdup_printf("Unsupported group thickness: %s", grp->name);
 			pcb_io_incompat_save(pcb->Data, NULL, "stackup", title, "Group type should not have a thickness - only substrate and copper layers should.");
 			free(title);
 		}
@@ -233,7 +233,7 @@
 			else if (grp->ltype & PCB_LYT_VIRTUAL) *lloc = "virtual";
 			else if ((grp->ltype & PCB_LYT_ANYWHERE) == 0) *lloc = "all";
 			else {
-				char *title = pcb_strdup_printf("Unsupported group loc: %s", grp->name);
+				char *title = rnd_strdup_printf("Unsupported group loc: %s", grp->name);
 				pcb_io_incompat_save(pcb->Data, NULL, "stackup", title, "The group is omitted from the output.");
 				free(title);
 				continue;
@@ -291,7 +291,7 @@
 		const tedax_layer_t *lt = tedax_layer_lookup_by_type(pcb, grp, &lloc);
 
 		if (lt == NULL) {
-			char *title = pcb_strdup_printf("Unsupported group: %s", grp->name);
+			char *title = rnd_strdup_printf("Unsupported group: %s", grp->name);
 			pcb_io_incompat_save(pcb->Data, NULL, "stackup", title, "Layer type/purpose/location is not supported by tEDAx, layer will be omitted from the save.");
 			free(title);
 			continue;
@@ -304,7 +304,7 @@
 		}
 
 		if (grp->len > 1) {
-			char *title = pcb_strdup_printf("Multilayer group: %s", grp->name);
+			char *title = rnd_strdup_printf("Multilayer group: %s", grp->name);
 			pcb_io_incompat_save(pcb->Data, NULL, "stackup", title, "All layers are merged into a single layer");
 			free(title);
 		}
Index: tboard.c
===================================================================
--- tboard.c	(revision 31006)
+++ tboard.c	(revision 31007)
@@ -52,10 +52,10 @@
 #include "tnetlist.h"
 
 #define ps2fpname(fpname, padstack) \
-	pcb_snprintf(fpname, sizeof(fpname), "ps_glob_%ld%s", padstack->protoi, (!!padstack->smirror) != (!!padstack->xmirror) ? "m" : "")
+	rnd_snprintf(fpname, sizeof(fpname), "ps_glob_%ld%s", padstack->protoi, (!!padstack->smirror) != (!!padstack->xmirror) ? "m" : "")
 
 #define subc2fpname(fpname, subc) \
-	pcb_snprintf(fpname, sizeof(fpname), "sc_glob_%ld", subc->ID)
+	rnd_snprintf(fpname, sizeof(fpname), "sc_glob_%ld", subc->ID)
 
 static int tedax_global_pstk_fwrite(pcb_board_t *pcb, FILE *f)
 {
@@ -149,22 +149,22 @@
 	fprintf(f, "\nbegin board v1 ");
 	tedax_fprint_escape(f, pcb->hidlib.name);
 	fputc('\n', f);
-	pcb_fprintf(f, " drawing_area 0 0 %.06mm %.06mm\n", pcb->hidlib.size_x, pcb->hidlib.size_y);
+	rnd_fprintf(f, " drawing_area 0 0 %.06mm %.06mm\n", pcb->hidlib.size_x, pcb->hidlib.size_y);
 	for(n = 0, a = pcb->Attributes.List; n < pcb->Attributes.Number; n++,a++) {
-		pcb_fprintf(f, " attr ");
+		rnd_fprintf(f, " attr ");
 		tedax_fprint_escape(f, a->name);
 		fputc(' ', f);
 		tedax_fprint_escape(f, a->value);
 		fputc('\n', f);
 	}
-	pcb_fprintf(f, " stackup %s\n", stackupid);
-	pcb_fprintf(f, " netlist %s\n", netlistid);
-	pcb_fprintf(f, " drc %s\n", drcid);
+	rnd_fprintf(f, " stackup %s\n", stackupid);
+	rnd_fprintf(f, " netlist %s\n", netlistid);
+	rnd_fprintf(f, " drc %s\n", drcid);
 
 	PCB_PADSTACK_LOOP(pcb->Data) {
 		char fpname[256];
 		ps2fpname(fpname, padstack);
-		pcb_fprintf(f, " place %ld %s %.06mm %.06mm %f %d via\n", padstack->ID, fpname, padstack->x, padstack->y, padstack->rot, !!padstack->smirror);
+		rnd_fprintf(f, " place %ld %s %.06mm %.06mm %f %d via\n", padstack->ID, fpname, padstack->x, padstack->y, padstack->rot, !!padstack->smirror);
 	}
 	PCB_END_LOOP;
 
@@ -193,7 +193,7 @@
 
 		subc2fpname(fpname, proto);
 		pcb_subc_get_host_trans(subc,  &tr, 0);
-		pcb_fprintf(f, " place %s %s %.06mm %.06mm %f %d comp\n", refdes, fpname, tr.ox, tr.oy, tr.rot, tr.on_bottom);
+		rnd_fprintf(f, " place %s %s %.06mm %.06mm %f %d comp\n", refdes, fpname, tr.ox, tr.oy, tr.rot, tr.on_bottom);
 
 		/* placement text */
 		PCB_TEXT_ALL_LOOP(subc->data) {
@@ -203,7 +203,7 @@
 					const char **lyname = (const char **)vtp0_get(&ctx.g2n, rl->meta.real.grp, 0);
 					if (lyname != NULL) {
 						gds_t tmp;
-						pcb_fprintf(f, " place_text %s %s %.06mm %.06mm %.06mm %.06mm %d %f ",
+						rnd_fprintf(f, " place_text %s %s %.06mm %.06mm %.06mm %.06mm %d %f ",
 							refdes, *lyname, text->bbox_naked.X1, text->bbox_naked.Y1, text->bbox_naked.X2, text->bbox_naked.Y2,
 							text->Scale, text->rot);
 						gds_init(&tmp);
@@ -220,12 +220,12 @@
 		/* placement attributes */
 		for(n = 0, a = subc->Attributes.List; n < subc->Attributes.Number; n++,a++) {
 			if ((strcmp(a->name, "footprint") == 0) || (strcmp(a->name, "value") == 0)) {
-				pcb_fprintf(f, " place_fattr %s %s ", refdes, a->name);
+				rnd_fprintf(f, " place_fattr %s %s ", refdes, a->name);
 				tedax_fprint_escape(f, a->value);
 				fputc('\n', f);
 			}
 			else {
-				pcb_fprintf(f, " place_attr %s ", refdes);
+				rnd_fprintf(f, " place_attr %s ", refdes);
 				tedax_fprint_escape(f, a->name);
 				fputc(' ', f);
 				tedax_fprint_escape(f, a->value);
Index: tdrc.c
===================================================================
--- tdrc.c	(revision 31006)
+++ tdrc.c	(revision 31007)
@@ -65,7 +65,7 @@
 		rnd_conf_native_t *nat = rnd_conf_get_field(r->conf);
 		if ((nat == NULL) || (nat->prop->src == NULL))
 			continue;
-		pcb_fprintf(f, " rule all %s %s %.06mm pcb_rnd_old_drc_from_conf\n", r->ttype, r->tkind, nat->val.coord[0]);
+		rnd_fprintf(f, " rule all %s %s %.06mm pcb_rnd_old_drc_from_conf\n", r->ttype, r->tkind, nat->val.coord[0]);
 	}
 
 	fprintf(f, "end drc\n");
Index: tetest.c
===================================================================
--- tetest.c	(revision 31006)
+++ tetest.c	(revision 31007)
@@ -113,9 +113,9 @@
 	fprintf(f, " ");
 	tedax_fprint_escape(f, term == NULL ? "-" : term);
 
-	pcb_fprintf(f, " %.06mm %.06mm %s round %.06mm %.06mm 0 ", ps->x + shx, ps->y + shy, sides(copper), dia, dia);
+	rnd_fprintf(f, " %.06mm %.06mm %s round %.06mm %.06mm 0 ", ps->x + shx, ps->y + shy, sides(copper), dia, dia);
 	if (proto->hdia > 0)
-		pcb_fprintf(f, "%s %.06mm ", proto->hplated ? "plated" : "unplated", proto->hdia);
+		rnd_fprintf(f, "%s %.06mm ", proto->hplated ? "plated" : "unplated", proto->hdia);
 	else
 		fprintf(f, "- - ");
 
Index: tlayer.c
===================================================================
--- tlayer.c	(revision 31006)
+++ tlayer.c	(revision 31007)
@@ -76,7 +76,7 @@
 				fprintf(f, "begin polyline v1 pllay_%ld_%ld_%ld\n", gid, polygon->ID, plid);
 				n = pl->Count;
 				for(v = pl->head, i = 0; i < n; v = v->next, i++)
-					pcb_fprintf(f, " v %.06mm %.06mm\n", v->point[0], v->point[1]);
+					rnd_fprintf(f, " v %.06mm %.06mm\n", v->point[0], v->point[1]);
 				fprintf(f, "end polyline\n");
 			}
 		} PCB_END_LOOP;
@@ -88,7 +88,7 @@
 		if (ly == NULL)
 			continue;
 		PCB_LINE_LOOP(ly) {
-			pcb_fprintf(f, " line %.06mm %.06mm %.06mm %.06mm %.06mm %.06mm\n",
+			rnd_fprintf(f, " line %.06mm %.06mm %.06mm %.06mm %.06mm %.06mm\n",
 				line->Point1.X, line->Point1.Y, line->Point2.X, line->Point2.Y,
 				line->Thickness, PCB_FLAG_TEST(PCB_FLAG_CLEARLINE, line) ? rnd_round(line->Clearance/2) : 0);
 		} PCB_END_LOOP;
@@ -102,12 +102,12 @@
 			pcb_arc_get_end(arc, 1, &ex, &ey);
 			clr = PCB_FLAG_TEST(PCB_FLAG_CLEARLINE, arc) ? rnd_round(arc->Clearance/2) : 0;
 
-			pcb_fprintf(f, " arc %.06mm %.06mm %.06mm %f %f %.06mm %.06mm ",
+			rnd_fprintf(f, " arc %.06mm %.06mm %.06mm %f %f %.06mm %.06mm ",
 				arc->X, arc->Y, arc->Width, arc->StartAngle, arc->Delta, arc->Thickness, clr);
-			pcb_fprintf(f, "%.06mm %.06mm %.06mm %.06mm\n", sx, sy, ex, ey);
+			rnd_fprintf(f, "%.06mm %.06mm %.06mm %.06mm\n", sx, sy, ex, ey);
 		} PCB_END_LOOP;
 		PCB_TEXT_LOOP(ly) {
-			pcb_fprintf(f, " text %.06mm %.06mm %.06mm %.06mm %d %f %.06mm ",
+			rnd_fprintf(f, " text %.06mm %.06mm %.06mm %.06mm %d %f %.06mm ",
 				text->bbox_naked.X1, text->bbox_naked.Y1, text->bbox_naked.X2, text->bbox_naked.Y2,
 				text->Scale, text->rot, PCB_FLAG_TEST(PCB_FLAG_CLEARLINE, text) ? 1 : 0);
 			tedax_fprint_escape(f, text->TextString);
@@ -116,7 +116,7 @@
 
 		PCB_POLY_LOOP(ly) {
 			for(pl = polygon->NoHoles, plid = 0; pl != NULL; pl = pl->next, plid++)
-				pcb_fprintf(f, " poly pllay_%ld_%ld_%ld 0 0\n", gid, polygon->ID, plid);
+				rnd_fprintf(f, " poly pllay_%ld_%ld_%ld 0 0\n", gid, polygon->ID, plid);
 		} PCB_END_LOOP;
 
 	}
Index: tnetlist.c
===================================================================
--- tnetlist.c	(revision 31006)
+++ tnetlist.c	(revision 31007)
@@ -214,7 +214,7 @@
 				fputc('\n', f);
 				continue;
 			}
-			pcb_fprintf(f, " comptag %s ", subc->refdes);
+			rnd_fprintf(f, " comptag %s ", subc->refdes);
 			tedax_fprint_escape(f, a->name);
 			fputc(' ', f);
 			tedax_fprint_escape(f, a->value);