Index: trunk/scconfig/Rev.h =================================================================== --- trunk/scconfig/Rev.h (revision 32119) +++ trunk/scconfig/Rev.h (revision 32120) @@ -1 +1 @@ -static const int myrev = 32113; +static const int myrev = 32120; Index: trunk/scconfig/Rev.tab =================================================================== --- trunk/scconfig/Rev.tab (revision 32119) +++ trunk/scconfig/Rev.tab (revision 32120) @@ -1,3 +1,4 @@ +32120 configure removing the old drc in favor of drc_query 32113 configure removing custom per hid attribute editor in favor of generic central propedit 32103 configure librnd DAD API transition (label cleanup) 32099 configure remove lesstif local dialog implementations: library, netlist Index: trunk/scconfig/plugins.h =================================================================== --- trunk/scconfig/plugins.h (revision 32119) +++ trunk/scconfig/plugins.h (revision 32120) @@ -34,7 +34,6 @@ plugin_def("draw_csect", "draw cross-section (layers)", sdisable, 1, 0) plugin_def("draw_fab", "fab layer in some exports", sbuildin, 1, 0) plugin_def("draw_fontsel", "font selection GUI", sdisable, 1, 0) -plugin_def("drc_orig", "the original DRC code", sdisable, 0, 0) plugin_def("drc_query", "query() based DRC", sbuildin, 1, 0) plugin_def("expfeat", "experimental features", sdisable, 1, 0) plugin_def("extedit", "edit with external program", sbuildin, 1, 0) @@ -148,7 +147,6 @@ plugin_dep("dialogs", "lib_hid_common", 0) plugin_dep("dialogs", "lib_hid_pcbui", 0) plugin_dep("draw_fab", "report", 0) -plugin_dep("drc_orig", "query", 0) plugin_dep("drc_query", "query", 0) plugin_dep("export_fidocadj", "lib_compat_help", 0) plugin_dep("export_gcode", "millpath", 0) Index: trunk/src_plugins/drc_orig/drc_orig_conf.h =================================================================== --- trunk/src_plugins/drc_orig/drc_orig_conf.h (revision 32119) +++ trunk/src_plugins/drc_orig/drc_orig_conf.h (nonexistent) @@ -1,14 +0,0 @@ -#ifndef PCB_DRC_ORIG_CONF_H -#define PCB_DRC_ORIG_CONF_H - -#include - -typedef struct { - const struct { - const struct { - RND_CFT_BOOLEAN disable; /* disable the whole engine */ - } drc_orig; - } plugins; -} conf_drc_orig_t; - -#endif Index: trunk/src_plugins/drc_orig/Plug.tmpasm =================================================================== --- trunk/src_plugins/drc_orig/Plug.tmpasm (revision 32119) +++ trunk/src_plugins/drc_orig/Plug.tmpasm (nonexistent) @@ -1,13 +0,0 @@ -put /local/pcb/mod {drc_orig} -put /local/pcb/mod/CONF {$(PLUGDIR)/drc_orig/drc_orig_conf.h} -put /local/pcb/mod/CONFFILE {drc_orig.conf} -put /local/pcb/mod/CONFVAR {drc_orig_conf_internal} -put /local/pcb/mod/OBJS [@ - $(PLUGDIR)/drc_orig/drc_orig.o -@] - -switch /local/pcb/drc_orig/controls - case {buildin} include /local/pcb/tmpasm/buildin; end; - case {plugin} include /local/pcb/tmpasm/plugin; end; - case {disable} include /local/pcb/tmpasm/disable; end; -end Index: trunk/src_plugins/drc_orig/drc_orig.c =================================================================== --- trunk/src_plugins/drc_orig/drc_orig.c (revision 32119) +++ trunk/src_plugins/drc_orig/drc_orig.c (nonexistent) @@ -1,409 +0,0 @@ -/* - * - * COPYRIGHT - * - * pcb-rnd, interactive printed circuit board design - * (this file is based on PCB, interactive printed circuit board design) - * Copyright (C) 1994,1995,1996, 2005 Thomas Nau - * Copyright (C) 2018 Tibor 'Igor2' Palinkas - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * Contact: - * Project page: http://repo.hu/projects/pcb-rnd - * lead developer: http://repo.hu/projects/pcb-rnd/contact.html - * mailing list: pcb-rnd (at) list.repo.hu (send "subscribe") - * - */ - -#include "config.h" - -#include "drc.h" -#include "view.h" -#include "data_it.h" -#include "conf_core.h" -#include "find.h" -#include "event.h" -#include -#include "layer_vis.h" - -#include "obj_arc_draw.h" -#include "obj_rat_draw.h" -#include "obj_line_draw.h" -#include "obj_text_draw.h" -#include "obj_poly_draw.h" -#include "obj_pstk_draw.h" - -#include "obj_subc_list.h" - -#include "../src_plugins/query/net_int.h" - -#include "drc_orig_conf.h" -#include "../src_plugins/drc_orig/conf_internal.c" - -static const char *drc_orig_cookie = "drc_orig"; - -conf_drc_orig_t conf_drc_orig; -#define DRC_ORIG_CONF_FN "drc_orig.conf" - -/* DRC clearance callback */ -static rnd_r_dir_t drc_callback(pcb_data_t *data, pcb_layer_t *layer, pcb_poly_t *polygon, int type, void *ptr1, void *ptr2, void *user_data) -{ - const char *message; - pcb_view_t *violation; - pcb_view_list_t *lst = user_data; - pcb_line_t *line = (pcb_line_t *)ptr2; - pcb_arc_t *arc = (pcb_arc_t *)ptr2; - pcb_pstk_t *ps = (pcb_pstk_t *)ptr2; - - switch (type) { - case PCB_OBJ_LINE: - if (pcb_obj_clearance_p2(line, polygon) < 2 * conf_core.design.bloat) { - message = "Line with insufficient clearance inside polygon"; - goto doIsBad; - } - break; - case PCB_OBJ_ARC: - if (pcb_obj_clearance_p2(arc, polygon) < 2 * conf_core.design.bloat) { - message = "Arc with insufficient clearance inside polygon"; - goto doIsBad; - } - break; - case PCB_OBJ_PSTK: - if (pcb_pstk_drc_check_clearance(ps, polygon, 2 * conf_core.design.bloat) != 0) { - message = "Padstack with insufficient clearance inside polygon"; - goto doIsBad; - } - break; - default: - rnd_message(RND_MSG_ERROR, "hace: Bad Plow object in callback\n"); - } - return RND_R_DIR_NOT_FOUND; - -doIsBad: - pcb_poly_invalidate_draw(layer, polygon); - pcb_draw_obj((pcb_any_obj_t *)ptr2); - violation = pcb_view_new(&PCB->hidlib, "short", message, "Circuits that are too close may bridge during imaging, etching,\n" "plating, or soldering processes resulting in a direct short."); - pcb_drc_set_data(violation, NULL, conf_core.design.bloat); - pcb_view_append_obj(violation, 0, (pcb_any_obj_t *)ptr2); - pcb_view_set_bbox_by_objs(PCB->Data, violation); - pcb_view_list_append(lst, violation); - return RND_R_DIR_NOT_FOUND; -} - -static int drc_text(pcb_view_list_t *lst, pcb_layer_t *layer, pcb_text_t *text, rnd_coord_t min_wid) -{ - pcb_view_t *violation; - - if (text->thickness == 0) - return 0; /* automatic thickness is always valid - ensured by the renderer */ - if (text->thickness < min_wid) { - pcb_text_invalidate_draw(layer, text); - violation = pcb_view_new(&PCB->hidlib, "thin", "Text thickness is too thin", "Process specifications dictate a minimum feature-width\nthat can reliably be reproduced"); - pcb_drc_set_data(violation, &text->thickness, min_wid); - pcb_view_append_obj(violation, 0, (pcb_any_obj_t *)text); - pcb_view_set_bbox_by_objs(PCB->Data, violation); - pcb_view_list_append(lst, violation); - } - return 0; -} - -/* announce shorted or broken net */ -static int drc_broken_cb(pcb_net_int_t *ctx, pcb_any_obj_t *new_obj, pcb_any_obj_t *arrived_from, pcb_found_conn_type_t ctype) -{ - pcb_view_t *violation; - pcb_view_list_t *lst = ctx->cb_data; - - if (ctx->shrunk) { - violation = pcb_view_new(&ctx->pcb->hidlib, "broken", "Potential for broken trace", "Insufficient overlap between objects can lead to broken tracks\ndue to registration errors with old wheel style photo-plotters."); - pcb_drc_set_data(violation, NULL, ctx->shrink); - } - else { - violation = pcb_view_new(&ctx->pcb->hidlib, "short", "Copper areas too close", "Circuits that are too close may bridge during imaging, etching,\nplating, or soldering processes resulting in a direct short."); - pcb_drc_set_data(violation, NULL, ctx->bloat); - } - pcb_view_append_obj(violation, 0, (pcb_any_obj_t *)new_obj); - pcb_view_append_obj(violation, 1, (pcb_any_obj_t *)arrived_from); - pcb_view_set_bbox_by_objs(ctx->data, violation); - pcb_view_list_append(lst, violation); - return 0; -} - -/* search short/breaks from subcircuit terminals; returns non-zero for cancel */ -static int drc_nets_from_subc_term(pcb_view_list_t *lst) -{ - unsigned long sofar = 0, total = pcb_subclist_length(&PCB->Data->subc); - - PCB_SUBC_LOOP(PCB->Data); - { - pcb_any_obj_t *o; - pcb_data_it_t it; - - if (rnd_hid_progress(sofar, total, "drc_orig: Checking nets from subc terminals...") != 0) - return 1; - for(o = pcb_data_first(&it, subc->data, PCB_OBJ_CLASS_REAL); o != NULL; o = pcb_data_next(&it)) { - if (o->term == NULL) /* only terminals can be starting point of DRC net checks */ - continue; - if (o->parent_type == PCB_PARENT_LAYER) { /* for layer objects, care about the ones on copper layers only */ - pcb_layer_type_t lyt = pcb_layer_flags_(o->parent.layer); - if (!(lyt & PCB_LYT_COPPER)) - continue; - } - pcb_net_integrity(PCB, o, conf_core.design.shrink, conf_core.design.bloat, drc_broken_cb, lst); - } - sofar++; - } - PCB_END_LOOP; - return 0; -} - -/* search short/breaks from non-subc padstacks; returns non-zero for cancel */ -static int drc_nets_from_pstk(pcb_view_list_t *lst) -{ - unsigned long sofar = 0, total = pcb_subclist_length(&PCB->Data->subc); - - PCB_PADSTACK_LOOP(PCB->Data); - { - if (rnd_hid_progress(sofar, total, "drc_orig: Checking nets from subc non-terminals...") != 0) - return 1; - - if ((padstack->term == NULL) && pcb_net_integrity(PCB, (pcb_any_obj_t *)padstack, conf_core.design.shrink, conf_core.design.bloat, drc_broken_cb, lst)) - break; - sofar++; - } - PCB_END_LOOP; - return 0; -} - - -/* text: check minimum widths */ -void drc_all_texts(pcb_view_list_t *lst) -{ - PCB_TEXT_COPPER_LOOP(PCB->Data); - { - if (drc_text(lst, layer, text, conf_core.design.min_wid)) - break; - } - PCB_ENDALL_LOOP; - - PCB_SILK_COPPER_LOOP(PCB->Data); - { - if (drc_text(lst, layer, text, conf_core.design.min_slk)) - break; - } - PCB_ENDALL_LOOP; -} - -/* copper lines: check minimum widths and polygon clearances */ -void drc_copper_lines(pcb_view_list_t *lst) -{ - pcb_view_t *violation; - - PCB_LINE_COPPER_LOOP(PCB->Data); - { - /* check line clearances in polygons */ - pcb_poly_plows(PCB->Data, PCB_OBJ_LINE, layer, line, drc_callback, lst); - if (line->Thickness < conf_core.design.min_wid) { - pcb_line_invalidate_draw(layer, line); - violation = pcb_view_new(&PCB->hidlib, "thin", "Line width is too thin", "Process specifications dictate a minimum feature-width\nthat can reliably be reproduced"); - pcb_drc_set_data(violation, &line->Thickness, conf_core.design.min_wid); - pcb_view_append_obj(violation, 0, (pcb_any_obj_t *)line); - pcb_view_set_bbox_by_objs(PCB->Data, violation); - pcb_view_list_append(lst, violation); - } - } - PCB_ENDALL_LOOP; -} - -/* copper arcs: check minimum widths and polygon clearances */ -void drc_copper_arcs(pcb_view_list_t *lst) -{ - pcb_view_t *violation; - - PCB_ARC_COPPER_LOOP(PCB->Data); - { - pcb_poly_plows(PCB->Data, PCB_OBJ_ARC, layer, arc, drc_callback, lst); - if (arc->Thickness < conf_core.design.min_wid) { - pcb_arc_invalidate_draw(layer, arc); - violation = pcb_view_new(&PCB->hidlib, "thin", "Arc width is too thin", "Process specifications dictate a minimum feature-width\nthat can reliably be reproduced"); - pcb_drc_set_data(violation, &arc->Thickness, conf_core.design.min_wid); - pcb_view_append_obj(violation, 0, (pcb_any_obj_t *)arc); - pcb_view_set_bbox_by_objs(PCB->Data, violation); - pcb_view_list_append(lst, violation); - } - } - PCB_ENDALL_LOOP; -} - -/* non-subc padstacks: check minimum ring and polygon clearances */ -void drc_global_pstks(pcb_view_list_t *lst) -{ - pcb_view_t *violation; - - PCB_PADSTACK_LOOP(PCB->Data); - { - rnd_coord_t ring = 0, hole = 0; - pcb_poly_plows(PCB->Data, PCB_OBJ_PSTK, padstack, padstack, drc_callback, lst); - pcb_pstk_drc_check_and_warn(padstack, &ring, &hole, conf_core.design.min_ring, conf_core.design.min_drill); - if ((ring > 0) || (hole > 0)) { - pcb_pstk_invalidate_draw(padstack); - if (ring) { - violation = pcb_view_new(&PCB->hidlib, "thin", "padstack annular ring too small", "Annular rings that are too small may erode during etching,\nresulting in a broken connection"); - pcb_drc_set_data(violation, &ring, conf_core.design.min_ring); - pcb_view_append_obj(violation, 0, (pcb_any_obj_t *)padstack); - pcb_view_set_bbox_by_objs(PCB->Data, violation); - pcb_view_list_append(lst, violation); - } - if (hole > 0) { - violation = pcb_view_new(&PCB->hidlib, "drill", "Padstack drill size is too small", "Process rules dictate the minimum drill size which can be used"); - pcb_drc_set_data(violation, &hole, conf_core.design.min_drill); - pcb_view_append_obj(violation, 0, (pcb_any_obj_t *)padstack); - pcb_view_set_bbox_by_objs(PCB->Data, violation); - pcb_view_list_append(lst, violation); - } - } - } - PCB_END_LOOP; -} - -/* check silkscreen minimum widths outside of subcircuits */ -void drc_global_silk_lines(pcb_view_list_t *lst) -{ - pcb_view_t *violation; - -TODO("DRC: need to check text and polygons too!") - PCB_LINE_SILK_LOOP(PCB->Data); - { - if (line->Thickness < conf_core.design.min_slk) { - pcb_line_invalidate_draw(layer, line); - violation = pcb_view_new(&PCB->hidlib, "thin", "Silk line is too thin", "Process specifications dictate a minimum silkscreen feature-width\nthat can reliably be reproduced"); - pcb_drc_set_data(violation, &line->Thickness, conf_core.design.min_slk); - pcb_view_append_obj(violation, 0, (pcb_any_obj_t *)line); - pcb_view_set_bbox_by_objs(PCB->Data, violation); - pcb_view_list_append(lst, violation); - } - } - PCB_ENDALL_LOOP; -} - -static void drc_beyond_extents(pcb_view_list_t *lst, pcb_data_t *data) -{ - pcb_any_obj_t *o; - pcb_data_it_t it; - pcb_view_t *violation; - - for(o = pcb_data_first(&it, data, PCB_OBJ_CLASS_REAL); o != NULL; o = pcb_data_next(&it)) { - const char *message = NULL; - rnd_coord_t measured, required; - - if (o->BoundingBox.X1 > PCB->hidlib.size_x) { - message = "Beyond the drawing area, to the right"; - measured = o->BoundingBox.X1; - required = PCB->hidlib.size_x; - } - else if (o->BoundingBox.Y1 > PCB->hidlib.size_y) { - message = "Beyond the drawing area, to the bottom"; - measured = o->BoundingBox.Y1; - required = PCB->hidlib.size_y; - } - else if (o->BoundingBox.X2 < 0) { - message = "Beyond the drawing area, to the left"; - measured = o->BoundingBox.X2; - required = 0; - } - else if (o->BoundingBox.Y2 < 0) { - message = "Beyond the drawing area, to the top"; - measured = o->BoundingBox.Y2; - required = 0; - } - - - if (message != NULL) { - violation = pcb_view_new(&PCB->hidlib, "beyond", message, "Object hard to edit or export because being outside of the drawing area."); - pcb_drc_set_data(violation, &measured, required); - pcb_view_append_obj(violation, 0, o); - pcb_view_set_bbox_by_objs(PCB->Data, violation); - pcb_view_list_append(lst, violation); - } - } -} - -static void pcb_drc_orig(rnd_hidlib_t *hidlib, void *user_data, int argc, rnd_event_arg_t argv[]) -{ - pcb_view_list_t *lst = &pcb_drc_lst; - - if (conf_drc_orig.plugins.drc_orig.disable) - return; - - pcb_layervis_save_stack(); - pcb_layervis_reset_stack(&PCB->hidlib); - rnd_event(&PCB->hidlib, PCB_EVENT_LAYERVIS_CHANGED, NULL); - - /* actual tests */ - rnd_hid_progress(0, 0, NULL); - if (drc_nets_from_subc_term(lst) != 0) goto out; - rnd_hid_progress(0, 0, NULL); - if (drc_nets_from_pstk(lst)) goto out; - - rnd_hid_progress(0, 0, NULL); - if (rnd_hid_progress(0, 6, "drc_orig: Checking objects: text")) goto out; - drc_all_texts(lst); - rnd_hid_progress(0, 0, NULL); - if (rnd_hid_progress(1, 6, "drc_orig: Checking objects: line")) goto out; - drc_copper_lines(lst); - rnd_hid_progress(0, 0, NULL); - if (rnd_hid_progress(2, 6, "drc_orig: Checking objects: arc")) goto out; - drc_copper_arcs(lst); - rnd_hid_progress(0, 0, NULL); - if (rnd_hid_progress(3, 6, "drc_orig: Checking objects: padstack")) goto out; - drc_global_pstks(lst); - rnd_hid_progress(0, 0, NULL); - if (rnd_hid_progress(4, 6, "drc_orig: Checking objects: extent")) goto out; - drc_beyond_extents(lst, PCB->Data); - rnd_hid_progress(0, 0, NULL); - if (rnd_hid_progress(5, 6, "drc_orig: Checking objects: silk")) goto out; - drc_global_silk_lines(lst); - - out:; - rnd_hid_progress(0, 0, NULL); - pcb_layervis_restore_stack(); - rnd_event(&PCB->hidlib, PCB_EVENT_LAYERVIS_CHANGED, NULL); - rnd_gui->invalidate_all(rnd_gui); -} - - - -int pplg_check_ver_drc_orig(int ver_needed) { return 0; } - -void pplg_uninit_drc_orig(void) -{ - rnd_event_unbind_allcookie(drc_orig_cookie); - rnd_conf_unreg_file(DRC_ORIG_CONF_FN, drc_orig_conf_internal); - rnd_conf_unreg_fields("plugins/drc_orig/"); -} - -int pplg_init_drc_orig(void) -{ - RND_API_CHK_VER; - rnd_event_bind(PCB_EVENT_DRC_RUN, pcb_drc_orig, NULL, drc_orig_cookie); - - rnd_conf_reg_file(DRC_ORIG_CONF_FN, drc_orig_conf_internal); -#define conf_reg(field,isarray,type_name,cpath,cname,desc,flags) \ - rnd_conf_reg_field(conf_drc_orig, field,isarray,type_name,cpath,cname,desc,flags); -#include "drc_orig_conf_fields.h" - - return 0; -} - Index: trunk/src_plugins/drc_orig/drc_orig.pup =================================================================== --- trunk/src_plugins/drc_orig/drc_orig.pup (revision 32119) +++ trunk/src_plugins/drc_orig/drc_orig.pup (nonexistent) @@ -1,6 +0,0 @@ -$class feature -$short the original DRC code -$long A few simple, hardwired Design Rule Checks. -default disable-all -dep query -autoload 1 Index: trunk/src_plugins/drc_orig/drc_orig.conf =================================================================== --- trunk/src_plugins/drc_orig/drc_orig.conf (revision 32119) +++ trunk/src_plugins/drc_orig/drc_orig.conf (nonexistent) @@ -1,9 +0,0 @@ -li:pcb-rnd-conf-v1 { - ha:overwrite { - ha:plugins { - ha:drc_orig { - disable=1 - } - } - } -} Index: trunk/src_plugins/drc_orig/Makefile =================================================================== --- trunk/src_plugins/drc_orig/Makefile (revision 32119) +++ trunk/src_plugins/drc_orig/Makefile (nonexistent) @@ -1,5 +0,0 @@ -all: - cd ../../src && $(MAKE) mod_drc_orig - -clean: - rm *.o *.so 2>/dev/null ; true Index: trunk/src_plugins/plugins_ALL.tmpasm =================================================================== --- trunk/src_plugins/plugins_ALL.tmpasm (revision 32119) +++ trunk/src_plugins/plugins_ALL.tmpasm (revision 32120) @@ -16,7 +16,6 @@ include {../src_plugins/draw_csect/Plug.tmpasm} include {../src_plugins/draw_fab/Plug.tmpasm} include {../src_plugins/draw_fontsel/Plug.tmpasm} -include {../src_plugins/drc_orig/Plug.tmpasm} include {../src_plugins/drc_query/Plug.tmpasm} include {../src_plugins/expfeat/Plug.tmpasm} include {../src_plugins/export_bom/Plug.tmpasm} Index: trunk/tests/drc_orig/cop_overlap.lht =================================================================== --- trunk/tests/drc_orig/cop_overlap.lht (revision 32119) +++ trunk/tests/drc_orig/cop_overlap.lht (nonexistent) @@ -1,633 +0,0 @@ -ha:pcb-rnd-board-v6 { - - li:styles { - ha:Signal { - diameter = 2.0mm - text_scale = 0 - text_thick = 0.0 - thickness = 10.0mil - hole = 31.5mil - clearance = 20.0mil - } - ha:Power { - diameter = 2.2mm - text_scale = 0 - text_thick = 0.0 - thickness = 20.0mil - hole = 1.0mm - clearance = 20.0mil - } - ha:Fat { - diameter = 137.8mil - text_scale = 0 - text_thick = 0.0 - thickness = 80.0mil - hole = 47.24mil - clearance = 25.0mil - } - ha:Sig-tight { - diameter = 64.0mil - text_scale = 0 - text_thick = 0.0 - thickness = 10.0mil - hole = 31.5mil - clearance = 12.0mil - } - } - - ha:meta { - ha:size { - thermal_scale = 0.500000 - x = 38.1mm - y = 38.1mm - } - ha:grid { - spacing = 25.0mil - offs_x = 0.0 - offs_y = 0.0 - } - } - - ha:data { - li:padstack_prototypes { - } - - li:objects { - ha:subc.115 { - ha:attributes { - value=1206 - footprint=Standard SMT resistor, capacitor etc - refdes=R1 - } - ha:data { - li:padstack_prototypes { - - ha:ps_proto_v6.0 { - hdia=0.0; hplated=0; htop=0; hbottom=0; - li:shape { - - ha:ps_shape_v4 { - ha:combining { } - ha:layer_mask { - copper = 1 - top = 1 - } - clearance=0.0 - li:ps_poly { - 0.649986mm - -0.94996mm - -0.649986mm - -0.94996mm - -0.649986mm - 0.94996mm - 0.649986mm - 0.94996mm - } - } - - ha:ps_shape_v4 { - ha:combining { sub=1; auto=1; } - ha:layer_mask { - top = 1 - mask = 1 - } - clearance=0.0 - li:ps_poly { - 0.726186mm - -1.02616mm - -0.726186mm - -1.02616mm - -0.726186mm - 1.02616mm - 0.726186mm - 1.02616mm - } - } - - ha:ps_shape_v4 { - ha:combining { auto=1; } - ha:layer_mask { - top = 1 - paste = 1 - } - clearance=0.0 - li:ps_poly { - 0.649986mm - -0.94996mm - -0.649986mm - -0.94996mm - -0.649986mm - 0.94996mm - 0.649986mm - 0.94996mm - } - } - } - } - } - - li:objects { - ha:padstack_ref.128 { - proto=0; x=525.0mil; y=26.035mm; rot=0.000000; xmirror=0; smirror=0; clearance=10.0mil; - ha:flags { - clearline=1 - } - - li:thermal { - } - - ha:attributes { - term=1 - name=1 - } - } - ha:padstack_ref.129 { - proto=0; x=26.035mm; y=26.035mm; rot=0.000000; xmirror=0; smirror=0; clearance=10.0mil; - ha:flags { - clearline=1 - } - - li:thermal { - } - - ha:attributes { - term=2 - name=2 - } - } - } - li:layers { - - ha:top-silk { - lid=0 - ha:combining { } - - li:objects { - } - ha:type { - silk = 1 - top = 1 - } - } - - ha:subc-aux { - lid=1 - ha:combining { } - - li:objects { - ha:line.116 { - x1=775.0mil; y1=26.035mm; x2=775.0mil; y2=26.035mm; thickness=0.1mm; clearance=0.0; - ha:attributes { - subc-role=pnp-origin - } - } - ha:line.119 { - x1=775.0mil; y1=26.035mm; x2=775.0mil; y2=26.035mm; thickness=0.1mm; clearance=0.0; - ha:attributes { - subc-role=origin - } - } - ha:line.122 { - x1=775.0mil; y1=26.035mm; x2=20.685mm; y2=26.035mm; thickness=0.1mm; clearance=0.0; - ha:attributes { - subc-role=x - } - } - ha:line.125 { - x1=775.0mil; y1=26.035mm; x2=775.0mil; y2=27.035mm; thickness=0.1mm; clearance=0.0; - ha:attributes { - subc-role=y - } - } - } - ha:type { - top = 1 - misc = 1 - virtual = 1 - } - } - } - } - uid = cnwkLs9zS/C9Q9TlEosAAAAB - } - ha:subc.131 { - ha:attributes { - value=1206 - footprint=Standard SMT resistor, capacitor etc - refdes=R2 - } - ha:data { - li:padstack_prototypes { - - ha:ps_proto_v6.0 { - hdia=0.0; hplated=0; htop=0; hbottom=0; - li:shape { - - ha:ps_shape_v4 { - ha:combining { } - ha:layer_mask { - copper = 1 - top = 1 - } - clearance=0.0 - li:ps_poly { - 0.649986mm - -0.94996mm - -0.649986mm - -0.94996mm - -0.649986mm - 0.94996mm - 0.649986mm - 0.94996mm - } - } - - ha:ps_shape_v4 { - ha:combining { sub=1; auto=1; } - ha:layer_mask { - top = 1 - mask = 1 - } - clearance=0.0 - li:ps_poly { - 0.726186mm - -1.02616mm - -0.726186mm - -1.02616mm - -0.726186mm - 1.02616mm - 0.726186mm - 1.02616mm - } - } - - ha:ps_shape_v4 { - ha:combining { auto=1; } - ha:layer_mask { - top = 1 - paste = 1 - } - clearance=0.0 - li:ps_poly { - 0.649986mm - -0.94996mm - -0.649986mm - -0.94996mm - -0.649986mm - 0.94996mm - 0.649986mm - 0.94996mm - } - } - } - } - } - - li:objects { - ha:padstack_ref.144 { - proto=0; x=525.0mil; y=525.0mil; rot=0.000000; xmirror=0; smirror=0; clearance=10.0mil; - ha:flags { - clearline=1 - } - - li:thermal { - } - - ha:attributes { - term=1 - name=1 - } - } - ha:padstack_ref.145 { - proto=0; x=26.035mm; y=525.0mil; rot=0.000000; xmirror=0; smirror=0; clearance=10.0mil; - ha:flags { - clearline=1 - } - - li:thermal { - } - - ha:attributes { - term=2 - name=2 - } - } - } - li:layers { - - ha:top-silk { - lid=0 - ha:combining { } - - li:objects { - } - ha:type { - silk = 1 - top = 1 - } - } - - ha:subc-aux { - lid=1 - ha:combining { } - - li:objects { - ha:line.132 { - x1=775.0mil; y1=525.0mil; x2=775.0mil; y2=525.0mil; thickness=0.1mm; clearance=0.0; - ha:attributes { - subc-role=pnp-origin - } - } - ha:line.135 { - x1=775.0mil; y1=525.0mil; x2=775.0mil; y2=525.0mil; thickness=0.1mm; clearance=0.0; - ha:attributes { - subc-role=origin - } - } - ha:line.138 { - x1=775.0mil; y1=525.0mil; x2=20.685mm; y2=525.0mil; thickness=0.1mm; clearance=0.0; - ha:attributes { - subc-role=x - } - } - ha:line.141 { - x1=775.0mil; y1=525.0mil; x2=775.0mil; y2=14.335mm; thickness=0.1mm; clearance=0.0; - ha:attributes { - subc-role=y - } - } - } - ha:type { - top = 1 - misc = 1 - virtual = 1 - } - } - } - } - uid = cnwkLs9zS/C9Q9TlEosAAAAB - } - } - li:layers { - - ha:top-sig { - lid=0 - group=3 - ha:combining { } - - li:objects { - ha:line.162 { - x1=26.035mm; y1=26.035mm; x2=26.035mm; y2=775.0mil; thickness=10.0mil; clearance=40.0mil; - ha:flags { - clearline=1 - } - } - ha:line.165 { - x1=26.035mm; y1=800.0mil; x2=26.035mm; y2=525.0mil; thickness=10.0mil; clearance=40.0mil; - ha:flags { - clearline=1 - } - } - ha:line.168 { - x1=525.0mil; y1=26.035mm; x2=525.0mil; y2=800.0mil; thickness=10.0mil; clearance=40.0mil; - ha:flags { - clearline=1 - } - } - ha:line.174 { - x1=525.0mil; y1=525.0mil; x2=525.0mil; y2=20.08632mm; thickness=10.0mil; clearance=40.0mil; - ha:flags { - clearline=1 - } - } - } - color = {#8b2323} - } - - ha:bottom-sig { - lid=1 - group=9 - ha:combining { } - - li:objects { - } - color = {#3a5fcd} - } - - ha:top-gnd { - lid=2 - group=3 - ha:combining { } - - li:objects { - } - color = {#104e8b} - } - - ha:bottom-gnd { - lid=3 - group=9 - ha:combining { } - - li:objects { - } - color = {#cd3700} - } - - ha:int-sig2 { - lid=4 - group=6 - ha:combining { } - - li:objects { - } - color = {#548b54} - } - - ha:outline { - lid=5 - group=8 - ha:combining { } - - li:objects { - } - color = {#00868b} - } - - ha:bottom-silk { - lid=6 - group=11 - ha:combining { auto=1; } - - li:objects { - } - color = {#000000} - } - - ha:top-silk { - lid=7 - group=1 - ha:combining { auto=1; } - - li:objects { - } - color = {#000000} - } - - ha:top-paste { - lid=8 - group=0 - ha:combining { auto=1; } - - li:objects { - } - color = {#cd00cd} - } - - ha:top-mask { - lid=9 - group=2 - ha:combining { sub=1; auto=1; } - - li:objects { - } - color = {#ff0000} - } - - ha:bottom-mask { - lid=10 - group=10 - ha:combining { sub=1; auto=1; } - - li:objects { - } - color = {#ff0000} - } - - ha:bottom-paste { - lid=11 - group=12 - ha:combining { auto=1; } - - li:objects { - } - color = {#cd00cd} - } - - ha:slot-plated { - lid=12 - group=13 - ha:combining { auto=1; } - - li:objects { - } - color = {#8b7355} - } - - ha:slot-unplated { - lid=13 - group=14 - ha:combining { auto=1; } - - li:objects { - } - color = {#00868b} - } - } - } - - - ha:netlists { - li:input { - - ha:A { - li:conn { R1-1; R2-1; } - } - ha:B { - li:conn { R1-2; R2-2; } - } - } - } - ha:layer_stack { - li:groups { - ha:0 { - name = top_paste - ha:type { top=1; paste=1; } - li:layers { 8; } - } - ha:1 { - name = top_silk - ha:type { silk=1; top=1; } - li:layers { 7; } - } - ha:2 { - name = top_mask - ha:type { top=1; mask=1; } - li:layers { 9; } - } - ha:3 { - name = top_copper - ha:type { copper=1; top=1; } - li:layers { 0; 2; } - } - ha:4 { - name = grp_4 - ha:type { substrate=1; intern=1; } - li:layers { } - } - ha:5 { - name = grp_6 - ha:type { intern=1; substrate=1; } - li:layers { } - } - ha:6 { - name = Intern - ha:type { intern=1; copper=1; } - li:layers { 4;} - } - ha:7 { - name = grp_8 - ha:type { intern=1; substrate=1; } - li:layers { } - } - ha:8 { - name = global_outline - ha:type { boundary=1; } - li:layers { 5;} - purpose = uroute - } - ha:9 { - name = bottom_copper - ha:type { bottom=1; copper=1; } - li:layers { 1; 3; } - } - ha:10 { - name = bottom_mask - ha:type { bottom=1; mask=1; } - li:layers { 10; } - } - ha:11 { - name = bottom_silk - ha:type { bottom=1; silk=1; } - li:layers { 6; } - } - ha:12 { - name = bottom_paste - ha:type { bottom=1; paste=1; } - li:layers { 11; } - } - ha:13 { - name = pmech - ha:type { mech=1; } - li:layers { 12; } - purpose = proute - } - ha:14 { - name = umech - ha:type { mech=1; } - li:layers { 13; } - purpose = uroute - } - } - } -} Index: trunk/tests/drc_orig/drc.sh =================================================================== --- trunk/tests/drc_orig/drc.sh (revision 32119) +++ trunk/tests/drc_orig/drc.sh (nonexistent) @@ -1,19 +0,0 @@ -#!/bin/sh - -ROOT=../.. -fn=`pwd`/$1 -cd $ROOT/src - -echo ' -DRC(dump) -' | ./pcb-rnd $fn -c plugins/drc_query/disable=1 -c plugins/drc_orig/disable=0 -c rc/quiet=1 -c rc/library_search_paths=/dev/null --gui batch | awk ' -/^V/ { print ""; next} -/^E/ { next} -{ - line=$0 - chr=substr(line, 1, 1) - sub("^.", "", line) - print chr, line -} - -' \ No newline at end of file Property changes on: trunk/tests/drc_orig/drc.sh ___________________________________________________________________ Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: trunk/tests/drc_orig/cop_overlap.ref =================================================================== --- trunk/tests/drc_orig/cop_overlap.ref (revision 32119) +++ trunk/tests/drc_orig/cop_overlap.ref (nonexistent) @@ -1,13 +0,0 @@ -W : Warning: footprint library list error on /dev/null - -T broken -t Potential for broken trace -B 12.5388 11.6949 14.1312 21.7264 mm -R 0.2286 mm - - -T broken -t Potential for broken trace -B 12.5388 18.8094 14.1312 27.5456 mm -R 0.2286 mm - Index: trunk/tests/drc_orig/cop_short.lht =================================================================== --- trunk/tests/drc_orig/cop_short.lht (revision 32119) +++ trunk/tests/drc_orig/cop_short.lht (nonexistent) @@ -1,627 +0,0 @@ -ha:pcb-rnd-board-v6 { - - li:styles { - ha:Signal { - diameter = 2.0mm - text_scale = 0 - text_thick = 0.0 - thickness = 10.0mil - hole = 31.5mil - clearance = 20.0mil - } - ha:Power { - diameter = 2.2mm - text_scale = 0 - text_thick = 0.0 - thickness = 20.0mil - hole = 1.0mm - clearance = 20.0mil - } - ha:Fat { - diameter = 137.8mil - text_scale = 0 - text_thick = 0.0 - thickness = 80.0mil - hole = 47.24mil - clearance = 25.0mil - } - ha:Sig-tight { - diameter = 64.0mil - text_scale = 0 - text_thick = 0.0 - thickness = 10.0mil - hole = 31.5mil - clearance = 12.0mil - } - } - - ha:meta { - ha:size { - thermal_scale = 0.500000 - x = 38.1mm - y = 38.1mm - } - ha:grid { - spacing = 25.0mil - offs_x = 0.0 - offs_y = 0.0 - } - } - - ha:data { - li:padstack_prototypes { - } - - li:objects { - ha:subc.115 { - ha:attributes { - value=1206 - footprint=Standard SMT resistor, capacitor etc - refdes=R1 - } - ha:data { - li:padstack_prototypes { - - ha:ps_proto_v6.0 { - hdia=0.0; hplated=0; htop=0; hbottom=0; - li:shape { - - ha:ps_shape_v4 { - ha:combining { } - ha:layer_mask { - copper = 1 - top = 1 - } - clearance=0.0 - li:ps_poly { - 0.649986mm - -0.94996mm - -0.649986mm - -0.94996mm - -0.649986mm - 0.94996mm - 0.649986mm - 0.94996mm - } - } - - ha:ps_shape_v4 { - ha:combining { sub=1; auto=1; } - ha:layer_mask { - top = 1 - mask = 1 - } - clearance=0.0 - li:ps_poly { - 0.726186mm - -1.02616mm - -0.726186mm - -1.02616mm - -0.726186mm - 1.02616mm - 0.726186mm - 1.02616mm - } - } - - ha:ps_shape_v4 { - ha:combining { auto=1; } - ha:layer_mask { - top = 1 - paste = 1 - } - clearance=0.0 - li:ps_poly { - 0.649986mm - -0.94996mm - -0.649986mm - -0.94996mm - -0.649986mm - 0.94996mm - 0.649986mm - 0.94996mm - } - } - } - } - } - - li:objects { - ha:padstack_ref.128 { - proto=0; x=525.0mil; y=26.035mm; rot=0.000000; xmirror=0; smirror=0; clearance=10.0mil; - ha:flags { - clearline=1 - } - - li:thermal { - } - - ha:attributes { - term=1 - name=1 - } - } - ha:padstack_ref.129 { - proto=0; x=26.035mm; y=26.035mm; rot=0.000000; xmirror=0; smirror=0; clearance=10.0mil; - ha:flags { - clearline=1 - } - - li:thermal { - } - - ha:attributes { - term=2 - name=2 - } - } - } - li:layers { - - ha:top-silk { - lid=0 - ha:combining { } - - li:objects { - } - ha:type { - silk = 1 - top = 1 - } - } - - ha:subc-aux { - lid=1 - ha:combining { } - - li:objects { - ha:line.116 { - x1=775.0mil; y1=26.035mm; x2=775.0mil; y2=26.035mm; thickness=0.1mm; clearance=0.0; - ha:attributes { - subc-role=pnp-origin - } - } - ha:line.119 { - x1=775.0mil; y1=26.035mm; x2=775.0mil; y2=26.035mm; thickness=0.1mm; clearance=0.0; - ha:attributes { - subc-role=origin - } - } - ha:line.122 { - x1=775.0mil; y1=26.035mm; x2=20.685mm; y2=26.035mm; thickness=0.1mm; clearance=0.0; - ha:attributes { - subc-role=x - } - } - ha:line.125 { - x1=775.0mil; y1=26.035mm; x2=775.0mil; y2=27.035mm; thickness=0.1mm; clearance=0.0; - ha:attributes { - subc-role=y - } - } - } - ha:type { - top = 1 - misc = 1 - virtual = 1 - } - } - } - } - uid = cnwkLs9zS/C9Q9TlEosAAAAB - } - ha:subc.131 { - ha:attributes { - value=1206 - footprint=Standard SMT resistor, capacitor etc - refdes=R2 - } - ha:data { - li:padstack_prototypes { - - ha:ps_proto_v6.0 { - hdia=0.0; hplated=0; htop=0; hbottom=0; - li:shape { - - ha:ps_shape_v4 { - ha:combining { } - ha:layer_mask { - copper = 1 - top = 1 - } - clearance=0.0 - li:ps_poly { - 0.649986mm - -0.94996mm - -0.649986mm - -0.94996mm - -0.649986mm - 0.94996mm - 0.649986mm - 0.94996mm - } - } - - ha:ps_shape_v4 { - ha:combining { sub=1; auto=1; } - ha:layer_mask { - top = 1 - mask = 1 - } - clearance=0.0 - li:ps_poly { - 0.726186mm - -1.02616mm - -0.726186mm - -1.02616mm - -0.726186mm - 1.02616mm - 0.726186mm - 1.02616mm - } - } - - ha:ps_shape_v4 { - ha:combining { auto=1; } - ha:layer_mask { - top = 1 - paste = 1 - } - clearance=0.0 - li:ps_poly { - 0.649986mm - -0.94996mm - -0.649986mm - -0.94996mm - -0.649986mm - 0.94996mm - 0.649986mm - 0.94996mm - } - } - } - } - } - - li:objects { - ha:padstack_ref.144 { - proto=0; x=525.0mil; y=525.0mil; rot=0.000000; xmirror=0; smirror=0; clearance=10.0mil; - ha:flags { - clearline=1 - } - - li:thermal { - } - - ha:attributes { - term=1 - name=1 - } - } - ha:padstack_ref.145 { - proto=0; x=26.035mm; y=525.0mil; rot=0.000000; xmirror=0; smirror=0; clearance=10.0mil; - ha:flags { - clearline=1 - } - - li:thermal { - } - - ha:attributes { - term=2 - name=2 - } - } - } - li:layers { - - ha:top-silk { - lid=0 - ha:combining { } - - li:objects { - } - ha:type { - silk = 1 - top = 1 - } - } - - ha:subc-aux { - lid=1 - ha:combining { } - - li:objects { - ha:line.132 { - x1=775.0mil; y1=525.0mil; x2=775.0mil; y2=525.0mil; thickness=0.1mm; clearance=0.0; - ha:attributes { - subc-role=pnp-origin - } - } - ha:line.135 { - x1=775.0mil; y1=525.0mil; x2=775.0mil; y2=525.0mil; thickness=0.1mm; clearance=0.0; - ha:attributes { - subc-role=origin - } - } - ha:line.138 { - x1=775.0mil; y1=525.0mil; x2=20.685mm; y2=525.0mil; thickness=0.1mm; clearance=0.0; - ha:attributes { - subc-role=x - } - } - ha:line.141 { - x1=775.0mil; y1=525.0mil; x2=775.0mil; y2=14.335mm; thickness=0.1mm; clearance=0.0; - ha:attributes { - subc-role=y - } - } - } - ha:type { - top = 1 - misc = 1 - virtual = 1 - } - } - } - } - uid = cnwkLs9zS/C9Q9TlEosAAAAB - } - } - li:layers { - - ha:top-sig { - lid=0 - group=3 - ha:combining { } - - li:objects { - ha:line.162 { - x1=525.0mil; y1=525.0mil; x2=525.0mil; y2=26.035mm; thickness=10.0mil; clearance=40.0mil; - ha:flags { - clearline=1 - } - } - ha:line.171 { - x1=536.0mil; y1=814.0mil; x2=26.035mm; y2=814.0mil; thickness=10.0mil; clearance=40.0mil; - ha:flags { - clearline=1 - } - } - ha:line.183 { - x1=26.035mm; y1=26.035mm; x2=26.035mm; y2=525.0mil; thickness=10.0mil; clearance=40.0mil; - ha:flags { - clearline=1 - } - } - } - color = {#8b2323} - } - - ha:bottom-sig { - lid=1 - group=9 - ha:combining { } - - li:objects { - } - color = {#3a5fcd} - } - - ha:top-gnd { - lid=2 - group=3 - ha:combining { } - - li:objects { - } - color = {#104e8b} - } - - ha:bottom-gnd { - lid=3 - group=9 - ha:combining { } - - li:objects { - } - color = {#cd3700} - } - - ha:int-sig2 { - lid=4 - group=6 - ha:combining { } - - li:objects { - } - color = {#548b54} - } - - ha:outline { - lid=5 - group=8 - ha:combining { } - - li:objects { - } - color = {#00868b} - } - - ha:bottom-silk { - lid=6 - group=11 - ha:combining { auto=1; } - - li:objects { - } - color = {#000000} - } - - ha:top-silk { - lid=7 - group=1 - ha:combining { auto=1; } - - li:objects { - } - color = {#000000} - } - - ha:top-paste { - lid=8 - group=0 - ha:combining { auto=1; } - - li:objects { - } - color = {#cd00cd} - } - - ha:top-mask { - lid=9 - group=2 - ha:combining { sub=1; auto=1; } - - li:objects { - } - color = {#ff0000} - } - - ha:bottom-mask { - lid=10 - group=10 - ha:combining { sub=1; auto=1; } - - li:objects { - } - color = {#ff0000} - } - - ha:bottom-paste { - lid=11 - group=12 - ha:combining { auto=1; } - - li:objects { - } - color = {#cd00cd} - } - - ha:slot-plated { - lid=12 - group=13 - ha:combining { auto=1; } - - li:objects { - } - color = {#8b7355} - } - - ha:slot-unplated { - lid=13 - group=14 - ha:combining { auto=1; } - - li:objects { - } - color = {#00868b} - } - } - } - - - ha:netlists { - li:input { - - ha:A { - li:conn { R1-1; R2-1; } - } - ha:B { - li:conn { R1-2; R2-2; } - } - } - } - ha:layer_stack { - li:groups { - ha:0 { - name = top_paste - ha:type { top=1; paste=1; } - li:layers { 8; } - } - ha:1 { - name = top_silk - ha:type { silk=1; top=1; } - li:layers { 7; } - } - ha:2 { - name = top_mask - ha:type { top=1; mask=1; } - li:layers { 9; } - } - ha:3 { - name = top_copper - ha:type { copper=1; top=1; } - li:layers { 0; 2; } - } - ha:4 { - name = grp_4 - ha:type { substrate=1; intern=1; } - li:layers { } - } - ha:5 { - name = grp_6 - ha:type { intern=1; substrate=1; } - li:layers { } - } - ha:6 { - name = Intern - ha:type { intern=1; copper=1; } - li:layers { 4;} - } - ha:7 { - name = grp_8 - ha:type { intern=1; substrate=1; } - li:layers { } - } - ha:8 { - name = global_outline - ha:type { boundary=1; } - li:layers { 5;} - purpose = uroute - } - ha:9 { - name = bottom_copper - ha:type { bottom=1; copper=1; } - li:layers { 1; 3; } - } - ha:10 { - name = bottom_mask - ha:type { bottom=1; mask=1; } - li:layers { 10; } - } - ha:11 { - name = bottom_silk - ha:type { bottom=1; silk=1; } - li:layers { 6; } - } - ha:12 { - name = bottom_paste - ha:type { bottom=1; paste=1; } - li:layers { 11; } - } - ha:13 { - name = pmech - ha:type { mech=1; } - li:layers { 12; } - purpose = proute - } - ha:14 { - name = umech - ha:type { mech=1; } - li:layers { 13; } - purpose = uroute - } - } - } -} Index: trunk/tests/drc_orig/cop_width.lht =================================================================== --- trunk/tests/drc_orig/cop_width.lht (revision 32119) +++ trunk/tests/drc_orig/cop_width.lht (nonexistent) @@ -1,621 +0,0 @@ -ha:pcb-rnd-board-v6 { - - li:styles { - ha:Signal { - diameter = 2.0mm - text_scale = 0 - text_thick = 0.0 - thickness = 10.0mil - hole = 31.5mil - clearance = 20.0mil - } - ha:Power { - diameter = 2.2mm - text_scale = 0 - text_thick = 0.0 - thickness = 20.0mil - hole = 1.0mm - clearance = 20.0mil - } - ha:Fat { - diameter = 137.8mil - text_scale = 0 - text_thick = 0.0 - thickness = 80.0mil - hole = 47.24mil - clearance = 25.0mil - } - ha:Sig-tight { - diameter = 64.0mil - text_scale = 0 - text_thick = 0.0 - thickness = 10.0mil - hole = 31.5mil - clearance = 12.0mil - } - } - - ha:meta { - ha:size { - thermal_scale = 0.500000 - x = 38.1mm - y = 38.1mm - } - ha:grid { - spacing = 25.0mil - offs_x = 0.0 - offs_y = 0.0 - } - } - - ha:data { - li:padstack_prototypes { - } - - li:objects { - ha:subc.115 { - ha:attributes { - value=1206 - footprint=Standard SMT resistor, capacitor etc - refdes=R1 - } - ha:data { - li:padstack_prototypes { - - ha:ps_proto_v6.0 { - hdia=0.0; hplated=0; htop=0; hbottom=0; - li:shape { - - ha:ps_shape_v4 { - ha:combining { } - ha:layer_mask { - copper = 1 - top = 1 - } - clearance=0.0 - li:ps_poly { - 0.649986mm - -0.94996mm - -0.649986mm - -0.94996mm - -0.649986mm - 0.94996mm - 0.649986mm - 0.94996mm - } - } - - ha:ps_shape_v4 { - ha:combining { sub=1; auto=1; } - ha:layer_mask { - top = 1 - mask = 1 - } - clearance=0.0 - li:ps_poly { - 0.726186mm - -1.02616mm - -0.726186mm - -1.02616mm - -0.726186mm - 1.02616mm - 0.726186mm - 1.02616mm - } - } - - ha:ps_shape_v4 { - ha:combining { auto=1; } - ha:layer_mask { - top = 1 - paste = 1 - } - clearance=0.0 - li:ps_poly { - 0.649986mm - -0.94996mm - -0.649986mm - -0.94996mm - -0.649986mm - 0.94996mm - 0.649986mm - 0.94996mm - } - } - } - } - } - - li:objects { - ha:padstack_ref.128 { - proto=0; x=525.0mil; y=26.035mm; rot=0.000000; xmirror=0; smirror=0; clearance=10.0mil; - ha:flags { - clearline=1 - } - - li:thermal { - } - - ha:attributes { - term=1 - name=1 - } - } - ha:padstack_ref.129 { - proto=0; x=26.035mm; y=26.035mm; rot=0.000000; xmirror=0; smirror=0; clearance=10.0mil; - ha:flags { - clearline=1 - } - - li:thermal { - } - - ha:attributes { - term=2 - name=2 - } - } - } - li:layers { - - ha:top-silk { - lid=0 - ha:combining { } - - li:objects { - } - ha:type { - silk = 1 - top = 1 - } - } - - ha:subc-aux { - lid=1 - ha:combining { } - - li:objects { - ha:line.116 { - x1=775.0mil; y1=26.035mm; x2=775.0mil; y2=26.035mm; thickness=0.1mm; clearance=0.0; - ha:attributes { - subc-role=pnp-origin - } - } - ha:line.119 { - x1=775.0mil; y1=26.035mm; x2=775.0mil; y2=26.035mm; thickness=0.1mm; clearance=0.0; - ha:attributes { - subc-role=origin - } - } - ha:line.122 { - x1=775.0mil; y1=26.035mm; x2=20.685mm; y2=26.035mm; thickness=0.1mm; clearance=0.0; - ha:attributes { - subc-role=x - } - } - ha:line.125 { - x1=775.0mil; y1=26.035mm; x2=775.0mil; y2=27.035mm; thickness=0.1mm; clearance=0.0; - ha:attributes { - subc-role=y - } - } - } - ha:type { - top = 1 - misc = 1 - virtual = 1 - } - } - } - } - uid = cnwkLs9zS/C9Q9TlEosAAAAB - } - ha:subc.131 { - ha:attributes { - value=1206 - footprint=Standard SMT resistor, capacitor etc - refdes=R2 - } - ha:data { - li:padstack_prototypes { - - ha:ps_proto_v6.0 { - hdia=0.0; hplated=0; htop=0; hbottom=0; - li:shape { - - ha:ps_shape_v4 { - ha:combining { } - ha:layer_mask { - copper = 1 - top = 1 - } - clearance=0.0 - li:ps_poly { - 0.649986mm - -0.94996mm - -0.649986mm - -0.94996mm - -0.649986mm - 0.94996mm - 0.649986mm - 0.94996mm - } - } - - ha:ps_shape_v4 { - ha:combining { sub=1; auto=1; } - ha:layer_mask { - top = 1 - mask = 1 - } - clearance=0.0 - li:ps_poly { - 0.726186mm - -1.02616mm - -0.726186mm - -1.02616mm - -0.726186mm - 1.02616mm - 0.726186mm - 1.02616mm - } - } - - ha:ps_shape_v4 { - ha:combining { auto=1; } - ha:layer_mask { - top = 1 - paste = 1 - } - clearance=0.0 - li:ps_poly { - 0.649986mm - -0.94996mm - -0.649986mm - -0.94996mm - -0.649986mm - 0.94996mm - 0.649986mm - 0.94996mm - } - } - } - } - } - - li:objects { - ha:padstack_ref.144 { - proto=0; x=525.0mil; y=525.0mil; rot=0.000000; xmirror=0; smirror=0; clearance=10.0mil; - ha:flags { - clearline=1 - } - - li:thermal { - } - - ha:attributes { - term=1 - name=1 - } - } - ha:padstack_ref.145 { - proto=0; x=26.035mm; y=525.0mil; rot=0.000000; xmirror=0; smirror=0; clearance=10.0mil; - ha:flags { - clearline=1 - } - - li:thermal { - } - - ha:attributes { - term=2 - name=2 - } - } - } - li:layers { - - ha:top-silk { - lid=0 - ha:combining { } - - li:objects { - } - ha:type { - silk = 1 - top = 1 - } - } - - ha:subc-aux { - lid=1 - ha:combining { } - - li:objects { - ha:line.132 { - x1=775.0mil; y1=525.0mil; x2=775.0mil; y2=525.0mil; thickness=0.1mm; clearance=0.0; - ha:attributes { - subc-role=pnp-origin - } - } - ha:line.135 { - x1=775.0mil; y1=525.0mil; x2=775.0mil; y2=525.0mil; thickness=0.1mm; clearance=0.0; - ha:attributes { - subc-role=origin - } - } - ha:line.138 { - x1=775.0mil; y1=525.0mil; x2=20.685mm; y2=525.0mil; thickness=0.1mm; clearance=0.0; - ha:attributes { - subc-role=x - } - } - ha:line.141 { - x1=775.0mil; y1=525.0mil; x2=775.0mil; y2=14.335mm; thickness=0.1mm; clearance=0.0; - ha:attributes { - subc-role=y - } - } - } - ha:type { - top = 1 - misc = 1 - virtual = 1 - } - } - } - } - uid = cnwkLs9zS/C9Q9TlEosAAAAB - } - } - li:layers { - - ha:top-sig { - lid=0 - group=3 - ha:combining { } - - li:objects { - ha:line.162 { - x1=525.0mil; y1=525.0mil; x2=525.0mil; y2=26.035mm; thickness=0.001mm; clearance=40.0mil; - ha:flags { - clearline=1 - } - } - ha:line.165 { - x1=26.035mm; y1=525.0mil; x2=26.035mm; y2=26.035mm; thickness=10.0mil; clearance=40.0mil; - ha:flags { - clearline=1 - } - } - } - color = {#8b2323} - } - - ha:bottom-sig { - lid=1 - group=9 - ha:combining { } - - li:objects { - } - color = {#3a5fcd} - } - - ha:top-gnd { - lid=2 - group=3 - ha:combining { } - - li:objects { - } - color = {#104e8b} - } - - ha:bottom-gnd { - lid=3 - group=9 - ha:combining { } - - li:objects { - } - color = {#cd3700} - } - - ha:int-sig2 { - lid=4 - group=6 - ha:combining { } - - li:objects { - } - color = {#548b54} - } - - ha:outline { - lid=5 - group=8 - ha:combining { } - - li:objects { - } - color = {#00868b} - } - - ha:bottom-silk { - lid=6 - group=11 - ha:combining { auto=1; } - - li:objects { - } - color = {#000000} - } - - ha:top-silk { - lid=7 - group=1 - ha:combining { auto=1; } - - li:objects { - } - color = {#000000} - } - - ha:top-paste { - lid=8 - group=0 - ha:combining { auto=1; } - - li:objects { - } - color = {#cd00cd} - } - - ha:top-mask { - lid=9 - group=2 - ha:combining { sub=1; auto=1; } - - li:objects { - } - color = {#ff0000} - } - - ha:bottom-mask { - lid=10 - group=10 - ha:combining { sub=1; auto=1; } - - li:objects { - } - color = {#ff0000} - } - - ha:bottom-paste { - lid=11 - group=12 - ha:combining { auto=1; } - - li:objects { - } - color = {#cd00cd} - } - - ha:slot-plated { - lid=12 - group=13 - ha:combining { auto=1; } - - li:objects { - } - color = {#8b7355} - } - - ha:slot-unplated { - lid=13 - group=14 - ha:combining { auto=1; } - - li:objects { - } - color = {#00868b} - } - } - } - - - ha:netlists { - li:input { - - ha:A { - li:conn { R1-1; R2-1; } - } - ha:B { - li:conn { R1-2; R2-2; } - } - } - } - ha:layer_stack { - li:groups { - ha:0 { - name = top_paste - ha:type { top=1; paste=1; } - li:layers { 8; } - } - ha:1 { - name = top_silk - ha:type { silk=1; top=1; } - li:layers { 7; } - } - ha:2 { - name = top_mask - ha:type { top=1; mask=1; } - li:layers { 9; } - } - ha:3 { - name = top_copper - ha:type { copper=1; top=1; } - li:layers { 0; 2; } - } - ha:4 { - name = grp_4 - ha:type { substrate=1; intern=1; } - li:layers { } - } - ha:5 { - name = grp_6 - ha:type { intern=1; substrate=1; } - li:layers { } - } - ha:6 { - name = Intern - ha:type { intern=1; copper=1; } - li:layers { 4;} - } - ha:7 { - name = grp_8 - ha:type { intern=1; substrate=1; } - li:layers { } - } - ha:8 { - name = global_outline - ha:type { boundary=1; } - li:layers { 5;} - purpose = uroute - } - ha:9 { - name = bottom_copper - ha:type { bottom=1; copper=1; } - li:layers { 1; 3; } - } - ha:10 { - name = bottom_mask - ha:type { bottom=1; mask=1; } - li:layers { 10; } - } - ha:11 { - name = bottom_silk - ha:type { bottom=1; silk=1; } - li:layers { 6; } - } - ha:12 { - name = bottom_paste - ha:type { bottom=1; paste=1; } - li:layers { 11; } - } - ha:13 { - name = pmech - ha:type { mech=1; } - li:layers { 12; } - purpose = proute - } - ha:14 { - name = umech - ha:type { mech=1; } - li:layers { 13; } - purpose = uroute - } - } - } -} Index: trunk/tests/drc_orig/silk_width.lht =================================================================== --- trunk/tests/drc_orig/silk_width.lht (revision 32119) +++ trunk/tests/drc_orig/silk_width.lht (nonexistent) @@ -1,307 +0,0 @@ -ha:pcb-rnd-board-v6 { - - li:styles { - ha:Signal { - diameter = 2.0mm - text_scale = 0 - text_thick = 0.0 - thickness = 10.0mil - hole = 31.5mil - clearance = 20.0mil - } - ha:Power { - diameter = 2.2mm - text_scale = 0 - text_thick = 0.0 - thickness = 20.0mil - hole = 1.0mm - clearance = 20.0mil - } - ha:Fat { - diameter = 137.8mil - text_scale = 0 - text_thick = 0.0 - thickness = 80.0mil - hole = 47.24mil - clearance = 25.0mil - } - ha:Sig-tight { - diameter = 64.0mil - text_scale = 0 - text_thick = 0.0 - thickness = 10.0mil - hole = 31.5mil - clearance = 12.0mil - } - } - - ha:meta { - ha:size { - thermal_scale = 0.500000 - x = 38.1mm - y = 38.1mm - } - ha:grid { - spacing = 25.0mil - offs_x = 0.0 - offs_y = 0.0 - } - } - - ha:data { - li:padstack_prototypes { - } - - li:objects { - } - li:layers { - - ha:top-sig { - lid=0 - group=3 - ha:combining { } - - li:objects { - } - color = {#8b2323} - } - - ha:bottom-sig { - lid=1 - group=9 - ha:combining { } - - li:objects { - } - color = {#3a5fcd} - } - - ha:top-gnd { - lid=2 - group=3 - ha:combining { } - - li:objects { - } - color = {#104e8b} - } - - ha:bottom-gnd { - lid=3 - group=9 - ha:combining { } - - li:objects { - } - color = {#cd3700} - } - - ha:int-sig2 { - lid=4 - group=6 - ha:combining { } - - li:objects { - } - color = {#548b54} - } - - ha:outline { - lid=5 - group=8 - ha:combining { } - - li:objects { - } - color = {#00868b} - } - - ha:bottom-silk { - lid=6 - group=11 - ha:combining { auto=1; } - - li:objects { - } - color = {#000000} - } - - ha:top-silk { - lid=7 - group=1 - ha:combining { auto=1; } - - li:objects { - ha:line.162 { - x1=300.0mil; y1=600.0mil; x2=525.0mil; y2=600.0mil; thickness=10.0mil; clearance=40.0mil; - ha:flags { - clearline=1 - } - } - ha:line.165 { - x1=325.0mil; y1=425.0mil; x2=325.0mil; y2=800.0mil; thickness=0.001mm; clearance=40.0mil; - ha:flags { - clearline=1 - } - } - } - color = {#000000} - } - - ha:top-paste { - lid=8 - group=0 - ha:combining { auto=1; } - - li:objects { - } - color = {#cd00cd} - } - - ha:top-mask { - lid=9 - group=2 - ha:combining { sub=1; auto=1; } - - li:objects { - } - color = {#ff0000} - } - - ha:bottom-mask { - lid=10 - group=10 - ha:combining { sub=1; auto=1; } - - li:objects { - } - color = {#ff0000} - } - - ha:bottom-paste { - lid=11 - group=12 - ha:combining { auto=1; } - - li:objects { - } - color = {#cd00cd} - } - - ha:slot-plated { - lid=12 - group=13 - ha:combining { auto=1; } - - li:objects { - } - color = {#8b7355} - } - - ha:slot-unplated { - lid=13 - group=14 - ha:combining { auto=1; } - - li:objects { - } - color = {#00868b} - } - } - } - - - ha:netlists { - li:input { - - ha:A { - li:conn { R1-1; R2-1; } - } - ha:B { - li:conn { R1-2; R2-2; } - } - } - } - ha:layer_stack { - li:groups { - ha:0 { - name = top_paste - ha:type { top=1; paste=1; } - li:layers { 8; } - } - ha:1 { - name = top_silk - ha:type { silk=1; top=1; } - li:layers { 7; } - } - ha:2 { - name = top_mask - ha:type { top=1; mask=1; } - li:layers { 9; } - } - ha:3 { - name = top_copper - ha:type { copper=1; top=1; } - li:layers { 0; 2; } - } - ha:4 { - name = grp_4 - ha:type { substrate=1; intern=1; } - li:layers { } - } - ha:5 { - name = grp_6 - ha:type { intern=1; substrate=1; } - li:layers { } - } - ha:6 { - name = Intern - ha:type { intern=1; copper=1; } - li:layers { 4;} - } - ha:7 { - name = grp_8 - ha:type { intern=1; substrate=1; } - li:layers { } - } - ha:8 { - name = global_outline - ha:type { boundary=1; } - li:layers { 5;} - purpose = uroute - } - ha:9 { - name = bottom_copper - ha:type { bottom=1; copper=1; } - li:layers { 1; 3; } - } - ha:10 { - name = bottom_mask - ha:type { bottom=1; mask=1; } - li:layers { 10; } - } - ha:11 { - name = bottom_silk - ha:type { bottom=1; silk=1; } - li:layers { 6; } - } - ha:12 { - name = bottom_paste - ha:type { bottom=1; paste=1; } - li:layers { 11; } - } - ha:13 { - name = pmech - ha:type { mech=1; } - li:layers { 12; } - purpose = proute - } - ha:14 { - name = umech - ha:type { mech=1; } - li:layers { 13; } - purpose = uroute - } - } - } -} Index: trunk/tests/drc_orig/test.sh =================================================================== --- trunk/tests/drc_orig/test.sh (revision 32119) +++ trunk/tests/drc_orig/test.sh (nonexistent) @@ -1,19 +0,0 @@ -#!/bin/sh - -fail=0 - -for n in *.lht -do - bn=${n%%.lht} - ./drc.sh $n > $bn.out - diff -u $bn.ref $bn.out - if test $? = 0 - then - rm $bn.out - else - fail=1 - fi -done - - -exit $fail Property changes on: trunk/tests/drc_orig/test.sh ___________________________________________________________________ Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: trunk/tests/drc_orig/proto.lht =================================================================== --- trunk/tests/drc_orig/proto.lht (revision 32119) +++ trunk/tests/drc_orig/proto.lht (nonexistent) @@ -1,609 +0,0 @@ -ha:pcb-rnd-board-v6 { - - li:styles { - ha:Signal { - diameter = 2.0mm - text_scale = 0 - text_thick = 0.0 - thickness = 10.0mil - hole = 31.5mil - clearance = 20.0mil - } - ha:Power { - diameter = 2.2mm - text_scale = 0 - text_thick = 0.0 - thickness = 20.0mil - hole = 1.0mm - clearance = 20.0mil - } - ha:Fat { - diameter = 137.8mil - text_scale = 0 - text_thick = 0.0 - thickness = 80.0mil - hole = 47.24mil - clearance = 25.0mil - } - ha:Sig-tight { - diameter = 64.0mil - text_scale = 0 - text_thick = 0.0 - thickness = 10.0mil - hole = 31.5mil - clearance = 12.0mil - } - } - - ha:meta { - ha:size { - thermal_scale = 0.500000 - x = 38.1mm - y = 38.1mm - } - ha:grid { - spacing = 25.0mil - offs_x = 0.0 - offs_y = 0.0 - } - } - - ha:data { - li:padstack_prototypes { - } - - li:objects { - ha:subc.115 { - ha:attributes { - value=1206 - footprint=Standard SMT resistor, capacitor etc - refdes=R1 - } - ha:data { - li:padstack_prototypes { - - ha:ps_proto_v6.0 { - hdia=0.0; hplated=0; htop=0; hbottom=0; - li:shape { - - ha:ps_shape_v4 { - ha:combining { } - ha:layer_mask { - copper = 1 - top = 1 - } - clearance=0.0 - li:ps_poly { - 0.649986mm - -0.94996mm - -0.649986mm - -0.94996mm - -0.649986mm - 0.94996mm - 0.649986mm - 0.94996mm - } - } - - ha:ps_shape_v4 { - ha:combining { sub=1; auto=1; } - ha:layer_mask { - top = 1 - mask = 1 - } - clearance=0.0 - li:ps_poly { - 0.726186mm - -1.02616mm - -0.726186mm - -1.02616mm - -0.726186mm - 1.02616mm - 0.726186mm - 1.02616mm - } - } - - ha:ps_shape_v4 { - ha:combining { auto=1; } - ha:layer_mask { - top = 1 - paste = 1 - } - clearance=0.0 - li:ps_poly { - 0.649986mm - -0.94996mm - -0.649986mm - -0.94996mm - -0.649986mm - 0.94996mm - 0.649986mm - 0.94996mm - } - } - } - } - } - - li:objects { - ha:padstack_ref.128 { - proto=0; x=525.0mil; y=26.035mm; rot=0.000000; xmirror=0; smirror=0; clearance=10.0mil; - ha:flags { - clearline=1 - } - - li:thermal { - } - - ha:attributes { - term=1 - name=1 - } - } - ha:padstack_ref.129 { - proto=0; x=26.035mm; y=26.035mm; rot=0.000000; xmirror=0; smirror=0; clearance=10.0mil; - ha:flags { - clearline=1 - } - - li:thermal { - } - - ha:attributes { - term=2 - name=2 - } - } - } - li:layers { - - ha:top-silk { - lid=0 - ha:combining { } - - li:objects { - } - ha:type { - silk = 1 - top = 1 - } - } - - ha:subc-aux { - lid=1 - ha:combining { } - - li:objects { - ha:line.116 { - x1=775.0mil; y1=26.035mm; x2=775.0mil; y2=26.035mm; thickness=0.1mm; clearance=0.0; - ha:attributes { - subc-role=pnp-origin - } - } - ha:line.119 { - x1=775.0mil; y1=26.035mm; x2=775.0mil; y2=26.035mm; thickness=0.1mm; clearance=0.0; - ha:attributes { - subc-role=origin - } - } - ha:line.122 { - x1=775.0mil; y1=26.035mm; x2=20.685mm; y2=26.035mm; thickness=0.1mm; clearance=0.0; - ha:attributes { - subc-role=x - } - } - ha:line.125 { - x1=775.0mil; y1=26.035mm; x2=775.0mil; y2=27.035mm; thickness=0.1mm; clearance=0.0; - ha:attributes { - subc-role=y - } - } - } - ha:type { - top = 1 - misc = 1 - virtual = 1 - } - } - } - } - uid = cnwkLs9zS/C9Q9TlEosAAAAB - } - ha:subc.131 { - ha:attributes { - value=1206 - footprint=Standard SMT resistor, capacitor etc - refdes=R2 - } - ha:data { - li:padstack_prototypes { - - ha:ps_proto_v6.0 { - hdia=0.0; hplated=0; htop=0; hbottom=0; - li:shape { - - ha:ps_shape_v4 { - ha:combining { } - ha:layer_mask { - copper = 1 - top = 1 - } - clearance=0.0 - li:ps_poly { - 0.649986mm - -0.94996mm - -0.649986mm - -0.94996mm - -0.649986mm - 0.94996mm - 0.649986mm - 0.94996mm - } - } - - ha:ps_shape_v4 { - ha:combining { sub=1; auto=1; } - ha:layer_mask { - top = 1 - mask = 1 - } - clearance=0.0 - li:ps_poly { - 0.726186mm - -1.02616mm - -0.726186mm - -1.02616mm - -0.726186mm - 1.02616mm - 0.726186mm - 1.02616mm - } - } - - ha:ps_shape_v4 { - ha:combining { auto=1; } - ha:layer_mask { - top = 1 - paste = 1 - } - clearance=0.0 - li:ps_poly { - 0.649986mm - -0.94996mm - -0.649986mm - -0.94996mm - -0.649986mm - 0.94996mm - 0.649986mm - 0.94996mm - } - } - } - } - } - - li:objects { - ha:padstack_ref.144 { - proto=0; x=525.0mil; y=525.0mil; rot=0.000000; xmirror=0; smirror=0; clearance=10.0mil; - ha:flags { - clearline=1 - } - - li:thermal { - } - - ha:attributes { - term=1 - name=1 - } - } - ha:padstack_ref.145 { - proto=0; x=26.035mm; y=525.0mil; rot=0.000000; xmirror=0; smirror=0; clearance=10.0mil; - ha:flags { - clearline=1 - } - - li:thermal { - } - - ha:attributes { - term=2 - name=2 - } - } - } - li:layers { - - ha:top-silk { - lid=0 - ha:combining { } - - li:objects { - } - ha:type { - silk = 1 - top = 1 - } - } - - ha:subc-aux { - lid=1 - ha:combining { } - - li:objects { - ha:line.132 { - x1=775.0mil; y1=525.0mil; x2=775.0mil; y2=525.0mil; thickness=0.1mm; clearance=0.0; - ha:attributes { - subc-role=pnp-origin - } - } - ha:line.135 { - x1=775.0mil; y1=525.0mil; x2=775.0mil; y2=525.0mil; thickness=0.1mm; clearance=0.0; - ha:attributes { - subc-role=origin - } - } - ha:line.138 { - x1=775.0mil; y1=525.0mil; x2=20.685mm; y2=525.0mil; thickness=0.1mm; clearance=0.0; - ha:attributes { - subc-role=x - } - } - ha:line.141 { - x1=775.0mil; y1=525.0mil; x2=775.0mil; y2=14.335mm; thickness=0.1mm; clearance=0.0; - ha:attributes { - subc-role=y - } - } - } - ha:type { - top = 1 - misc = 1 - virtual = 1 - } - } - } - } - uid = cnwkLs9zS/C9Q9TlEosAAAAB - } - } - li:layers { - - ha:top-sig { - lid=0 - group=3 - ha:combining { } - - li:objects { - } - color = {#8b2323} - } - - ha:bottom-sig { - lid=1 - group=9 - ha:combining { } - - li:objects { - } - color = {#3a5fcd} - } - - ha:top-gnd { - lid=2 - group=3 - ha:combining { } - - li:objects { - } - color = {#104e8b} - } - - ha:bottom-gnd { - lid=3 - group=9 - ha:combining { } - - li:objects { - } - color = {#cd3700} - } - - ha:int-sig2 { - lid=4 - group=6 - ha:combining { } - - li:objects { - } - color = {#548b54} - } - - ha:outline { - lid=5 - group=8 - ha:combining { } - - li:objects { - } - color = {#00868b} - } - - ha:bottom-silk { - lid=6 - group=11 - ha:combining { auto=1; } - - li:objects { - } - color = {#000000} - } - - ha:top-silk { - lid=7 - group=1 - ha:combining { auto=1; } - - li:objects { - } - color = {#000000} - } - - ha:top-paste { - lid=8 - group=0 - ha:combining { auto=1; } - - li:objects { - } - color = {#cd00cd} - } - - ha:top-mask { - lid=9 - group=2 - ha:combining { sub=1; auto=1; } - - li:objects { - } - color = {#ff0000} - } - - ha:bottom-mask { - lid=10 - group=10 - ha:combining { sub=1; auto=1; } - - li:objects { - } - color = {#ff0000} - } - - ha:bottom-paste { - lid=11 - group=12 - ha:combining { auto=1; } - - li:objects { - } - color = {#cd00cd} - } - - ha:slot-plated { - lid=12 - group=13 - ha:combining { auto=1; } - - li:objects { - } - color = {#8b7355} - } - - ha:slot-unplated { - lid=13 - group=14 - ha:combining { auto=1; } - - li:objects { - } - color = {#00868b} - } - } - } - - - ha:netlists { - li:input { - - ha:A { - li:conn { R1-1; R2-1; } - } - ha:B { - li:conn { R1-2; R2-2; } - } - } - } - ha:layer_stack { - li:groups { - ha:0 { - name = top_paste - ha:type { top=1; paste=1; } - li:layers { 8; } - } - ha:1 { - name = top_silk - ha:type { silk=1; top=1; } - li:layers { 7; } - } - ha:2 { - name = top_mask - ha:type { top=1; mask=1; } - li:layers { 9; } - } - ha:3 { - name = top_copper - ha:type { copper=1; top=1; } - li:layers { 0; 2; } - } - ha:4 { - name = grp_4 - ha:type { substrate=1; intern=1; } - li:layers { } - } - ha:5 { - name = grp_6 - ha:type { intern=1; substrate=1; } - li:layers { } - } - ha:6 { - name = Intern - ha:type { intern=1; copper=1; } - li:layers { 4;} - } - ha:7 { - name = grp_8 - ha:type { intern=1; substrate=1; } - li:layers { } - } - ha:8 { - name = global_outline - ha:type { boundary=1; } - li:layers { 5;} - purpose = uroute - } - ha:9 { - name = bottom_copper - ha:type { bottom=1; copper=1; } - li:layers { 1; 3; } - } - ha:10 { - name = bottom_mask - ha:type { bottom=1; mask=1; } - li:layers { 10; } - } - ha:11 { - name = bottom_silk - ha:type { bottom=1; silk=1; } - li:layers { 6; } - } - ha:12 { - name = bottom_paste - ha:type { bottom=1; paste=1; } - li:layers { 11; } - } - ha:13 { - name = pmech - ha:type { mech=1; } - li:layers { 12; } - purpose = proute - } - ha:14 { - name = umech - ha:type { mech=1; } - li:layers { 13; } - purpose = uroute - } - } - } -} Index: trunk/tests/drc_orig/cop_short.ref =================================================================== --- trunk/tests/drc_orig/cop_short.ref (revision 32119) +++ trunk/tests/drc_orig/cop_short.ref (nonexistent) @@ -1,25 +0,0 @@ -W : Warning: footprint library list error on /dev/null - -T short -t Copper areas too close -B 11.2656 19.8794 28.3838 21.4718 mm -R 0.3048 mm - - -T short -t Copper areas too close -B 12.5388 10.9513 14.1312 28.4187 mm -R 0.3048 mm - - -T short -t Copper areas too close -B 11.2656 19.8794 28.3838 21.4718 mm -R 0.3048 mm - - -T short -t Copper areas too close -B 12.5388 10.9513 14.1312 28.4187 mm -R 0.3048 mm - Index: trunk/tests/drc_orig/cop_width.ref =================================================================== --- trunk/tests/drc_orig/cop_width.ref (revision 32119) +++ trunk/tests/drc_orig/cop_width.ref (nonexistent) @@ -1,8 +0,0 @@ -W : Warning: footprint library list error on /dev/null - -T thin -t Line width is too thin -B 12.6974 11.1099 13.9726 28.2601 mm -R 0.2540 mm -M 0.0010 mm - Index: trunk/tests/drc_orig/silk_width.ref =================================================================== --- trunk/tests/drc_orig/silk_width.ref (revision 32119) +++ trunk/tests/drc_orig/silk_width.ref (nonexistent) @@ -1,8 +0,0 @@ -W : Warning: footprint library list error on /dev/null - -T thin -t Silk line is too thin -B 7.6174 8.9668 8.8926 22.1482 mm -R 0.1778 mm -M 0.0010 mm - Index: trunk/tests/drc_orig/Makefile =================================================================== --- trunk/tests/drc_orig/Makefile (revision 32119) +++ trunk/tests/drc_orig/Makefile (nonexistent) @@ -1,4 +0,0 @@ -all: - -test: - ./test.sh Index: trunk/tests/drc_orig/proto.ref =================================================================== --- trunk/tests/drc_orig/proto.ref (revision 32119) +++ trunk/tests/drc_orig/proto.ref (nonexistent) @@ -1 +0,0 @@ -W : Warning: footprint library list error on /dev/null