Index: trunk/old/oldlib/lib/pcblib-newlib/geda/0603.fp =================================================================== --- trunk/old/oldlib/lib/pcblib-newlib/geda/0603.fp (revision 325) +++ trunk/old/oldlib/lib/pcblib-newlib/geda/0603.fp (nonexistent) @@ -1,27 +0,0 @@ - # grab the input values and convert to 1/100 mil - # how much to grow the pads by for soldermask [1/100 mil] - # clearance from planes [1/100 mil] - # silk screen width [1/100 mil] - # courtyard silk screen width [1/100 mil] -# element_flags, description, pcb-name, value, mark_x, mark_y, -# text_x, text_y, text_direction, text_scale, text_flags -Element[0x00000000 "Standard SMT resistor, capacitor etc" "" "0603" 0 0 -3150 -3150 0 100 ""] -( -# -# Pad[x1, y1, x2, y2, thickness, clearance, mask, name , pad number, flags] - Pad[-2559 -492 - -2559 492 - 2952 2000 3552 "1" "1" "square"] - Pad[2559 -492 - 2559 492 - 2952 2000 3552 "2" "2" "square"] -# -# This draws a 1 mil placement courtyard outline in silk. It should probably -# not be included since you wont want to try and fab a 1 mil silk line. Then -# again, it is most useful during parts placement. It really is time for some -# additional non-fab layers... -# ElementLine[eval(-1*V1/2) eval(-1*V2/2) eval(-1*V1/2) eval( V2/2) CYW] -# ElementLine[eval(-1*V1/2) eval(-1*V2/2) eval( V1/2) eval(-1*V2/2) CYW] -# ElementLine[eval( V1/2) eval( V2/2) eval( V1/2) eval(-1*V2/2) CYW] -# ElementLine[eval( V1/2) eval( V2/2) eval(-1*V1/2) eval( V2/2) CYW] -) Index: trunk/old/oldlib/lib/pcblib-newlib/geda/MPAK.fp =================================================================== --- trunk/old/oldlib/lib/pcblib-newlib/geda/MPAK.fp (revision 325) +++ trunk/old/oldlib/lib/pcblib-newlib/geda/MPAK.fp (nonexistent) @@ -1,26 +0,0 @@ -Element(0x00 "Pressure transducer" "" "MPAK" 235 0 3 100 0x00) -( - ElementLine(0 0 0 558 10) - ElementLine(0 558 215 558 10) - ElementLine(215 558 215 0 10) - ElementLine(215 0 0 0 10) - # 1st pin on pin side - Pad(32 469 - 32 525 - 31 "1" "1" 0x100) - Pad(82 469 - 82 525 - 31 "2" "2" 0x100) - Pad(132 469 - 132 525 - 31 "3" "3" 0x100) - # last pin on pin side - Pad(182 469 - 182 525 - 31 "4" "4" 0x100) - # extra wide pin on opposite side - Pad(144 60 - 70 60 - 87 "5" "5" 0x100) - Mark(32 497) -) Index: trunk/old/oldlib/lib/pcblib-newlib/geda/DO214.fp =================================================================== --- trunk/old/oldlib/lib/pcblib-newlib/geda/DO214.fp (revision 325) +++ trunk/old/oldlib/lib/pcblib-newlib/geda/DO214.fp (nonexistent) @@ -1,17 +0,0 @@ - # how much to grow the pads by for soldermask - # clearance from planes -Element(0x00 "SMT diode (pin 1 is cathode)" "" "DO214" 0 0 221 0 3 100 0x00) -( - ElementLine(-211 -89 -211 89 20) - ElementLine(-211 89 -141 114 10) - ElementLine(-141 114 201 114 10) - ElementLine(201 114 201 -114 10) - ElementLine(201 -114 -141 -114 10) - ElementLine(-141 -114 -211 -89 10) - Pad(-106 -19 - -106 19 - 140 20 146 "1" "1" 0x00000100) - Pad(106 -19 - 106 19 - 140 20 146 "2" "2" 0x00000100) -) Index: trunk/old/oldlib/lib/pcblib-newlib/geda/DO214AB.fp =================================================================== --- trunk/old/oldlib/lib/pcblib-newlib/geda/DO214AB.fp (revision 325) +++ trunk/old/oldlib/lib/pcblib-newlib/geda/DO214AB.fp (nonexistent) @@ -1,17 +0,0 @@ - # how much to grow the pads by for soldermask - # clearance from planes -Element(0x00 "SMT diode (pin 1 is cathode)" "" "DO214AB" 0 0 227 0 3 100 0x00) -( - ElementLine(-217 -92 -217 92 20) - ElementLine(-217 92 -145 118 10) - ElementLine(-145 118 207 118 10) - ElementLine(207 118 207 -118 10) - ElementLine(207 -118 -145 -118 10) - ElementLine(-145 -118 -217 -92 10) - Pad(-109 -20 - -109 20 - 145 20 151 "1" "1" 0x00000100) - Pad(109 -20 - 109 20 - 145 20 151 "2" "2" 0x00000100) -) Index: trunk/old/oldlib/lib/pcblib-newlib/geda/HC49U_3.fp =================================================================== --- trunk/old/oldlib/lib/pcblib-newlib/geda/HC49U_3.fp (revision 325) +++ trunk/old/oldlib/lib/pcblib-newlib/geda/HC49U_3.fp (nonexistent) @@ -1,11 +0,0 @@ -Element(0x00 "Crystals" "" "HC49U_3" 0 -60 0 100 0x00) -( - Pin(121 91 60 32 "1" 0x101) - Pin(217 91 60 32 "2" 0x01) - Pin(313 91 60 32 "3" 0x01) - ElementLine(91 0 344 0 20) - ElementArc(344 91 91 91 90 180 20) - ElementLine(344 183 91 183 20) - ElementArc(91 91 91 91 270 180 20) - Mark(121 91) -) Index: trunk/old/oldlib/lib/pcblib-newlib/geda/1008.fp =================================================================== --- trunk/old/oldlib/lib/pcblib-newlib/geda/1008.fp (revision 325) +++ trunk/old/oldlib/lib/pcblib-newlib/geda/1008.fp (nonexistent) @@ -1,29 +0,0 @@ - # grab the input values and convert to 1/100 mil - # how much to grow the pads by for soldermask [1/100 mil] - # clearance from planes [1/100 mil] - # silk screen width [1/100 mil] - # courtyard silk screen width [1/100 mil] -# element_flags, description, pcb-name, value, mark_x, mark_y, -# text_x, text_y, text_direction, text_scale, text_flags -Element[0x00000000 "Standard SMT resistor, capacitor etc" "" "1008" 0 0 -3150 -3150 0 100 ""] -( -# -# Pad[x1, y1, x2, y2, thickness, clearance, mask, name , pad number, flags] - Pad[-5118 -2362 - -5118 2362 - 4330 2000 4930 "1" "1" "square"] - Pad[5118 -2362 - 5118 2362 - 4330 2000 4930 "2" "2" "square"] - ElementLine[-1377 -4527 1377 -4527 800] - ElementLine[-1377 4527 1377 4527 800] -# -# This draws a 1 mil placement courtyard outline in silk. It should probably -# not be included since you wont want to try and fab a 1 mil silk line. Then -# again, it is most useful during parts placement. It really is time for some -# additional non-fab layers... -# ElementLine[eval(-1*V1/2) eval(-1*V2/2) eval(-1*V1/2) eval( V2/2) CYW] -# ElementLine[eval(-1*V1/2) eval(-1*V2/2) eval( V1/2) eval(-1*V2/2) CYW] -# ElementLine[eval( V1/2) eval( V2/2) eval( V1/2) eval(-1*V2/2) CYW] -# ElementLine[eval( V1/2) eval( V2/2) eval(-1*V1/2) eval( V2/2) CYW] -) Index: trunk/old/oldlib/lib/pcblib-newlib/geda/0402.fp =================================================================== --- trunk/old/oldlib/lib/pcblib-newlib/geda/0402.fp (revision 325) +++ trunk/old/oldlib/lib/pcblib-newlib/geda/0402.fp (nonexistent) @@ -1,27 +0,0 @@ - # grab the input values and convert to 1/100 mil - # how much to grow the pads by for soldermask [1/100 mil] - # clearance from planes [1/100 mil] - # silk screen width [1/100 mil] - # courtyard silk screen width [1/100 mil] -# element_flags, description, pcb-name, value, mark_x, mark_y, -# text_x, text_y, text_direction, text_scale, text_flags -Element[0x00000000 "Standard SMT resistor, capacitor etc" "" "0402" 0 0 -3150 -3150 0 100 ""] -( -# -# Pad[x1, y1, x2, y2, thickness, clearance, mask, name , pad number, flags] - Pad[-1574 -393 - -1574 393 - 1968 2000 2568 "1" "1" "square"] - Pad[1574 -393 - 1574 393 - 1968 2000 2568 "2" "2" "square"] -# -# This draws a 1 mil placement courtyard outline in silk. It should probably -# not be included since you wont want to try and fab a 1 mil silk line. Then -# again, it is most useful during parts placement. It really is time for some -# additional non-fab layers... -# ElementLine[eval(-1*V1/2) eval(-1*V2/2) eval(-1*V1/2) eval( V2/2) CYW] -# ElementLine[eval(-1*V1/2) eval(-1*V2/2) eval( V1/2) eval(-1*V2/2) CYW] -# ElementLine[eval( V1/2) eval( V2/2) eval( V1/2) eval(-1*V2/2) CYW] -# ElementLine[eval( V1/2) eval( V2/2) eval(-1*V1/2) eval( V2/2) CYW] -) Index: trunk/old/oldlib/lib/pcblib-newlib/geda/HC49.fp =================================================================== --- trunk/old/oldlib/lib/pcblib-newlib/geda/HC49.fp (revision 325) +++ trunk/old/oldlib/lib/pcblib-newlib/geda/HC49.fp (nonexistent) @@ -1,10 +0,0 @@ -Element(0x00 "Crystals" "" "HC49" 0 -60 0 100 0x00) -( - Pin(50 50 60 28 "1" 0x101) - Pin(250 50 60 28 "2" 0x01) - ElementLine(50 0 250 0 20) - ElementArc(250 50 50 50 90 180 20) - ElementLine(250 100 50 100 20) - ElementArc(50 50 50 50 270 180 20) - Mark(50 50) -) Index: trunk/old/oldlib/lib/pcblib-newlib/geda/1206.fp =================================================================== --- trunk/old/oldlib/lib/pcblib-newlib/geda/1206.fp (revision 325) +++ trunk/old/oldlib/lib/pcblib-newlib/geda/1206.fp (nonexistent) @@ -1,29 +0,0 @@ - # grab the input values and convert to 1/100 mil - # how much to grow the pads by for soldermask [1/100 mil] - # clearance from planes [1/100 mil] - # silk screen width [1/100 mil] - # courtyard silk screen width [1/100 mil] -# element_flags, description, pcb-name, value, mark_x, mark_y, -# text_x, text_y, text_direction, text_scale, text_flags -Element[0x00000000 "Standard SMT resistor, capacitor etc" "" "1206" 0 0 -3150 -3150 0 100 ""] -( -# -# Pad[x1, y1, x2, y2, thickness, clearance, mask, name , pad number, flags] - Pad[-5905 -1181 - -5905 1181 - 5118 2000 5718 "1" "1" "square"] - Pad[5905 -1181 - 5905 1181 - 5118 2000 5718 "2" "2" "square"] - ElementLine[-2362 -3740 2362 -3740 800] - ElementLine[-2362 3740 2362 3740 800] -# -# This draws a 1 mil placement courtyard outline in silk. It should probably -# not be included since you wont want to try and fab a 1 mil silk line. Then -# again, it is most useful during parts placement. It really is time for some -# additional non-fab layers... -# ElementLine[eval(-1*V1/2) eval(-1*V2/2) eval(-1*V1/2) eval( V2/2) CYW] -# ElementLine[eval(-1*V1/2) eval(-1*V2/2) eval( V1/2) eval(-1*V2/2) CYW] -# ElementLine[eval( V1/2) eval( V2/2) eval( V1/2) eval(-1*V2/2) CYW] -# ElementLine[eval( V1/2) eval( V2/2) eval(-1*V1/2) eval( V2/2) CYW] -) Index: trunk/old/oldlib/lib/pcblib-newlib/geda/OSC14.fp =================================================================== --- trunk/old/oldlib/lib/pcblib-newlib/geda/OSC14.fp (revision 325) +++ trunk/old/oldlib/lib/pcblib-newlib/geda/OSC14.fp (nonexistent) @@ -1,23 +0,0 @@ - Element(0x00 "Crystal oscillator" "" "OSC14" 270 300 3 100 0x00) -( - Pin(100 100 50 28 "NC" 0x01) - Pin(100 700 50 28 "GND" 0x01) - Pin(400 700 50 28 "CLK" 0x01) - Pin(400 100 50 28 "VCC" 0x01) - ElementLine(5 5 400 5 10) - ElementArc(400 100 95 95 180 90 10) - ElementLine(495 100 495 700 10) - ElementArc(400 700 95 95 90 90 10) - ElementLine(400 795 100 795 10) - ElementArc(100 700 95 95 0 90 10) - ElementLine(5 700 5 5 10) - ElementLine(100 60 400 60 10) - ElementArc(400 100 40 40 180 90 10) - ElementLine(440 100 440 700 10) - ElementArc(400 700 40 40 90 90 10) - ElementLine(400 740 100 740 10) - ElementArc(100 700 40 40 0 90 10) - ElementLine(60 700 60 100 10) - ElementArc(100 100 40 40 270 90 10) - Mark(100 100) -) Index: trunk/old/oldlib/lib/pcblib-newlib/geda/HC49UH.fp =================================================================== --- trunk/old/oldlib/lib/pcblib-newlib/geda/HC49UH.fp (revision 325) +++ trunk/old/oldlib/lib/pcblib-newlib/geda/HC49UH.fp (nonexistent) @@ -1,10 +0,0 @@ -Element(0x00 "Crystals" "" "HC49UH" 0 -60 0 100 0x00) -( - Pin(121 615 60 32 "1" 0x101) - Pin(313 615 60 32 "2" 0x01) - ElementLine(0 0 435 0 20) - ElementLine(435 0 435 515 20) - ElementLine(435 515 0 515 20) - ElementLine(0 515 0 0 20) - Mark(121 615) -) Index: trunk/old/oldlib/lib/pcblib-newlib/geda/HC51UH.fp =================================================================== --- trunk/old/oldlib/lib/pcblib-newlib/geda/HC51UH.fp (revision 325) +++ trunk/old/oldlib/lib/pcblib-newlib/geda/HC51UH.fp (nonexistent) @@ -1,10 +0,0 @@ -Element(0x00 "Crystals" "" "HC51UH" 0 -60 0 100 0x00) -( - Pin(136 975 80 40 "1" 0x101) - Pin(621 975 80 40 "2" 0x01) - ElementLine(0 0 757 0 20) - ElementLine(757 0 757 775 20) - ElementLine(757 775 0 775 20) - ElementLine(0 775 0 0 20) - Mark(136 975) -) Index: trunk/old/oldlib/lib/pcblib-newlib/geda/PENTAWATT.fp =================================================================== --- trunk/old/oldlib/lib/pcblib-newlib/geda/PENTAWATT.fp (revision 325) +++ trunk/old/oldlib/lib/pcblib-newlib/geda/PENTAWATT.fp (nonexistent) @@ -1,16 +0,0 @@ -Element(0x00 "Power IC, as in MULTIWATT15" "" "PENTAWATT" 469 50 3 100 0x00) -( - Pin(70 334 90 60 "1" 0x101) - Pin(137 177 90 60 "2" 0x01) - Pin(204 334 90 60 "3" 0x01) - Pin(271 177 90 60 "4" 0x01) - Pin(338 334 90 60 "5" 0x01) - ElementLine(0 0 0 189 20) - ElementLine(0 189 409 189 20) - ElementLine(409 189 409 0 20) - ElementLine(409 0 0 0 20) - ElementLine(0 50 409 50 10) - ElementLine(129 0 129 50 10) - ElementLine(279 0 279 50 10) - Mark(70 249) - ) Index: trunk/old/oldlib/lib/pcblib-newlib/geda/1210.fp =================================================================== --- trunk/old/oldlib/lib/pcblib-newlib/geda/1210.fp (revision 325) +++ trunk/old/oldlib/lib/pcblib-newlib/geda/1210.fp (nonexistent) @@ -1,29 +0,0 @@ - # grab the input values and convert to 1/100 mil - # how much to grow the pads by for soldermask [1/100 mil] - # clearance from planes [1/100 mil] - # silk screen width [1/100 mil] - # courtyard silk screen width [1/100 mil] -# element_flags, description, pcb-name, value, mark_x, mark_y, -# text_x, text_y, text_direction, text_scale, text_flags -Element[0x00000000 "Standard SMT resistor, capacitor etc" "" "1210" 0 0 -3150 -3150 0 100 ""] -( -# -# Pad[x1, y1, x2, y2, thickness, clearance, mask, name , pad number, flags] - Pad[-5905 -2755 - -5905 2755 - 5118 2000 5718 "1" "1" "square"] - Pad[5905 -2755 - 5905 2755 - 5118 2000 5718 "2" "2" "square"] - ElementLine[-1968 -5314 1968 -5314 800] - ElementLine[-1968 5314 1968 5314 800] -# -# This draws a 1 mil placement courtyard outline in silk. It should probably -# not be included since you wont want to try and fab a 1 mil silk line. Then -# again, it is most useful during parts placement. It really is time for some -# additional non-fab layers... -# ElementLine[eval(-1*V1/2) eval(-1*V2/2) eval(-1*V1/2) eval( V2/2) CYW] -# ElementLine[eval(-1*V1/2) eval(-1*V2/2) eval( V1/2) eval(-1*V2/2) CYW] -# ElementLine[eval( V1/2) eval( V2/2) eval( V1/2) eval(-1*V2/2) CYW] -# ElementLine[eval( V1/2) eval( V2/2) eval(-1*V1/2) eval( V2/2) CYW] -) Index: trunk/old/oldlib/lib/pcblib-newlib/geda/0201.fp =================================================================== --- trunk/old/oldlib/lib/pcblib-newlib/geda/0201.fp (revision 325) +++ trunk/old/oldlib/lib/pcblib-newlib/geda/0201.fp (nonexistent) @@ -1,27 +0,0 @@ - # grab the input values and convert to 1/100 mil - # how much to grow the pads by for soldermask [1/100 mil] - # clearance from planes [1/100 mil] - # silk screen width [1/100 mil] - # courtyard silk screen width [1/100 mil] -# element_flags, description, pcb-name, value, mark_x, mark_y, -# text_x, text_y, text_direction, text_scale, text_flags -Element[0x00000000 "Standard SMT resistor, capacitor etc" "" "0201" 0 0 -3150 -3150 0 100 ""] -( -# -# Pad[x1, y1, x2, y2, thickness, clearance, mask, name , pad number, flags] - Pad[-1181 0 - -1181 0 - 1574 2000 2174 "1" "1" "square"] - Pad[1181 0 - 1181 0 - 1574 2000 2174 "2" "2" "square"] -# -# This draws a 1 mil placement courtyard outline in silk. It should probably -# not be included since you wont want to try and fab a 1 mil silk line. Then -# again, it is most useful during parts placement. It really is time for some -# additional non-fab layers... -# ElementLine[eval(-1*V1/2) eval(-1*V2/2) eval(-1*V1/2) eval( V2/2) CYW] -# ElementLine[eval(-1*V1/2) eval(-1*V2/2) eval( V1/2) eval(-1*V2/2) CYW] -# ElementLine[eval( V1/2) eval( V2/2) eval( V1/2) eval(-1*V2/2) CYW] -# ElementLine[eval( V1/2) eval( V2/2) eval(-1*V1/2) eval( V2/2) CYW] -) Index: trunk/old/oldlib/lib/pcblib-newlib/geda/0805.fp =================================================================== --- trunk/old/oldlib/lib/pcblib-newlib/geda/0805.fp (revision 325) +++ trunk/old/oldlib/lib/pcblib-newlib/geda/0805.fp (nonexistent) @@ -1,29 +0,0 @@ - # grab the input values and convert to 1/100 mil - # how much to grow the pads by for soldermask [1/100 mil] - # clearance from planes [1/100 mil] - # silk screen width [1/100 mil] - # courtyard silk screen width [1/100 mil] -# element_flags, description, pcb-name, value, mark_x, mark_y, -# text_x, text_y, text_direction, text_scale, text_flags -Element[0x00000000 "Standard SMT resistor, capacitor etc" "" "0805" 0 0 -3150 -3150 0 100 ""] -( -# -# Pad[x1, y1, x2, y2, thickness, clearance, mask, name , pad number, flags] - Pad[-3543 -393 - -3543 393 - 5118 2000 5718 "1" "1" "square"] - Pad[3543 -393 - 3543 393 - 5118 2000 5718 "2" "2" "square"] - ElementLine[-393 -2755 393 -2755 800] - ElementLine[-393 2755 393 2755 800] -# -# This draws a 1 mil placement courtyard outline in silk. It should probably -# not be included since you wont want to try and fab a 1 mil silk line. Then -# again, it is most useful during parts placement. It really is time for some -# additional non-fab layers... -# ElementLine[eval(-1*V1/2) eval(-1*V2/2) eval(-1*V1/2) eval( V2/2) CYW] -# ElementLine[eval(-1*V1/2) eval(-1*V2/2) eval( V1/2) eval(-1*V2/2) CYW] -# ElementLine[eval( V1/2) eval( V2/2) eval( V1/2) eval(-1*V2/2) CYW] -# ElementLine[eval( V1/2) eval( V2/2) eval(-1*V1/2) eval( V2/2) CYW] -) Index: trunk/old/oldlib/lib/pcblib-newlib/geda/2706.fp =================================================================== --- trunk/old/oldlib/lib/pcblib-newlib/geda/2706.fp (revision 325) +++ trunk/old/oldlib/lib/pcblib-newlib/geda/2706.fp (nonexistent) @@ -1,15 +0,0 @@ - # how much to grow the pads by for soldermask - # clearance from planes -Element(0x00 "Standard SMT resistor, capacitor etc" "" "2706" 0 0 179 0 3 100 0x00) -( - ElementLine(-159 -54 -159 54 10) - ElementLine(-159 54 159 54 10) - ElementLine(159 54 159 -54 10) - ElementLine(159 -54 -159 -54 10) - Pad(-108 -3 - -108 3 - 78 20 84 "1" "1" 0x00000100) - Pad(108 -3 - 108 3 - 78 20 84 "2" "2" 0x00000100) -) Index: trunk/old/oldlib/lib/pcblib-newlib/geda/HC49U.fp =================================================================== --- trunk/old/oldlib/lib/pcblib-newlib/geda/HC49U.fp (revision 325) +++ trunk/old/oldlib/lib/pcblib-newlib/geda/HC49U.fp (nonexistent) @@ -1,10 +0,0 @@ -Element(0x00 "Crystals" "" "HC49U" 0 -60 0 100 0x00) -( - Pin(121 91 60 32 "1" 0x101) - Pin(313 91 60 32 "2" 0x01) - ElementLine(91 0 344 0 20) - ElementArc(344 91 91 91 90 180 20) - ElementLine(344 183 91 183 20) - ElementArc(91 91 91 91 270 180 20) - Mark(121 91) -) Index: trunk/old/oldlib/lib/pcblib-newlib/geda/HC51U.fp =================================================================== --- trunk/old/oldlib/lib/pcblib-newlib/geda/HC51U.fp (revision 325) +++ trunk/old/oldlib/lib/pcblib-newlib/geda/HC51U.fp (nonexistent) @@ -1,10 +0,0 @@ -Element(0x00 "Crystals" "" "HC51U" 0 -60 0 100 0x00) -( - Pin(136 176 80 40 "1" 0x101) - Pin(621 176 80 40 "2" 0x01) - ElementLine(176 0 581 0 20) - ElementArc(581 176 176 176 90 180 20) - ElementLine(581 352 176 352 20) - ElementArc(176 176 176 176 270 180 20) - Mark(136 176) -) Index: trunk/old/oldlib/lib/pcblib-newlib/geda/HC49U_3H.fp =================================================================== --- trunk/old/oldlib/lib/pcblib-newlib/geda/HC49U_3H.fp (revision 325) +++ trunk/old/oldlib/lib/pcblib-newlib/geda/HC49U_3H.fp (nonexistent) @@ -1,11 +0,0 @@ -Element(0x00 "Crystals" "" "HC49U_3H" 0 -60 0 100 0x00) -( - Pin(121 615 60 32 "1" 0x101) - Pin(217 615 60 32 "2" 0x01) - Pin(313 615 60 32 "3" 0x01) - ElementLine(0 0 435 0 20) - ElementLine(435 0 435 515 20) - ElementLine(435 515 0 515 20) - ElementLine(0 515 0 0 20) - Mark(121 615) -) Index: trunk/old/oldlib/lib/pcblib-newlib/geda/01005.fp =================================================================== --- trunk/old/oldlib/lib/pcblib-newlib/geda/01005.fp (revision 325) +++ trunk/old/oldlib/lib/pcblib-newlib/geda/01005.fp (nonexistent) @@ -1,27 +0,0 @@ - # grab the input values and convert to 1/100 mil - # how much to grow the pads by for soldermask [1/100 mil] - # clearance from planes [1/100 mil] - # silk screen width [1/100 mil] - # courtyard silk screen width [1/100 mil] -# element_flags, description, pcb-name, value, mark_x, mark_y, -# text_x, text_y, text_direction, text_scale, text_flags -Element[0x00000000 "Standard SMT resistor, capacitor etc" "" "01005" 0 0 -3150 -3150 0 100 ""] -( -# -# Pad[x1, y1, x2, y2, thickness, clearance, mask, name , pad number, flags] - Pad[-807 -19 - -807 19 - 984 2000 1584 "1" "1" "square"] - Pad[807 -19 - 807 19 - 984 2000 1584 "2" "2" "square"] -# -# This draws a 1 mil placement courtyard outline in silk. It should probably -# not be included since you wont want to try and fab a 1 mil silk line. Then -# again, it is most useful during parts placement. It really is time for some -# additional non-fab layers... -# ElementLine[eval(-1*V1/2) eval(-1*V2/2) eval(-1*V1/2) eval( V2/2) CYW] -# ElementLine[eval(-1*V1/2) eval(-1*V2/2) eval( V1/2) eval(-1*V2/2) CYW] -# ElementLine[eval( V1/2) eval( V2/2) eval( V1/2) eval(-1*V2/2) CYW] -# ElementLine[eval( V1/2) eval( V2/2) eval(-1*V1/2) eval( V2/2) CYW] -) Index: trunk/old/oldlib/lib/pcblib-newlib/geda/1825.fp =================================================================== --- trunk/old/oldlib/lib/pcblib-newlib/geda/1825.fp (revision 325) +++ trunk/old/oldlib/lib/pcblib-newlib/geda/1825.fp (nonexistent) @@ -1,29 +0,0 @@ - # grab the input values and convert to 1/100 mil - # how much to grow the pads by for soldermask [1/100 mil] - # clearance from planes [1/100 mil] - # silk screen width [1/100 mil] - # courtyard silk screen width [1/100 mil] -# element_flags, description, pcb-name, value, mark_x, mark_y, -# text_x, text_y, text_direction, text_scale, text_flags -Element[0x00000000 "Standard SMT resistor, capacitor etc" "" "1825" 0 0 -3150 -3150 0 100 ""] -( -# -# Pad[x1, y1, x2, y2, thickness, clearance, mask, name , pad number, flags] - Pad[-7874 -10236 - -7874 10236 - 6299 2000 6899 "1" "1" "square"] - Pad[7874 -10236 - 7874 10236 - 6299 2000 6899 "2" "2" "square"] - ElementLine[-3149 -13385 3149 -13385 800] - ElementLine[-3149 13385 3149 13385 800] -# -# This draws a 1 mil placement courtyard outline in silk. It should probably -# not be included since you wont want to try and fab a 1 mil silk line. Then -# again, it is most useful during parts placement. It really is time for some -# additional non-fab layers... -# ElementLine[eval(-1*V1/2) eval(-1*V2/2) eval(-1*V1/2) eval( V2/2) CYW] -# ElementLine[eval(-1*V1/2) eval(-1*V2/2) eval( V1/2) eval(-1*V2/2) CYW] -# ElementLine[eval( V1/2) eval( V2/2) eval( V1/2) eval(-1*V2/2) CYW] -# ElementLine[eval( V1/2) eval( V2/2) eval(-1*V1/2) eval( V2/2) CYW] -) Index: trunk/old/oldlib/lib/pcblib-newlib/geda/HEPTAWATT.fp =================================================================== --- trunk/old/oldlib/lib/pcblib-newlib/geda/HEPTAWATT.fp (revision 325) +++ trunk/old/oldlib/lib/pcblib-newlib/geda/HEPTAWATT.fp (nonexistent) @@ -1,18 +0,0 @@ -Element(0x00 "Power IC, as in MULTIWATT15" "" "HEPTAWATT" 469 50 3 100 0x00) -( - Pin(54 310 90 60 "1" 0x101) - Pin(104 110 90 60 "2" 0x01) - Pin(154 310 90 60 "3" 0x01) - Pin(204 110 90 60 "4" 0x01) - Pin(254 310 90 60 "5" 0x01) - Pin(304 110 90 60 "6" 0x01) - Pin(354 310 90 60 "7" 0x01) - ElementLine(0 0 0 189 20) - ElementLine(0 189 409 189 20) - ElementLine(409 189 409 0 20) - ElementLine(409 0 0 0 20) - ElementLine(0 50 409 50 10) - ElementLine(129 0 129 50 10) - ElementLine(279 0 279 50 10) - Mark(54 249) - ) Index: trunk/old/oldlib/lib/pcblib-newlib/geda/1806.fp =================================================================== --- trunk/old/oldlib/lib/pcblib-newlib/geda/1806.fp (revision 325) +++ trunk/old/oldlib/lib/pcblib-newlib/geda/1806.fp (nonexistent) @@ -1,29 +0,0 @@ - # grab the input values and convert to 1/100 mil - # how much to grow the pads by for soldermask [1/100 mil] - # clearance from planes [1/100 mil] - # silk screen width [1/100 mil] - # courtyard silk screen width [1/100 mil] -# element_flags, description, pcb-name, value, mark_x, mark_y, -# text_x, text_y, text_direction, text_scale, text_flags -Element[0x00000000 "Standard SMT resistor, capacitor etc" "" "1806" 0 0 -3150 -3150 0 100 ""] -( -# -# Pad[x1, y1, x2, y2, thickness, clearance, mask, name , pad number, flags] - Pad[-7874 -3543 - -7874 3543 - 6299 2000 6899 "1" "1" "square"] - Pad[7874 -3543 - 7874 3543 - 6299 2000 6899 "2" "2" "square"] - ElementLine[-3149 -6692 3149 -6692 800] - ElementLine[-3149 6692 3149 6692 800] -# -# This draws a 1 mil placement courtyard outline in silk. It should probably -# not be included since you wont want to try and fab a 1 mil silk line. Then -# again, it is most useful during parts placement. It really is time for some -# additional non-fab layers... -# ElementLine[eval(-1*V1/2) eval(-1*V2/2) eval(-1*V1/2) eval( V2/2) CYW] -# ElementLine[eval(-1*V1/2) eval(-1*V2/2) eval( V1/2) eval(-1*V2/2) CYW] -# ElementLine[eval( V1/2) eval( V2/2) eval( V1/2) eval(-1*V2/2) CYW] -# ElementLine[eval( V1/2) eval( V2/2) eval(-1*V1/2) eval( V2/2) CYW] -) Index: trunk/pcblib/smd/01005.fp =================================================================== --- trunk/pcblib/smd/01005.fp (nonexistent) +++ trunk/pcblib/smd/01005.fp (revision 326) @@ -0,0 +1,27 @@ + # grab the input values and convert to 1/100 mil + # how much to grow the pads by for soldermask [1/100 mil] + # clearance from planes [1/100 mil] + # silk screen width [1/100 mil] + # courtyard silk screen width [1/100 mil] +# element_flags, description, pcb-name, value, mark_x, mark_y, +# text_x, text_y, text_direction, text_scale, text_flags +Element[0x00000000 "Standard SMT resistor, capacitor etc" "" "01005" 0 0 -3150 -3150 0 100 ""] +( +# +# Pad[x1, y1, x2, y2, thickness, clearance, mask, name , pad number, flags] + Pad[-807 -19 + -807 19 + 984 2000 1584 "1" "1" "square"] + Pad[807 -19 + 807 19 + 984 2000 1584 "2" "2" "square"] +# +# This draws a 1 mil placement courtyard outline in silk. It should probably +# not be included since you wont want to try and fab a 1 mil silk line. Then +# again, it is most useful during parts placement. It really is time for some +# additional non-fab layers... +# ElementLine[eval(-1*V1/2) eval(-1*V2/2) eval(-1*V1/2) eval( V2/2) CYW] +# ElementLine[eval(-1*V1/2) eval(-1*V2/2) eval( V1/2) eval(-1*V2/2) CYW] +# ElementLine[eval( V1/2) eval( V2/2) eval( V1/2) eval(-1*V2/2) CYW] +# ElementLine[eval( V1/2) eval( V2/2) eval(-1*V1/2) eval( V2/2) CYW] +) Index: trunk/pcblib/smd/0201.fp =================================================================== --- trunk/pcblib/smd/0201.fp (nonexistent) +++ trunk/pcblib/smd/0201.fp (revision 326) @@ -0,0 +1,27 @@ + # grab the input values and convert to 1/100 mil + # how much to grow the pads by for soldermask [1/100 mil] + # clearance from planes [1/100 mil] + # silk screen width [1/100 mil] + # courtyard silk screen width [1/100 mil] +# element_flags, description, pcb-name, value, mark_x, mark_y, +# text_x, text_y, text_direction, text_scale, text_flags +Element[0x00000000 "Standard SMT resistor, capacitor etc" "" "0201" 0 0 -3150 -3150 0 100 ""] +( +# +# Pad[x1, y1, x2, y2, thickness, clearance, mask, name , pad number, flags] + Pad[-1181 0 + -1181 0 + 1574 2000 2174 "1" "1" "square"] + Pad[1181 0 + 1181 0 + 1574 2000 2174 "2" "2" "square"] +# +# This draws a 1 mil placement courtyard outline in silk. It should probably +# not be included since you wont want to try and fab a 1 mil silk line. Then +# again, it is most useful during parts placement. It really is time for some +# additional non-fab layers... +# ElementLine[eval(-1*V1/2) eval(-1*V2/2) eval(-1*V1/2) eval( V2/2) CYW] +# ElementLine[eval(-1*V1/2) eval(-1*V2/2) eval( V1/2) eval(-1*V2/2) CYW] +# ElementLine[eval( V1/2) eval( V2/2) eval( V1/2) eval(-1*V2/2) CYW] +# ElementLine[eval( V1/2) eval( V2/2) eval(-1*V1/2) eval( V2/2) CYW] +) Index: trunk/pcblib/smd/0402.fp =================================================================== --- trunk/pcblib/smd/0402.fp (nonexistent) +++ trunk/pcblib/smd/0402.fp (revision 326) @@ -0,0 +1,27 @@ + # grab the input values and convert to 1/100 mil + # how much to grow the pads by for soldermask [1/100 mil] + # clearance from planes [1/100 mil] + # silk screen width [1/100 mil] + # courtyard silk screen width [1/100 mil] +# element_flags, description, pcb-name, value, mark_x, mark_y, +# text_x, text_y, text_direction, text_scale, text_flags +Element[0x00000000 "Standard SMT resistor, capacitor etc" "" "0402" 0 0 -3150 -3150 0 100 ""] +( +# +# Pad[x1, y1, x2, y2, thickness, clearance, mask, name , pad number, flags] + Pad[-1574 -393 + -1574 393 + 1968 2000 2568 "1" "1" "square"] + Pad[1574 -393 + 1574 393 + 1968 2000 2568 "2" "2" "square"] +# +# This draws a 1 mil placement courtyard outline in silk. It should probably +# not be included since you wont want to try and fab a 1 mil silk line. Then +# again, it is most useful during parts placement. It really is time for some +# additional non-fab layers... +# ElementLine[eval(-1*V1/2) eval(-1*V2/2) eval(-1*V1/2) eval( V2/2) CYW] +# ElementLine[eval(-1*V1/2) eval(-1*V2/2) eval( V1/2) eval(-1*V2/2) CYW] +# ElementLine[eval( V1/2) eval( V2/2) eval( V1/2) eval(-1*V2/2) CYW] +# ElementLine[eval( V1/2) eval( V2/2) eval(-1*V1/2) eval( V2/2) CYW] +) Index: trunk/pcblib/smd/0603.fp =================================================================== --- trunk/pcblib/smd/0603.fp (nonexistent) +++ trunk/pcblib/smd/0603.fp (revision 326) @@ -0,0 +1,27 @@ + # grab the input values and convert to 1/100 mil + # how much to grow the pads by for soldermask [1/100 mil] + # clearance from planes [1/100 mil] + # silk screen width [1/100 mil] + # courtyard silk screen width [1/100 mil] +# element_flags, description, pcb-name, value, mark_x, mark_y, +# text_x, text_y, text_direction, text_scale, text_flags +Element[0x00000000 "Standard SMT resistor, capacitor etc" "" "0603" 0 0 -3150 -3150 0 100 ""] +( +# +# Pad[x1, y1, x2, y2, thickness, clearance, mask, name , pad number, flags] + Pad[-2559 -492 + -2559 492 + 2952 2000 3552 "1" "1" "square"] + Pad[2559 -492 + 2559 492 + 2952 2000 3552 "2" "2" "square"] +# +# This draws a 1 mil placement courtyard outline in silk. It should probably +# not be included since you wont want to try and fab a 1 mil silk line. Then +# again, it is most useful during parts placement. It really is time for some +# additional non-fab layers... +# ElementLine[eval(-1*V1/2) eval(-1*V2/2) eval(-1*V1/2) eval( V2/2) CYW] +# ElementLine[eval(-1*V1/2) eval(-1*V2/2) eval( V1/2) eval(-1*V2/2) CYW] +# ElementLine[eval( V1/2) eval( V2/2) eval( V1/2) eval(-1*V2/2) CYW] +# ElementLine[eval( V1/2) eval( V2/2) eval(-1*V1/2) eval( V2/2) CYW] +) Index: trunk/pcblib/smd/0805.fp =================================================================== --- trunk/pcblib/smd/0805.fp (nonexistent) +++ trunk/pcblib/smd/0805.fp (revision 326) @@ -0,0 +1,29 @@ + # grab the input values and convert to 1/100 mil + # how much to grow the pads by for soldermask [1/100 mil] + # clearance from planes [1/100 mil] + # silk screen width [1/100 mil] + # courtyard silk screen width [1/100 mil] +# element_flags, description, pcb-name, value, mark_x, mark_y, +# text_x, text_y, text_direction, text_scale, text_flags +Element[0x00000000 "Standard SMT resistor, capacitor etc" "" "0805" 0 0 -3150 -3150 0 100 ""] +( +# +# Pad[x1, y1, x2, y2, thickness, clearance, mask, name , pad number, flags] + Pad[-3543 -393 + -3543 393 + 5118 2000 5718 "1" "1" "square"] + Pad[3543 -393 + 3543 393 + 5118 2000 5718 "2" "2" "square"] + ElementLine[-393 -2755 393 -2755 800] + ElementLine[-393 2755 393 2755 800] +# +# This draws a 1 mil placement courtyard outline in silk. It should probably +# not be included since you wont want to try and fab a 1 mil silk line. Then +# again, it is most useful during parts placement. It really is time for some +# additional non-fab layers... +# ElementLine[eval(-1*V1/2) eval(-1*V2/2) eval(-1*V1/2) eval( V2/2) CYW] +# ElementLine[eval(-1*V1/2) eval(-1*V2/2) eval( V1/2) eval(-1*V2/2) CYW] +# ElementLine[eval( V1/2) eval( V2/2) eval( V1/2) eval(-1*V2/2) CYW] +# ElementLine[eval( V1/2) eval( V2/2) eval(-1*V1/2) eval( V2/2) CYW] +) Index: trunk/pcblib/smd/1008.fp =================================================================== --- trunk/pcblib/smd/1008.fp (nonexistent) +++ trunk/pcblib/smd/1008.fp (revision 326) @@ -0,0 +1,29 @@ + # grab the input values and convert to 1/100 mil + # how much to grow the pads by for soldermask [1/100 mil] + # clearance from planes [1/100 mil] + # silk screen width [1/100 mil] + # courtyard silk screen width [1/100 mil] +# element_flags, description, pcb-name, value, mark_x, mark_y, +# text_x, text_y, text_direction, text_scale, text_flags +Element[0x00000000 "Standard SMT resistor, capacitor etc" "" "1008" 0 0 -3150 -3150 0 100 ""] +( +# +# Pad[x1, y1, x2, y2, thickness, clearance, mask, name , pad number, flags] + Pad[-5118 -2362 + -5118 2362 + 4330 2000 4930 "1" "1" "square"] + Pad[5118 -2362 + 5118 2362 + 4330 2000 4930 "2" "2" "square"] + ElementLine[-1377 -4527 1377 -4527 800] + ElementLine[-1377 4527 1377 4527 800] +# +# This draws a 1 mil placement courtyard outline in silk. It should probably +# not be included since you wont want to try and fab a 1 mil silk line. Then +# again, it is most useful during parts placement. It really is time for some +# additional non-fab layers... +# ElementLine[eval(-1*V1/2) eval(-1*V2/2) eval(-1*V1/2) eval( V2/2) CYW] +# ElementLine[eval(-1*V1/2) eval(-1*V2/2) eval( V1/2) eval(-1*V2/2) CYW] +# ElementLine[eval( V1/2) eval( V2/2) eval( V1/2) eval(-1*V2/2) CYW] +# ElementLine[eval( V1/2) eval( V2/2) eval(-1*V1/2) eval( V2/2) CYW] +) Index: trunk/pcblib/smd/1206.fp =================================================================== --- trunk/pcblib/smd/1206.fp (nonexistent) +++ trunk/pcblib/smd/1206.fp (revision 326) @@ -0,0 +1,29 @@ + # grab the input values and convert to 1/100 mil + # how much to grow the pads by for soldermask [1/100 mil] + # clearance from planes [1/100 mil] + # silk screen width [1/100 mil] + # courtyard silk screen width [1/100 mil] +# element_flags, description, pcb-name, value, mark_x, mark_y, +# text_x, text_y, text_direction, text_scale, text_flags +Element[0x00000000 "Standard SMT resistor, capacitor etc" "" "1206" 0 0 -3150 -3150 0 100 ""] +( +# +# Pad[x1, y1, x2, y2, thickness, clearance, mask, name , pad number, flags] + Pad[-5905 -1181 + -5905 1181 + 5118 2000 5718 "1" "1" "square"] + Pad[5905 -1181 + 5905 1181 + 5118 2000 5718 "2" "2" "square"] + ElementLine[-2362 -3740 2362 -3740 800] + ElementLine[-2362 3740 2362 3740 800] +# +# This draws a 1 mil placement courtyard outline in silk. It should probably +# not be included since you wont want to try and fab a 1 mil silk line. Then +# again, it is most useful during parts placement. It really is time for some +# additional non-fab layers... +# ElementLine[eval(-1*V1/2) eval(-1*V2/2) eval(-1*V1/2) eval( V2/2) CYW] +# ElementLine[eval(-1*V1/2) eval(-1*V2/2) eval( V1/2) eval(-1*V2/2) CYW] +# ElementLine[eval( V1/2) eval( V2/2) eval( V1/2) eval(-1*V2/2) CYW] +# ElementLine[eval( V1/2) eval( V2/2) eval(-1*V1/2) eval( V2/2) CYW] +) Index: trunk/pcblib/smd/1210.fp =================================================================== --- trunk/pcblib/smd/1210.fp (nonexistent) +++ trunk/pcblib/smd/1210.fp (revision 326) @@ -0,0 +1,29 @@ + # grab the input values and convert to 1/100 mil + # how much to grow the pads by for soldermask [1/100 mil] + # clearance from planes [1/100 mil] + # silk screen width [1/100 mil] + # courtyard silk screen width [1/100 mil] +# element_flags, description, pcb-name, value, mark_x, mark_y, +# text_x, text_y, text_direction, text_scale, text_flags +Element[0x00000000 "Standard SMT resistor, capacitor etc" "" "1210" 0 0 -3150 -3150 0 100 ""] +( +# +# Pad[x1, y1, x2, y2, thickness, clearance, mask, name , pad number, flags] + Pad[-5905 -2755 + -5905 2755 + 5118 2000 5718 "1" "1" "square"] + Pad[5905 -2755 + 5905 2755 + 5118 2000 5718 "2" "2" "square"] + ElementLine[-1968 -5314 1968 -5314 800] + ElementLine[-1968 5314 1968 5314 800] +# +# This draws a 1 mil placement courtyard outline in silk. It should probably +# not be included since you wont want to try and fab a 1 mil silk line. Then +# again, it is most useful during parts placement. It really is time for some +# additional non-fab layers... +# ElementLine[eval(-1*V1/2) eval(-1*V2/2) eval(-1*V1/2) eval( V2/2) CYW] +# ElementLine[eval(-1*V1/2) eval(-1*V2/2) eval( V1/2) eval(-1*V2/2) CYW] +# ElementLine[eval( V1/2) eval( V2/2) eval( V1/2) eval(-1*V2/2) CYW] +# ElementLine[eval( V1/2) eval( V2/2) eval(-1*V1/2) eval( V2/2) CYW] +) Index: trunk/pcblib/smd/1806.fp =================================================================== --- trunk/pcblib/smd/1806.fp (nonexistent) +++ trunk/pcblib/smd/1806.fp (revision 326) @@ -0,0 +1,29 @@ + # grab the input values and convert to 1/100 mil + # how much to grow the pads by for soldermask [1/100 mil] + # clearance from planes [1/100 mil] + # silk screen width [1/100 mil] + # courtyard silk screen width [1/100 mil] +# element_flags, description, pcb-name, value, mark_x, mark_y, +# text_x, text_y, text_direction, text_scale, text_flags +Element[0x00000000 "Standard SMT resistor, capacitor etc" "" "1806" 0 0 -3150 -3150 0 100 ""] +( +# +# Pad[x1, y1, x2, y2, thickness, clearance, mask, name , pad number, flags] + Pad[-7874 -3543 + -7874 3543 + 6299 2000 6899 "1" "1" "square"] + Pad[7874 -3543 + 7874 3543 + 6299 2000 6899 "2" "2" "square"] + ElementLine[-3149 -6692 3149 -6692 800] + ElementLine[-3149 6692 3149 6692 800] +# +# This draws a 1 mil placement courtyard outline in silk. It should probably +# not be included since you wont want to try and fab a 1 mil silk line. Then +# again, it is most useful during parts placement. It really is time for some +# additional non-fab layers... +# ElementLine[eval(-1*V1/2) eval(-1*V2/2) eval(-1*V1/2) eval( V2/2) CYW] +# ElementLine[eval(-1*V1/2) eval(-1*V2/2) eval( V1/2) eval(-1*V2/2) CYW] +# ElementLine[eval( V1/2) eval( V2/2) eval( V1/2) eval(-1*V2/2) CYW] +# ElementLine[eval( V1/2) eval( V2/2) eval(-1*V1/2) eval( V2/2) CYW] +) Index: trunk/pcblib/smd/1825.fp =================================================================== --- trunk/pcblib/smd/1825.fp (nonexistent) +++ trunk/pcblib/smd/1825.fp (revision 326) @@ -0,0 +1,29 @@ + # grab the input values and convert to 1/100 mil + # how much to grow the pads by for soldermask [1/100 mil] + # clearance from planes [1/100 mil] + # silk screen width [1/100 mil] + # courtyard silk screen width [1/100 mil] +# element_flags, description, pcb-name, value, mark_x, mark_y, +# text_x, text_y, text_direction, text_scale, text_flags +Element[0x00000000 "Standard SMT resistor, capacitor etc" "" "1825" 0 0 -3150 -3150 0 100 ""] +( +# +# Pad[x1, y1, x2, y2, thickness, clearance, mask, name , pad number, flags] + Pad[-7874 -10236 + -7874 10236 + 6299 2000 6899 "1" "1" "square"] + Pad[7874 -10236 + 7874 10236 + 6299 2000 6899 "2" "2" "square"] + ElementLine[-3149 -13385 3149 -13385 800] + ElementLine[-3149 13385 3149 13385 800] +# +# This draws a 1 mil placement courtyard outline in silk. It should probably +# not be included since you wont want to try and fab a 1 mil silk line. Then +# again, it is most useful during parts placement. It really is time for some +# additional non-fab layers... +# ElementLine[eval(-1*V1/2) eval(-1*V2/2) eval(-1*V1/2) eval( V2/2) CYW] +# ElementLine[eval(-1*V1/2) eval(-1*V2/2) eval( V1/2) eval(-1*V2/2) CYW] +# ElementLine[eval( V1/2) eval( V2/2) eval( V1/2) eval(-1*V2/2) CYW] +# ElementLine[eval( V1/2) eval( V2/2) eval(-1*V1/2) eval( V2/2) CYW] +) Index: trunk/pcblib/smd/2706.fp =================================================================== --- trunk/pcblib/smd/2706.fp (nonexistent) +++ trunk/pcblib/smd/2706.fp (revision 326) @@ -0,0 +1,15 @@ + # how much to grow the pads by for soldermask + # clearance from planes +Element(0x00 "Standard SMT resistor, capacitor etc" "" "2706" 0 0 179 0 3 100 0x00) +( + ElementLine(-159 -54 -159 54 10) + ElementLine(-159 54 159 54 10) + ElementLine(159 54 159 -54 10) + ElementLine(159 -54 -159 -54 10) + Pad(-108 -3 + -108 3 + 78 20 84 "1" "1" 0x00000100) + Pad(108 -3 + 108 3 + 78 20 84 "2" "2" 0x00000100) +) Index: trunk/pcblib/smd/DO214.fp =================================================================== --- trunk/pcblib/smd/DO214.fp (nonexistent) +++ trunk/pcblib/smd/DO214.fp (revision 326) @@ -0,0 +1,17 @@ + # how much to grow the pads by for soldermask + # clearance from planes +Element(0x00 "SMT diode (pin 1 is cathode)" "" "DO214" 0 0 221 0 3 100 0x00) +( + ElementLine(-211 -89 -211 89 20) + ElementLine(-211 89 -141 114 10) + ElementLine(-141 114 201 114 10) + ElementLine(201 114 201 -114 10) + ElementLine(201 -114 -141 -114 10) + ElementLine(-141 -114 -211 -89 10) + Pad(-106 -19 + -106 19 + 140 20 146 "1" "1" 0x00000100) + Pad(106 -19 + 106 19 + 140 20 146 "2" "2" 0x00000100) +) Index: trunk/pcblib/smd/DO214AB.fp =================================================================== --- trunk/pcblib/smd/DO214AB.fp (nonexistent) +++ trunk/pcblib/smd/DO214AB.fp (revision 326) @@ -0,0 +1,17 @@ + # how much to grow the pads by for soldermask + # clearance from planes +Element(0x00 "SMT diode (pin 1 is cathode)" "" "DO214AB" 0 0 227 0 3 100 0x00) +( + ElementLine(-217 -92 -217 92 20) + ElementLine(-217 92 -145 118 10) + ElementLine(-145 118 207 118 10) + ElementLine(207 118 207 -118 10) + ElementLine(207 -118 -145 -118 10) + ElementLine(-145 -118 -217 -92 10) + Pad(-109 -20 + -109 20 + 145 20 151 "1" "1" 0x00000100) + Pad(109 -20 + 109 20 + 145 20 151 "2" "2" 0x00000100) +) Index: trunk/pcblib/smd/MPAK.fp =================================================================== --- trunk/pcblib/smd/MPAK.fp (nonexistent) +++ trunk/pcblib/smd/MPAK.fp (revision 326) @@ -0,0 +1,26 @@ +Element(0x00 "Pressure transducer" "" "MPAK" 235 0 3 100 0x00) +( + ElementLine(0 0 0 558 10) + ElementLine(0 558 215 558 10) + ElementLine(215 558 215 0 10) + ElementLine(215 0 0 0 10) + # 1st pin on pin side + Pad(32 469 + 32 525 + 31 "1" "1" 0x100) + Pad(82 469 + 82 525 + 31 "2" "2" 0x100) + Pad(132 469 + 132 525 + 31 "3" "3" 0x100) + # last pin on pin side + Pad(182 469 + 182 525 + 31 "4" "4" 0x100) + # extra wide pin on opposite side + Pad(144 60 + 70 60 + 87 "5" "5" 0x100) + Mark(32 497) +) Index: trunk/pcblib/tru-hole/HC49.fp =================================================================== --- trunk/pcblib/tru-hole/HC49.fp (nonexistent) +++ trunk/pcblib/tru-hole/HC49.fp (revision 326) @@ -0,0 +1,10 @@ +Element(0x00 "Crystals" "" "HC49" 0 -60 0 100 0x00) +( + Pin(50 50 60 28 "1" 0x101) + Pin(250 50 60 28 "2" 0x01) + ElementLine(50 0 250 0 20) + ElementArc(250 50 50 50 90 180 20) + ElementLine(250 100 50 100 20) + ElementArc(50 50 50 50 270 180 20) + Mark(50 50) +) Index: trunk/pcblib/tru-hole/HC49U.fp =================================================================== --- trunk/pcblib/tru-hole/HC49U.fp (nonexistent) +++ trunk/pcblib/tru-hole/HC49U.fp (revision 326) @@ -0,0 +1,10 @@ +Element(0x00 "Crystals" "" "HC49U" 0 -60 0 100 0x00) +( + Pin(121 91 60 32 "1" 0x101) + Pin(313 91 60 32 "2" 0x01) + ElementLine(91 0 344 0 20) + ElementArc(344 91 91 91 90 180 20) + ElementLine(344 183 91 183 20) + ElementArc(91 91 91 91 270 180 20) + Mark(121 91) +) Index: trunk/pcblib/tru-hole/HC49UH.fp =================================================================== --- trunk/pcblib/tru-hole/HC49UH.fp (nonexistent) +++ trunk/pcblib/tru-hole/HC49UH.fp (revision 326) @@ -0,0 +1,10 @@ +Element(0x00 "Crystals" "" "HC49UH" 0 -60 0 100 0x00) +( + Pin(121 615 60 32 "1" 0x101) + Pin(313 615 60 32 "2" 0x01) + ElementLine(0 0 435 0 20) + ElementLine(435 0 435 515 20) + ElementLine(435 515 0 515 20) + ElementLine(0 515 0 0 20) + Mark(121 615) +) Index: trunk/pcblib/tru-hole/HC49U_3.fp =================================================================== --- trunk/pcblib/tru-hole/HC49U_3.fp (nonexistent) +++ trunk/pcblib/tru-hole/HC49U_3.fp (revision 326) @@ -0,0 +1,11 @@ +Element(0x00 "Crystals" "" "HC49U_3" 0 -60 0 100 0x00) +( + Pin(121 91 60 32 "1" 0x101) + Pin(217 91 60 32 "2" 0x01) + Pin(313 91 60 32 "3" 0x01) + ElementLine(91 0 344 0 20) + ElementArc(344 91 91 91 90 180 20) + ElementLine(344 183 91 183 20) + ElementArc(91 91 91 91 270 180 20) + Mark(121 91) +) Index: trunk/pcblib/tru-hole/HC49U_3H.fp =================================================================== --- trunk/pcblib/tru-hole/HC49U_3H.fp (nonexistent) +++ trunk/pcblib/tru-hole/HC49U_3H.fp (revision 326) @@ -0,0 +1,11 @@ +Element(0x00 "Crystals" "" "HC49U_3H" 0 -60 0 100 0x00) +( + Pin(121 615 60 32 "1" 0x101) + Pin(217 615 60 32 "2" 0x01) + Pin(313 615 60 32 "3" 0x01) + ElementLine(0 0 435 0 20) + ElementLine(435 0 435 515 20) + ElementLine(435 515 0 515 20) + ElementLine(0 515 0 0 20) + Mark(121 615) +) Index: trunk/pcblib/tru-hole/HC51U.fp =================================================================== --- trunk/pcblib/tru-hole/HC51U.fp (nonexistent) +++ trunk/pcblib/tru-hole/HC51U.fp (revision 326) @@ -0,0 +1,10 @@ +Element(0x00 "Crystals" "" "HC51U" 0 -60 0 100 0x00) +( + Pin(136 176 80 40 "1" 0x101) + Pin(621 176 80 40 "2" 0x01) + ElementLine(176 0 581 0 20) + ElementArc(581 176 176 176 90 180 20) + ElementLine(581 352 176 352 20) + ElementArc(176 176 176 176 270 180 20) + Mark(136 176) +) Index: trunk/pcblib/tru-hole/HC51UH.fp =================================================================== --- trunk/pcblib/tru-hole/HC51UH.fp (nonexistent) +++ trunk/pcblib/tru-hole/HC51UH.fp (revision 326) @@ -0,0 +1,10 @@ +Element(0x00 "Crystals" "" "HC51UH" 0 -60 0 100 0x00) +( + Pin(136 975 80 40 "1" 0x101) + Pin(621 975 80 40 "2" 0x01) + ElementLine(0 0 757 0 20) + ElementLine(757 0 757 775 20) + ElementLine(757 775 0 775 20) + ElementLine(0 775 0 0 20) + Mark(136 975) +) Index: trunk/pcblib/tru-hole/HEPTAWATT.fp =================================================================== --- trunk/pcblib/tru-hole/HEPTAWATT.fp (nonexistent) +++ trunk/pcblib/tru-hole/HEPTAWATT.fp (revision 326) @@ -0,0 +1,18 @@ +Element(0x00 "Power IC, as in MULTIWATT15" "" "HEPTAWATT" 469 50 3 100 0x00) +( + Pin(54 310 90 60 "1" 0x101) + Pin(104 110 90 60 "2" 0x01) + Pin(154 310 90 60 "3" 0x01) + Pin(204 110 90 60 "4" 0x01) + Pin(254 310 90 60 "5" 0x01) + Pin(304 110 90 60 "6" 0x01) + Pin(354 310 90 60 "7" 0x01) + ElementLine(0 0 0 189 20) + ElementLine(0 189 409 189 20) + ElementLine(409 189 409 0 20) + ElementLine(409 0 0 0 20) + ElementLine(0 50 409 50 10) + ElementLine(129 0 129 50 10) + ElementLine(279 0 279 50 10) + Mark(54 249) + ) Index: trunk/pcblib/tru-hole/OSC14.fp =================================================================== --- trunk/pcblib/tru-hole/OSC14.fp (nonexistent) +++ trunk/pcblib/tru-hole/OSC14.fp (revision 326) @@ -0,0 +1,23 @@ + Element(0x00 "Crystal oscillator" "" "OSC14" 270 300 3 100 0x00) +( + Pin(100 100 50 28 "NC" 0x01) + Pin(100 700 50 28 "GND" 0x01) + Pin(400 700 50 28 "CLK" 0x01) + Pin(400 100 50 28 "VCC" 0x01) + ElementLine(5 5 400 5 10) + ElementArc(400 100 95 95 180 90 10) + ElementLine(495 100 495 700 10) + ElementArc(400 700 95 95 90 90 10) + ElementLine(400 795 100 795 10) + ElementArc(100 700 95 95 0 90 10) + ElementLine(5 700 5 5 10) + ElementLine(100 60 400 60 10) + ElementArc(400 100 40 40 180 90 10) + ElementLine(440 100 440 700 10) + ElementArc(400 700 40 40 90 90 10) + ElementLine(400 740 100 740 10) + ElementArc(100 700 40 40 0 90 10) + ElementLine(60 700 60 100 10) + ElementArc(100 100 40 40 270 90 10) + Mark(100 100) +) Index: trunk/pcblib/tru-hole/PENTAWATT.fp =================================================================== --- trunk/pcblib/tru-hole/PENTAWATT.fp (nonexistent) +++ trunk/pcblib/tru-hole/PENTAWATT.fp (revision 326) @@ -0,0 +1,16 @@ +Element(0x00 "Power IC, as in MULTIWATT15" "" "PENTAWATT" 469 50 3 100 0x00) +( + Pin(70 334 90 60 "1" 0x101) + Pin(137 177 90 60 "2" 0x01) + Pin(204 334 90 60 "3" 0x01) + Pin(271 177 90 60 "4" 0x01) + Pin(338 334 90 60 "5" 0x01) + ElementLine(0 0 0 189 20) + ElementLine(0 189 409 189 20) + ElementLine(409 189 409 0 20) + ElementLine(409 0 0 0 20) + ElementLine(0 50 409 50 10) + ElementLine(129 0 129 50 10) + ElementLine(279 0 279 50 10) + Mark(70 249) + )