Index: trunk/src/find_geo.c =================================================================== --- trunk/src/find_geo.c (revision 32746) +++ trunk/src/find_geo.c (revision 32747) @@ -1153,7 +1153,7 @@ return pcb_is_point_in_line(sc->data.circ.x + c->x, sc->data.circ.y + c->y, sc->data.circ.dia/2, &tmp); } -RND_INLINE rnd_bool_t pcb_pstk_shape_intersect(const pcb_find_t *ctx, pcb_pstk_t *ps1, pcb_pstk_shape_t *shape1, pcb_pstk_t *ps2, pcb_pstk_shape_t *shape2) +RND_INLINE rnd_bool_t pcb_pstk_shape_intersect_(const pcb_find_t *ctx, pcb_pstk_t *ps1, pcb_pstk_shape_t *shape1, pcb_pstk_t *ps2, pcb_pstk_shape_t *shape2) { if ((shape1->shape == PCB_PSSH_POLY) && (shape1->data.poly.pa == NULL)) pcb_pstk_shape_update_pa(&shape1->data.poly); @@ -1223,6 +1223,13 @@ return rnd_false; } +rnd_bool_t pcb_pstk_shape_intersect(pcb_pstk_t *ps1, pcb_pstk_shape_t *shape1, pcb_pstk_t *ps2, pcb_pstk_shape_t *shape2) +{ + static const pcb_find_t ctx = {0}; + return pcb_pstk_shape_intersect_(&ctx, ps1, shape1, ps2, shape2); +} + + RND_INLINE rnd_bool_t pcb_isc_pstk_pstk(const pcb_find_t *ctx, pcb_pstk_t *ps1, pcb_pstk_t *ps2, rnd_bool anylayer) { pcb_layer_t *ly; @@ -1234,7 +1241,7 @@ pcb_pstk_tshape_t *tshp1 = pcb_pstk_get_tshape(ps1), *tshp2 = pcb_pstk_get_tshape(ps2); for(n1 = 0; n1 < tshp1->len; n1++) { for(n2 = 0; n2 < tshp2->len; n2++) { - if (pcb_pstk_shape_intersect(ctx, ps1, &tshp1->shape[n1], ps2, &tshp2->shape[n2])) + if (pcb_pstk_shape_intersect_(ctx, ps1, &tshp1->shape[n1], ps2, &tshp2->shape[n2])) return rnd_true; } } @@ -1255,7 +1262,7 @@ shape1 = pcb_pstk_shape_at(PCB, ps1, ly); shape2 = pcb_pstk_shape_at(PCB, ps2, ly); - if ((shape1 != NULL) && (shape2 != NULL) && pcb_pstk_shape_intersect(ctx, ps1, shape1, ps2, shape2)) return rnd_true; + if ((shape1 != NULL) && (shape2 != NULL) && pcb_pstk_shape_intersect_(ctx, ps1, shape1, ps2, shape2)) return rnd_true; if (proto1->hplated) slshape1 = pcb_pstk_shape_mech_or_hole_at(PCB, ps1, ly, &sltmp1); @@ -1262,9 +1269,9 @@ if (proto2->hplated) slshape2 = pcb_pstk_shape_mech_or_hole_at(PCB, ps2, ly, &sltmp2); - if ((slshape1 != NULL) && (shape2 != NULL) && pcb_pstk_shape_intersect(ctx, ps1, slshape1, ps2, shape2)) return rnd_true; - if ((slshape2 != NULL) && (shape1 != NULL) && pcb_pstk_shape_intersect(ctx, ps2, slshape2, ps1, shape1)) return rnd_true; - if ((slshape1 != NULL) && (slshape2 != NULL) && pcb_pstk_shape_intersect(ctx, ps1, slshape1, ps2, slshape2)) return rnd_true; + if ((slshape1 != NULL) && (shape2 != NULL) && pcb_pstk_shape_intersect_(ctx, ps1, slshape1, ps2, shape2)) return rnd_true; + if ((slshape2 != NULL) && (shape1 != NULL) && pcb_pstk_shape_intersect_(ctx, ps2, slshape2, ps1, shape1)) return rnd_true; + if ((slshape1 != NULL) && (slshape2 != NULL) && pcb_pstk_shape_intersect_(ctx, ps1, slshape1, ps2, slshape2)) return rnd_true; } return rnd_false; } Index: trunk/src/obj_pstk_shape.h =================================================================== --- trunk/src/obj_pstk_shape.h (revision 32746) +++ trunk/src/obj_pstk_shape.h (revision 32747) @@ -64,6 +64,7 @@ PCB_PSSH_HSHADOW /* for clearance: pretend the shape is the same as the drill's or slot's; but do not add anything positive to the target layer */ } shape; rnd_coord_t clearance; /* per layer clearance: internal layer clearance is sometimes different for production or insulation reasons (IPC2221A) */ + unsigned hconn:1; /* shape is connected to hole/slot; this is abstract, it ignores plating and bbvia aspects */ } pcb_pstk_shape_t; /* transformed prototype */ @@ -79,4 +80,8 @@ void pcb_pstk_shape_rot(pcb_pstk_shape_t *sh, double sina, double cosa, double angle); void pcb_pstk_shape_smirror(pcb_pstk_shape_t *sh); +/* Return whether shape1 in ps1 intersects with shape2 in ps2 (regardless + of layer positions) */ +rnd_bool_t pcb_pstk_shape_intersect(pcb_pstk_t *ps1, pcb_pstk_shape_t *shape1, pcb_pstk_t *ps2, pcb_pstk_shape_t *shape2); + #endif