Index: routest.c =================================================================== --- routest.c (revision 34411) +++ routest.c (revision 34412) @@ -98,7 +98,7 @@ /* Update the edit dialog and all checkboxes, but nothing else on the sub */ static void rst_force_update_chk_and_dlg() { - int n, target = pcb_route_style_lookup(&PCB->RouteStyle, conf_core.design.line_thickness, conf_core.design.via_thickness, conf_core.design.via_drilling_hole, conf_core.design.clearance, NULL); + int n, target = PCB_LOOKUP_ROUTE_STYLE_PEN(PCB); rnd_hid_attr_val_t hv; idx_changed(); @@ -133,7 +133,7 @@ if (rst.sub_inited) { int n, target; - target = pcb_route_style_lookup(&PCB->RouteStyle, conf_core.design.line_thickness, conf_core.design.via_thickness, conf_core.design.via_drilling_hole, conf_core.design.clearance, NULL); + target = PCB_LOOKUP_ROUTE_STYLE_PEN(PCB); for(n = 0; n < vtroutestyle_len(&PCB->RouteStyle); n++) { rnd_hid_attr_val_t hv; @@ -172,7 +172,7 @@ static void rst_edit_cb(void *hid_ctx, void *caller_data, rnd_hid_attribute_t *attr) { - int target = pcb_route_style_lookup(&PCB->RouteStyle, conf_core.design.line_thickness, conf_core.design.via_thickness, conf_core.design.via_drilling_hole, conf_core.design.clearance, NULL); + int target = PCB_LOOKUP_ROUTE_STYLE_PEN(PCB); if (target >= 0) pcb_dlg_rstdlg(target); } @@ -186,7 +186,7 @@ static void rst_del_cb(void *hid_ctx, void *caller_data, rnd_hid_attribute_t *attr) { - int target = pcb_route_style_lookup(&PCB->RouteStyle, conf_core.design.line_thickness, conf_core.design.via_thickness, conf_core.design.via_drilling_hole, conf_core.design.clearance, NULL); + int target = PCB_LOOKUP_ROUTE_STYLE_PEN(PCB); if (target >= 0) { pcb_route_style_del(PCB, target, 1); rst_updated(NULL); Index: routest_dlg.c =================================================================== --- routest_dlg.c (revision 34411) +++ routest_dlg.c (revision 34412) @@ -27,6 +27,7 @@ /* included from routest.c - split for clarity */ #include +#include "route_style.h" #include "brave.h" @@ -240,7 +241,7 @@ args[3].val.nat_long = rst->via_proto; err = rnd_actionv_bin(&PCB->hidlib, "pstklib", &res, 4, args); if ((err == 0) && (res.type == FGW_LONG)) { - pcb_font_id_t tmp = res.val.nat_long; + rnd_cardinal_t tmp = res.val.nat_long; pcb_route_style_change(PCB, rstdlg_ctx.curr, NULL, NULL, NULL, NULL, NULL, &tmp, 1); } } @@ -469,7 +470,7 @@ } if (idx < 0) { - idx = pcb_route_style_lookup(&PCB->RouteStyle, conf_core.design.line_thickness, conf_core.design.via_thickness, conf_core.design.via_drilling_hole, conf_core.design.clearance, NULL); + idx = PCB_LOOKUP_ROUTE_STYLE_PEN(PCB); if (idx < 0) { rnd_message(RND_MSG_ERROR, "No style selected\n"); RND_ACT_IRES(-1);