Index: pcblib/parametric/acy
===================================================================
--- pcblib/parametric/acy	(revision 345)
+++ pcblib/parametric/acy	(revision 346)
@@ -8,7 +8,7 @@
 #@@params spacing,pol,dia
 
 #@@param:spacing spacing between the two pins
-#@@pol: how to mark polarity (optional; default: do not mark polarity)
+#@@pol: how to mark polarity: none, sign, bar (optional; default: do not mark polarity)
 #@@dia: body diameter - affects the silk rectangle (optional; default: spacing/12)
 
 #@@include common.awk
Index: pcblib/parametric/acy.awk
===================================================================
--- pcblib/parametric/acy.awk	(revision 345)
+++ pcblib/parametric/acy.awk	(revision 346)
@@ -16,5 +16,24 @@
 	element_line(-spacing/2, 0, -spacing/4, 0)
 	element_line(+spacing/4, 0, +spacing/2, 0)
 
+	if (P["pol"] == "sign") {
+		size=mil(10)
+
+		offs_y = size*2.2
+		offs_x = DEFAULT["pin_ringdia"]/2+size*1.1
+		element_line(-size, 0, +size, 0)
+
+		offs_x = spacing - (DEFAULT["pin_ringdia"]/2+size*1.1)
+		element_line(-size, 0, +size, 0)
+		element_line(0, -size, 0, +size)
+	}
+	else if (P["pol"] == "bar") {
+		offs=DEFAULT["line_thickness"]
+		element_rectangle(-spacing/4-offs, -dia, -spacing/4+offs, +dia,  DEFAULT["line_thickness"]*4)
+	}
+	else if ((P["pol"] != "") && (P["pol"] != "none")) {
+		error("Invalid pol")
+	}
+
 	element_end()
 }