Index: trunk/src_plugins/io_pads/write.c =================================================================== --- trunk/src_plugins/io_pads/write.c (revision 34640) +++ trunk/src_plugins/io_pads/write.c (revision 34641) @@ -31,17 +31,23 @@ #include -#include "board.h" #include #include +#include "board.h" +#include "conf_core.h" + typedef struct { FILE *f; + pcb_board_t *pcb; double ver; } write_ctx_t; +#define CRD(c) ((long)rnd_round(RND_COORD_TO_MM(c) * 10000)) + static int pads_write_pcb_block(write_ctx_t *wctx) { + int coplyn; int gridu = 1; /* default to metric - it's 2021 after all... */ static const rnd_unit_t *unit_mm = NULL, *unit_mil; @@ -54,29 +60,32 @@ else if (rnd_conf.editor.grid_unit == unit_mil) gridu = 0; /* we don't ever set 2 for Inches */ + coplyn = pcb_layergrp_list(wctx->pcb, PCB_LYT_COPPER, NULL, 0); fprintf(wctx->f, "*PCB* GENERAL PARAMETERS OF THE PCB DESIGN\r\n\r\n"); - fprintf(wctx->f, "UNITS %d 2=Inches 1=Metric 0=Mils\r\n", gridu); + fprintf(wctx->f, "UNITS %d 2=Inches 1=Metric 0=Mils\r\n", gridu); + fprintf(wctx->f, "USERGRID % 6ld % 6ld Space between USER grid points\r\n", CRD(rnd_conf.editor.grid), CRD(rnd_conf.editor.grid)); + fprintf(wctx->f, "MAXIMUMLAYER % 2d Maximum routing layer\r\n", coplyn); + fprintf(wctx->f, "WORKLEVEL 0 Level items will be created on\r\n"); + fprintf(wctx->f, "DISPLAYLEVEL 1 toggle for displaying working level last\r\n"); + fprintf(wctx->f, "LAYERPAIR 1 2 Layer pair used to route connection\r\n"); + fprintf(wctx->f, "VIAMODE T Type of via to use when routing between layers\r\n"); + fprintf(wctx->f, "LINEWIDTH % 6ld Width items will be created with\r\n", CRD(conf_core.design.line_thickness)); + fprintf(wctx->f, "TEXTSIZE % 6ld % 6ld Height and LineWidth text will be created with\r\n", CRD(conf_core.design.text_scale), CRD(conf_core.design.text_thickness)); + fprintf(wctx->f, "JOBTIME 0 Amount of time spent on this PCB design\r\n"); + fprintf(wctx->f, "DOTGRID % 6ld % 6ld Space between graphic dots\r\n", CRD(rnd_conf.editor.grid), CRD(rnd_conf.editor.grid)); + fprintf(wctx->f, "SCALE 10.000 Scale of window expansion\r\n"); + fprintf(wctx->f, "ORIGIN % 6ld % 6ld User defined origin location\r\n", CRD(wctx->pcb->hidlib.grid_ox), CRD(wctx->pcb->hidlib.grid_oy)); + fprintf(wctx->f, "WINDOWCENTER % 6ld % 6ld Point defining the center of the window\r\n", CRD(wctx->pcb->hidlib.size_x/2.0), CRD(wctx->pcb->hidlib.size_y/2.0)); + fprintf(wctx->f, "BACKUPTIME 20 Number of minutes between database backups\r\n"); + fprintf(wctx->f, "REAL WIDTH 2 Widths greater then this are displayed real size\r\n"); + fprintf(wctx->f, "ALLSIGONOFF 1 All signal nets displayed on/off\r\n"); + fprintf(wctx->f, "REFNAMESIZE % 6ld % 6ld Height and LineWidth used by part ref. names\r\n", CRD(conf_core.design.text_scale), CRD(conf_core.design.text_thickness)); + fprintf(wctx->f, "HIGHLIGHT 0 Highlight nets flag\r\n"); + #if 0 -USERGRID 1 1 Space between USER grid points -MAXIMUMLAYER 8 Maximum routing layer -WORKLEVEL 0 Level items will be created on -DISPLAYLEVEL 1 toggle for displaying working level last -LAYERPAIR 1 2 Layer pair used to route connection -VIAMODE T Type of via to use when routing between layers -LINEWIDTH 12 Width items will be created with -TEXTSIZE 100 10 Height and LineWidth text will be created with -JOBTIME 58051 Amount of time spent on this PCB design -DOTGRID 100 100 Space between graphic dots -SCALE 19.506 Scale of window expansion -ORIGIN 15800 10000 User defined origin location -WINDOWCENTER 17983.65 11239.26 Point defining the center of the window -BACKUPTIME 20 Number of minutes between database backups -REAL WIDTH 2 Widths greater then this are displayed real size -ALLSIGONOFF 1 All signal nets displayed on/off -REFNAMESIZE 100 10 Height and LineWidth used by part ref. names -HIGHLIGHT 0 Highlight nets flag -JOBNAME Main_tss_VRN.pcb +these are not yet exported - need to check if we need them: +JOBNAME foo.pcb CONCOL 5 FBGCOL 1 0 HATCHGRID 10 Copper pour hatching grid @@ -126,6 +135,7 @@ write_ctx_t wctx; wctx.f = f; + wctx.pcb = PCB; wctx.ver = ver; fprintf(f, "!PADS-POWERPCB-V%.1f-METRIC! DESIGN DATABASE ASCII FILE 1.0\r\n", ver);