Index: trunk/src_plugins/io_pads/write.c =================================================================== --- trunk/src_plugins/io_pads/write.c (revision 35061) +++ trunk/src_plugins/io_pads/write.c (revision 35062) @@ -84,26 +84,26 @@ coplyn = pcb_layergrp_list(wctx->pcb, PCB_LYT_COPPER, NULL, 0); - rnd_fprintf(wctx->f, "*PCB* GENERAL PARAMETERS OF THE PCB DESIGN\r\n\r\n"); - rnd_fprintf(wctx->f, "UNITS %d 2=Inches 1=Metric 0=Mils\r\n", gridu); + fprintf(wctx->f, "*PCB* GENERAL PARAMETERS OF THE PCB DESIGN\r\n\r\n"); + fprintf(wctx->f, "UNITS %d 2=Inches 1=Metric 0=Mils\r\n", gridu); rnd_fprintf(wctx->f, "USERGRID %[4] %[4] Space between USER grid points\r\n", CRD(rnd_conf.editor.grid), CRD(rnd_conf.editor.grid)); - rnd_fprintf(wctx->f, "MAXIMUMLAYER % 2d Maximum routing layer\r\n", coplyn); - rnd_fprintf(wctx->f, "WORKLEVEL 0 Level items will be created on\r\n"); - rnd_fprintf(wctx->f, "DISPLAYLEVEL 1 toggle for displaying working level last\r\n"); - rnd_fprintf(wctx->f, "LAYERPAIR 1 2 Layer pair used to route connection\r\n"); - rnd_fprintf(wctx->f, "VIAMODE T Type of via to use when routing between layers\r\n"); + fprintf(wctx->f, "MAXIMUMLAYER % 2d Maximum routing layer\r\n", coplyn); + fprintf(wctx->f, "WORKLEVEL 0 Level items will be created on\r\n"); + fprintf(wctx->f, "DISPLAYLEVEL 1 toggle for displaying working level last\r\n"); + fprintf(wctx->f, "LAYERPAIR 1 2 Layer pair used to route connection\r\n"); + fprintf(wctx->f, "VIAMODE T Type of via to use when routing between layers\r\n"); rnd_fprintf(wctx->f, "LINEWIDTH %[4] Width items will be created with\r\n", CRD(conf_core.design.line_thickness)); rnd_fprintf(wctx->f, "TEXTSIZE %[4] %[4] Height and LineWidth text will be created with\r\n", CRD(conf_core.design.text_scale), CRD(conf_core.design.text_thickness)); - rnd_fprintf(wctx->f, "JOBTIME 0 Amount of time spent on this PCB design\r\n"); + fprintf(wctx->f, "JOBTIME 0 Amount of time spent on this PCB design\r\n"); rnd_fprintf(wctx->f, "DOTGRID %[4] %[4] Space between graphic dots\r\n", CRD(rnd_conf.editor.grid), CRD(rnd_conf.editor.grid)); - rnd_fprintf(wctx->f, "SCALE 10.000 Scale of window expansion\r\n"); + fprintf(wctx->f, "SCALE 10.000 Scale of window expansion\r\n"); rnd_fprintf(wctx->f, "ORIGIN %[4] %[4] User defined origin location\r\n", CRD(wctx->pcb->hidlib.grid_ox), CRD(wctx->pcb->hidlib.grid_oy)); rnd_fprintf(wctx->f, "WINDOWCENTER %[4] %[4] Point defining the center of the window\r\n", CRD(wctx->pcb->hidlib.size_x/2.0), CRD(wctx->pcb->hidlib.size_y/2.0)); - rnd_fprintf(wctx->f, "BACKUPTIME 20 Number of minutes between database backups\r\n"); - rnd_fprintf(wctx->f, "REAL WIDTH 2 Widths greater then this are displayed real size\r\n"); - rnd_fprintf(wctx->f, "ALLSIGONOFF 1 All signal nets displayed on/off\r\n"); + fprintf(wctx->f, "BACKUPTIME 20 Number of minutes between database backups\r\n"); + fprintf(wctx->f, "REAL WIDTH 2 Widths greater then this are displayed real size\r\n"); + fprintf(wctx->f, "ALLSIGONOFF 1 All signal nets displayed on/off\r\n"); rnd_fprintf(wctx->f, "REFNAMESIZE %[4] %[4] Height and LineWidth used by part ref. names\r\n", CRD(conf_core.design.text_scale), CRD(conf_core.design.text_thickness)); - rnd_fprintf(wctx->f, "HIGHLIGHT 0 Highlight nets flag\r\n"); + fprintf(wctx->f, "HIGHLIGHT 0 Highlight nets flag\r\n"); #if 0 these are not yet exported - need to check if we need them: @@ -142,22 +142,22 @@ TEARDROPDATA 90 90 #endif - rnd_fprintf(wctx->f, "\r\n"); + fprintf(wctx->f, "\r\n"); return 0; } static int pads_write_blk_reuse(write_ctx_t *wctx) { - rnd_fprintf(wctx->f, "*REUSE*\r\n"); - rnd_fprintf(wctx->f, "\r\n"); - rnd_fprintf(wctx->f, "*REMARK* TYPE TYPENAME\r\n"); - rnd_fprintf(wctx->f, "*REMARK* TIMESTAMP SECONDS\r\n"); - rnd_fprintf(wctx->f, "*REMARK* PART NAMING PARTNAMING\r\n"); - rnd_fprintf(wctx->f, "*REMARK* PART NAME\r\n"); - rnd_fprintf(wctx->f, "*REMARK* NET NAMING NETNAMING\r\n"); - rnd_fprintf(wctx->f, "*REMARK* NET MERGE NAME\r\n"); - rnd_fprintf(wctx->f, "*REMARK* REUSE INSTANCENM PARTNAMING NETNAMING X Y ORI GLUED\r\n"); - rnd_fprintf(wctx->f, "\r\n"); + fprintf(wctx->f, "*REUSE*\r\n"); + fprintf(wctx->f, "\r\n"); + fprintf(wctx->f, "*REMARK* TYPE TYPENAME\r\n"); + fprintf(wctx->f, "*REMARK* TIMESTAMP SECONDS\r\n"); + fprintf(wctx->f, "*REMARK* PART NAMING PARTNAMING\r\n"); + fprintf(wctx->f, "*REMARK* PART NAME\r\n"); + fprintf(wctx->f, "*REMARK* NET NAMING NETNAMING\r\n"); + fprintf(wctx->f, "*REMARK* NET MERGE NAME\r\n"); + fprintf(wctx->f, "*REMARK* REUSE INSTANCENM PARTNAMING NETNAMING X Y ORI GLUED\r\n"); + fprintf(wctx->f, "\r\n"); return 0; } @@ -168,13 +168,13 @@ char *alg = PCB_FLAG_TEST(PCB_FLAG_ONSOLDER, t) ? "RIGHT DOWN" : "LEFT UP"; if (is_label) - rnd_fprintf(wctx->f, "VALUE "); + fprintf(wctx->f, "VALUE "); else - rnd_fprintf(wctx->f, " "); + fprintf(wctx->f, " "); rnd_fprintf(wctx->f, "%[4] %[4] %f %d %[4] %[4] %c %s\r\n", CRDX(t->X), CRDY(t->Y), ROT(t->rot), plid, CRD(hght), (rnd_coord_t)RND_MM_TO_COORD(0.1), mir, alg); - rnd_fprintf(wctx->f, "Regular \r\n"); + fprintf(wctx->f, "Regular \r\n"); if (is_label) { if (strstr(t->TextString, "%a.parent.refdes%") != 0) fprintf(wctx->f, "Ref.Des.\r\n"); @@ -191,9 +191,9 @@ int li; pcb_layer_t *l; - rnd_fprintf(wctx->f, "*TEXT* FREE TEXT\r\n\r\n"); - rnd_fprintf(wctx->f, "*REMARK* XLOC YLOC ORI LEVEL HEIGHT WIDTH MIRRORED HJUST VJUST .REUSE. INSTANCENM\r\n"); - rnd_fprintf(wctx->f, "*REMARK* FONTSTYLE FONTFACE\r\n\r\n"); + fprintf(wctx->f, "*TEXT* FREE TEXT\r\n\r\n"); + fprintf(wctx->f, "*REMARK* XLOC YLOC ORI LEVEL HEIGHT WIDTH MIRRORED HJUST VJUST .REUSE. INSTANCENM\r\n"); + fprintf(wctx->f, "*REMARK* FONTSTYLE FONTFACE\r\n\r\n"); /* 1234 5678 90.000 20 70 10 N LEFT DOWN @@ -209,7 +209,7 @@ pads_write_text(wctx, t, plid, 0); } - rnd_fprintf(wctx->f, "\r\n"); + fprintf(wctx->f, "\r\n"); return 0; } @@ -243,7 +243,7 @@ { long n; - rnd_fprintf(wctx->f, "COPCLS %ld 0 %d\r\n", (long)p->PointN+1, plid); + fprintf(wctx->f, "COPCLS %ld 0 %d\r\n", (long)p->PointN+1, plid); for(n = 0; n < p->PointN; n++) rnd_fprintf(wctx->f, "%[4] %[4]\r\n", CRDX(p->Points[n].X), CRDY(p->Points[n].Y)); rnd_fprintf(wctx->f, "%[4] %[4]\r\n", CRDX(p->Points[0].X), CRDY(p->Points[0].Y)); @@ -254,12 +254,12 @@ rnd_layer_id_t lid; pcb_layer_t *ly; - rnd_fprintf(wctx->f, "*LINES* LINES ITEMS\r\n\r\n"); - rnd_fprintf(wctx->f, "*REMARK* NAME TYPE XLOC YLOC PIECES TEXT SIGSTR\r\n"); - rnd_fprintf(wctx->f, "*REMARK* .REUSE. INSTANCE RSIGNAL\r\n"); - rnd_fprintf(wctx->f, "*REMARK* PIECETYPE CORNERS WIDTHHGHT LINESTYLE LEVEL [RESTRICTIONS]\r\n"); - rnd_fprintf(wctx->f, "*REMARK* XLOC YLOC BEGINANGLE DELTAANGLE\r\n"); - rnd_fprintf(wctx->f, "*REMARK* XLOC YLOC ORI LEVEL HEIGHT WIDTH MIRRORED HJUST VJUST\r\n\r\n"); + fprintf(wctx->f, "*LINES* LINES ITEMS\r\n\r\n"); + fprintf(wctx->f, "*REMARK* NAME TYPE XLOC YLOC PIECES TEXT SIGSTR\r\n"); + fprintf(wctx->f, "*REMARK* .REUSE. INSTANCE RSIGNAL\r\n"); + fprintf(wctx->f, "*REMARK* PIECETYPE CORNERS WIDTHHGHT LINESTYLE LEVEL [RESTRICTIONS]\r\n"); + fprintf(wctx->f, "*REMARK* XLOC YLOC BEGINANGLE DELTAANGLE\r\n"); + fprintf(wctx->f, "*REMARK* XLOC YLOC ORI LEVEL HEIGHT WIDTH MIRRORED HJUST VJUST\r\n\r\n"); for(lid = 0, ly = wctx->pcb->Data->Layer; lid < wctx->pcb->Data->LayerN; lid++,ly++) { pcb_line_t *l; @@ -272,25 +272,25 @@ l = linelist_first(&ly->Line); if (l != NULL) { - rnd_fprintf(wctx->f, "lines_lid_%ld LINES 0 0 %ld\r\n", (long)lid, (long)linelist_length(&ly->Line)); + fprintf(wctx->f, "lines_lid_%ld LINES 0 0 %ld\r\n", (long)lid, (long)linelist_length(&ly->Line)); for(; l != NULL; l = linelist_next(l)) pads_write_piece_line(wctx, l, plid); } a = arclist_first(&ly->Arc); if (a != NULL) { - rnd_fprintf(wctx->f, "arcs_lid_%ld LINES 0 0 %ld\r\n", (long)lid, (long)arclist_length(&ly->Arc)); + fprintf(wctx->f, "arcs_lid_%ld LINES 0 0 %ld\r\n", (long)lid, (long)arclist_length(&ly->Arc)); for(; a != NULL; a = arclist_next(a)) pads_write_piece_arc(wctx, a, plid); } p = polylist_first(&ly->Polygon); if (p != NULL) { - rnd_fprintf(wctx->f, "polys_lid_%ld COPPER 0 0 %ld\r\n", (long)lid, (long)polylist_length(&ly->Polygon)); + fprintf(wctx->f, "polys_lid_%ld COPPER 0 0 %ld\r\n", (long)lid, (long)polylist_length(&ly->Polygon)); for(; p != NULL; p = polylist_next(p)) pads_write_piece_cop_poly(wctx, p, plid); } } - rnd_fprintf(wctx->f, "\r\n"); + fprintf(wctx->f, "\r\n"); return 0; } @@ -305,7 +305,7 @@ if (termid == NULL) /* board context */ rnd_fprintf(wctx->f, "PSPOTO_%ld %[4] %d\n", pid, CRD(proto->hdia), ts->len); else /* partdecal context */ - rnd_fprintf(wctx->f, "PAD %s %d\n", termid, ts->len); + fprintf(wctx->f, "PAD %s %d\n", termid, ts->len); for(n = 0; n < ts->len; n++) { const pcb_pstk_shape_t *shape = &ts->shape[n]; @@ -404,17 +404,17 @@ long n; int res = 0; - rnd_fprintf(wctx->f, "*VIA* ITEMS\r\n\r\n"); - rnd_fprintf(wctx->f, "*REMARK* NAME DRILL STACKLINES [DRILL START] [DRILL END]\r\n"); - rnd_fprintf(wctx->f, "*REMARK* LEVEL SIZE SHAPE [INNER DIAMETER]\r\n\r\n"); + fprintf(wctx->f, "*VIA* ITEMS\r\n\r\n"); + fprintf(wctx->f, "*REMARK* NAME DRILL STACKLINES [DRILL START] [DRILL END]\r\n"); + fprintf(wctx->f, "*REMARK* LEVEL SIZE SHAPE [INNER DIAMETER]\r\n\r\n"); for(n = 0; n < wctx->pcb->Data->ps_protos.used; n++) { if (pads_write_blk_pstk_proto(wctx, n, &wctx->pcb->Data->ps_protos.array[n]) != 0) res = -1; - rnd_fprintf(wctx->f, "\r\n"); + fprintf(wctx->f, "\r\n"); } - rnd_fprintf(wctx->f, "\r\n"); + fprintf(wctx->f, "\r\n"); return res; } @@ -551,7 +551,7 @@ } } - rnd_fprintf(wctx->f, "\r\n%-16s M 1000 1000 %ld %ld %ld %ld %ld\r\n", id, num_pcs, num_terms, num_stacks, num_texts, num_labels); + fprintf(wctx->f, "\r\n%-16s M 1000 1000 %ld %ld %ld %ld %ld\r\n", id, num_pcs, num_terms, num_stacks, num_texts, num_labels); /* write pieces */ for(o = pcb_data_first(&it, proto->data, PCB_OBJ_ARC | PCB_OBJ_LINE); o != NULL; o = pcb_data_next(&it)) { @@ -590,7 +590,7 @@ if (ps->proto != ps0) partdecal_psproto(wctx, proto, ps->proto, ps->term, &res); /* special */ - rnd_fprintf(wctx->f, "\r\n"); + fprintf(wctx->f, "\r\n"); vti0_uninit(&psstat); return res; } @@ -600,18 +600,18 @@ int res = 0, cnt = 0; htscp_entry_t *e; - rnd_fprintf(wctx->f, "*PARTDECAL* ITEMS\r\n\r\n"); - rnd_fprintf(wctx->f, "*REMARK* NAME UNITS ORIX ORIY PIECES TERMINALS STACKS TEXT LABELS\r\n"); - rnd_fprintf(wctx->f, "*REMARK* PIECETYPE CORNERS WIDTHHGHT LEVEL RESTRICTIONS\r\n"); - rnd_fprintf(wctx->f, "*REMARK* PIECETYPE CORNERS WIDTH LEVEL PINNUM\r\n"); - rnd_fprintf(wctx->f, "*REMARK* XLOC YLOC BEGINANGLE DELTAANGLE\r\n"); - rnd_fprintf(wctx->f, "*REMARK* XLOC YLOC ORI LEVEL HEIGHT WIDTH MIRRORED HJUST VJUST\r\n"); - rnd_fprintf(wctx->f, "*REMARK* VISIBLE XLOC YLOC ORI LEVEL HEIGTH WIDTH MIRRORED HJUST VJUST RIGHTREADING\r\n"); - rnd_fprintf(wctx->f, "*REMARK* FONTSTYLE FONTFACE\r\n"); - rnd_fprintf(wctx->f, "*REMARK* T XLOC YLOC NMXLOC NMYLOC PINNUMBER\r\n"); - rnd_fprintf(wctx->f, "*REMARK* PAD PIN STACKLINES\r\n"); - rnd_fprintf(wctx->f, "*REMARK* LEVEL SIZE SHAPE IDIA DRILL [PLATED]\r\n"); - rnd_fprintf(wctx->f, "*REMARK* LEVEL SIZE SHAPE FINORI FINLENGTH FINOFFSET DRILL [PLATED]\r\n"); + fprintf(wctx->f, "*PARTDECAL* ITEMS\r\n\r\n"); + fprintf(wctx->f, "*REMARK* NAME UNITS ORIX ORIY PIECES TERMINALS STACKS TEXT LABELS\r\n"); + fprintf(wctx->f, "*REMARK* PIECETYPE CORNERS WIDTHHGHT LEVEL RESTRICTIONS\r\n"); + fprintf(wctx->f, "*REMARK* PIECETYPE CORNERS WIDTH LEVEL PINNUM\r\n"); + fprintf(wctx->f, "*REMARK* XLOC YLOC BEGINANGLE DELTAANGLE\r\n"); + fprintf(wctx->f, "*REMARK* XLOC YLOC ORI LEVEL HEIGHT WIDTH MIRRORED HJUST VJUST\r\n"); + fprintf(wctx->f, "*REMARK* VISIBLE XLOC YLOC ORI LEVEL HEIGTH WIDTH MIRRORED HJUST VJUST RIGHTREADING\r\n"); + fprintf(wctx->f, "*REMARK* FONTSTYLE FONTFACE\r\n"); + fprintf(wctx->f, "*REMARK* T XLOC YLOC NMXLOC NMYLOC PINNUMBER\r\n"); + fprintf(wctx->f, "*REMARK* PAD PIN STACKLINES\r\n"); + fprintf(wctx->f, "*REMARK* LEVEL SIZE SHAPE IDIA DRILL [PLATED]\r\n"); + fprintf(wctx->f, "*REMARK* LEVEL SIZE SHAPE FINORI FINLENGTH FINOFFSET DRILL [PLATED]\r\n"); for(e = htscp_first(&wctx->footprints.subcs); e != NULL; e = htscp_next(&wctx->footprints.subcs, e)) { char tmp[128]; @@ -622,7 +622,7 @@ res = -1; } - rnd_fprintf(wctx->f, "\r\n"); + fprintf(wctx->f, "\r\n"); return res; } @@ -646,7 +646,7 @@ fprintf(wctx->f, "%s %s UND 0 0 0 0 Y\r\n\r\n", id, id); } - rnd_fprintf(wctx->f, "\r\n"); + fprintf(wctx->f, "\r\n"); return res; } @@ -730,7 +730,7 @@ wctx.pcb = PCB; wctx.ver = ver; - rnd_fprintf(f, "!PADS-POWERPCB-V%.1f-METRIC! DESIGN DATABASE ASCII FILE 1.0\r\n", ver); + fprintf(f, "!PADS-POWERPCB-V%.1f-METRIC! DESIGN DATABASE ASCII FILE 1.0\r\n", ver); /* We need to use mm because PARTDECAL can't use BASIC */ rnd_printf_slot[4] = "%04mm"; @@ -745,7 +745,7 @@ pcb_placement_uninit(&wctx.footprints); pads_free_layers(&wctx); - rnd_fprintf(f, "\r\n*END* OF ASCII OUTPUT FILE\r\n"); + fprintf(f, "\r\n*END* OF ASCII OUTPUT FILE\r\n"); return res; }