Index: trunk/src_plugins/io_altium/pcbdoc.c
===================================================================
--- trunk/src_plugins/io_altium/pcbdoc.c	(revision 35514)
+++ trunk/src_plugins/io_altium/pcbdoc.c	(revision 35515)
@@ -201,6 +201,37 @@
 {
 	int kw;
 
+	if (field->val_type == ALTIUM_FT_LNG) {
+		if ((field->val.lng >= 0) && (field->val.lng <= 82)) {
+			switch(field->val.lng) {
+				case 1:  return conv_layer_(rctx, 0,  PCB_LYT_COPPER | PCB_LYT_TOP, NULL);
+				case 32: return conv_layer_(rctx, 1,  PCB_LYT_COPPER | PCB_LYT_BOTTOM, NULL);
+				case 33: return conv_layer_(rctx, 2,  PCB_LYT_SILK | PCB_LYT_TOP, NULL);
+				case 34: return conv_layer_(rctx, 3,  PCB_LYT_SILK | PCB_LYT_BOTTOM, NULL);
+				case 35: return conv_layer_(rctx, 4,  PCB_LYT_PASTE | PCB_LYT_TOP, NULL);
+				case 36: return conv_layer_(rctx, 5,  PCB_LYT_PASTE | PCB_LYT_BOTTOM, NULL);
+				case 37: return conv_layer_(rctx, 6,  PCB_LYT_MASK | PCB_LYT_TOP, NULL);
+				case 38: return conv_layer_(rctx, 7,  PCB_LYT_MASK | PCB_LYT_BOTTOM, NULL);
+				case 55: return conv_layer_(rctx, 8,  PCB_LYT_DOC, "drill_guide");
+				case 56: return conv_layer_(rctx, 9,  PCB_LYT_DOC, "altium.keepout");
+				case 73: return conv_layer_(rctx, 10, PCB_LYT_DOC, "drill");
+				case 74: return conv_layer_(rctx, 11, PCB_LYT_DOC, "multilayer");
+				case 72: return conv_layer_(rctx, LYCH_ASSY_BOT, PCB_LYT_BOTTOM | PCB_LYT_DOC , "assy");
+			}
+
+			/* signal layer */
+			if ((field->val.lng > 1) && (field->val.lng < 32))
+				return rctx->midly[field->val.lng-2];
+
+			/* mechanicals */
+			if ((field->val.lng >= 57) && (field->val.lng < 72))
+				return conv_layer_(rctx, 12, PCB_LYT_BOUNDARY, NULL);
+
+			rnd_message(RND_MSG_ERROR, "Uknown binary layer ID: %ld\n", field->val.lng);
+		}
+		return NULL;
+	}
+
 	if (field->val_type != ALTIUM_FT_STR)
 		return NULL;
 
Index: trunk/src_plugins/io_altium/pcbdoc_bin.c
===================================================================
--- trunk/src_plugins/io_altium/pcbdoc_bin.c	(revision 35514)
+++ trunk/src_plugins/io_altium/pcbdoc_bin.c	(revision 35515)
@@ -230,6 +230,32 @@
 	return 0;
 }
 
+#define FIELD_STR(rec, key, val_str) \
+	pcbdoc_ascii_new_field(tree, rec, #key, altium_kw_field_ ## key, val_str)
+
+#define FIELD_CRD(rec, key, val_mil) \
+	do { \
+		altium_field_t *fld = FIELD_STR(rec, key, NULL); \
+		fld->val.crd = RND_MIL_TO_COORD(val_mil); \
+		fld->val_type = ALTIUM_FT_CRD; \
+	} while(0)
+
+#define FIELD_DBL(rec, key, val_dbl) \
+	do { \
+		altium_field_t *fld = FIELD_STR(rec, key, NULL); \
+		fld->val.dbl = val_dbl; \
+		fld->val_type = ALTIUM_FT_DBL; \
+	} while(0)
+
+#define FIELD_LNG(rec, key, val_lng) \
+	do { \
+		altium_field_t *fld = FIELD_STR(rec, key, NULL); \
+		fld->val.lng = val_lng; \
+		fld->val_type = ALTIUM_FT_LNG; \
+	} while(0)
+
+/*** file/field parsers ***/
+
 int pcbdoc_bin_parse_board6(rnd_hidlib_t *hidlib, altium_tree_t *tree, ucdf_file_t *fp, altium_buf_t *tmp)
 {
 	return pcbdoc_bin_parse_any_ascii(hidlib, tree, fp, tmp, "Board", altium_kw_record_board);
@@ -277,8 +303,8 @@
 		unsigned char *d;
 		int rectype;
 		long len;
+		altium_record_t *rec;
 		
-		
 		len = read_rec_tlb(fp, tmp, &rectype);
 		if (len <= 0)
 			return len;
@@ -293,8 +319,18 @@
 
 		d = tmp->data;
 
-		printf("line: layer=%d ko=%d net=%ld poly=%ld comp=%ld width=%.2f uu=%d%d\n", d[0], d[1], load_int(d+3, 2), load_int(d+5, 2), load_int(d+7, 2), bmil(d+29), d[36], d[40]);
+		printf("line: layer=%d ko=%d net=%ld poly=%ld comp=%ld width=%.2f uu=%d%d\n",
+		d[0], d[1], load_int(d+3, 2), load_int(d+5, 2), load_int(d+7, 2), bmil(d+29), d[36], d[40]);
 		printf("  x1=%.2f y1=%.2f x2=%.2f y2=%.2f\n", bmil(d+13), bmil(d+17), bmil(d+21), bmil(d+25));
+
+
+		rec = pcbdoc_ascii_new_rec(tree, "Track", altium_kw_record_track);
+		FIELD_LNG(rec, layer, d[0]);
+		FIELD_CRD(rec, x1, bmil(d+13));
+		FIELD_CRD(rec, y1, bmil(d+17));
+		FIELD_CRD(rec, x2, bmil(d+21));
+		FIELD_CRD(rec, y2, bmil(d+25));
+		FIELD_CRD(rec, width, bmil(d+29));
 	}
 	return 0;
 }