Index: export_openems.c =================================================================== --- export_openems.c (revision 36979) +++ export_openems.c (revision 36980) @@ -361,10 +361,10 @@ } else { /* rectangular board size */ - rnd_fprintf(ctx->f, "outline_xy(1, 1) = 0; outline_xy(2, 1) = 0;\n"); - rnd_fprintf(ctx->f, "outline_xy(1, 2) = %mm; outline_xy(2, 2) = 0;\n", ctx->pcb->hidlib.size_x); - rnd_fprintf(ctx->f, "outline_xy(1, 3) = %mm; outline_xy(2, 3) = %mm;\n", ctx->pcb->hidlib.size_x, -ctx->pcb->hidlib.size_y); - rnd_fprintf(ctx->f, "outline_xy(1, 4) = 0; outline_xy(2, 4) = %mm;\n", -ctx->pcb->hidlib.size_y); + rnd_fprintf(ctx->f, "outline_xy(1, 1) = %mm; outline_xy(2, 1) = %mm;\n", ctx->pcb->hidlib.dwg.X1, -ctx->pcb->hidlib.dwg.Y1); + rnd_fprintf(ctx->f, "outline_xy(1, 2) = %mm; outline_xy(2, 2) = %mm;\n", ctx->pcb->hidlib.dwg.X2, -ctx->pcb->hidlib.dwg.Y1); + rnd_fprintf(ctx->f, "outline_xy(1, 3) = %mm; outline_xy(2, 3) = %mm;\n", ctx->pcb->hidlib.dwg.X2, -ctx->pcb->hidlib.dwg.Y2); + rnd_fprintf(ctx->f, "outline_xy(1, 4) = %mm; outline_xy(2, 4) = %mm;\n", ctx->pcb->hidlib.dwg.X1, -ctx->pcb->hidlib.dwg.Y2); } /* create all substrate layers using this polygon*/ @@ -631,10 +631,10 @@ wctx.fmt_matlab = fmt_matlab; ems_ctx = &wctx; - ctx.view.X1 = 0; - ctx.view.Y1 = 0; - ctx.view.X2 = PCB->hidlib.size_x; - ctx.view.Y2 = PCB->hidlib.size_y; + ctx.view.X1 = PCB->hidlib.dwg.X1; + ctx.view.Y1 = PCB->hidlib.dwg.Y1; + ctx.view.X2 = PCB->hidlib.dwg.X2; + ctx.view.Y2 = PCB->hidlib.dwg.Y2; f = the_file; Index: mesh.c =================================================================== --- mesh.c (revision 36979) +++ mesh.c (revision 36980) @@ -589,7 +589,7 @@ r = vtr0_alloc_append(&mesh->line[dir].dens, 1); r->begin = mesh->line[dir].dens.array[vtr0_len(&mesh->line[dir].dens)-2].end; - r->end = (dir == PCB_MESH_HORIZONTAL) ? PCB->hidlib.size_y : PCB->hidlib.size_x; + r->end = (dir == PCB_MESH_HORIZONTAL) ? PCB->hidlib.dwg.Y2 : PCB->hidlib.dwg.X2; r->data[0].c = mesh->dens_gap; @@ -762,7 +762,7 @@ mesh_trace("\n"); mesh_trace("%s result:\n", dir == PCB_MESH_HORIZONTAL ? "horizontal" : "vertical"); - end = (dir == PCB_MESH_HORIZONTAL) ? PCB->hidlib.size_x : PCB->hidlib.size_y; + end = (dir == PCB_MESH_HORIZONTAL) ? PCB->hidlib.dwg.X2 : PCB->hidlib.dwg.Y2; for(n = 0; n < vtc0_len(&mesh->line[dir].result); n++) { mesh_trace(" %mm", mesh->line[dir].result.array[n]); mesh_draw_line(mesh, dir, mesh->line[dir].result.array[n], 0, end, RND_MM_TO_COORD(0.03)); @@ -776,9 +776,9 @@ { int n; rnd_layergrp_id_t gid; - rnd_coord_t y0 = PCB->hidlib.size_y/3, y = y0, y2; - rnd_coord_t xl = PCB->hidlib.size_x/5; /* board left */ - rnd_coord_t xr = PCB->hidlib.size_x/5*3; /* board right */ + rnd_coord_t y0 = PCB->hidlib.dwg.Y2/3, y = y0, y2; + rnd_coord_t xl = PCB->hidlib.dwg.X2/5; /* board left */ + rnd_coord_t xr = PCB->hidlib.dwg.X2/5*3; /* board right */ rnd_coord_t spen = RND_MM_TO_COORD(0.3), cpen = RND_MM_TO_COORD(0.2), mpen = RND_MM_TO_COORD(0.03); int mag = 2; @@ -804,7 +804,7 @@ for(n = 0; n < vtc0_len(&mesh->line[PCB_MESH_Z].result); n++) { rnd_coord_t y = y0+mesh->line[PCB_MESH_Z].result.array[n]*mag; mesh_trace(" %mm", y); - pcb_line_new(mesh->ui_layer_z, 0, y, PCB->hidlib.size_x, y, mpen, 0, pcb_no_flags()); + pcb_line_new(mesh->ui_layer_z, 0, y, PCB->hidlib.dwg.X2, y, mpen, 0, pcb_no_flags()); } mesh_trace("\n"); return 0; @@ -926,7 +926,7 @@ /* right edge, after the last known line */ if (!mesh->noimpl) { c1 = mesh->line[dir].edge.array[vtc0_len(&mesh->line[dir].edge)-1]; - c2 = (dir == PCB_MESH_HORIZONTAL) ? PCB->hidlib.size_y : PCB->hidlib.size_x; + c2 = (dir == PCB_MESH_HORIZONTAL) ? PCB->hidlib.dwg.Y2 : PCB->hidlib.dwg.X2; mesh_find_range(&mesh->line[dir].dens, (c1+c2)/2, &d, &d1, &d2); if (mesh->smooth) mesh_auto_add_smooth(&mesh->line[dir].result, c1, c2, d1, d, d2); Index: openems_xml.c =================================================================== --- openems_xml.c (revision 36979) +++ openems_xml.c (revision 36980) @@ -107,10 +107,10 @@ } else { /* rectangular board size */ - rnd_fprintf(ctx->f, " \n", 0, 0); - rnd_fprintf(ctx->f, " \n", ctx->pcb->hidlib.size_x, 0); - rnd_fprintf(ctx->f, " \n", ctx->pcb->hidlib.size_x, -ctx->pcb->hidlib.size_y); - rnd_fprintf(ctx->f, " \n", 0, -ctx->pcb->hidlib.size_y); + rnd_fprintf(ctx->f, " \n", ctx->pcb->hidlib.dwg.X1, -ctx->pcb->hidlib.dwg.Y1); + rnd_fprintf(ctx->f, " \n", ctx->pcb->hidlib.dwg.X2, -ctx->pcb->hidlib.dwg.Y1); + rnd_fprintf(ctx->f, " \n", ctx->pcb->hidlib.dwg.X2, -ctx->pcb->hidlib.dwg.Y2); + rnd_fprintf(ctx->f, " \n", ctx->pcb->hidlib.dwg.X1, -ctx->pcb->hidlib.dwg.Y2); } rnd_fprintf(ctx->f, " \n"); return 0; @@ -147,10 +147,10 @@ int err = 0; - ectx.view.X1 = 0; - ectx.view.Y1 = 0; - ectx.view.X2 = ctx->pcb->hidlib.size_x; - ectx.view.Y2 = ctx->pcb->hidlib.size_y; + ectx.view.X1 = ctx->pcb->hidlib.dwg.X1; + ectx.view.Y1 = ctx->pcb->hidlib.dwg.Y2; + ectx.view.X2 = ctx->pcb->hidlib.dwg.X2; + ectx.view.Y2 = ctx->pcb->hidlib.dwg.Y2; rnd_app.expose_main(&openems_hid, &ectx, NULL); openems_wr_xml_layergrp_end(ctx);