Index: read.c
===================================================================
--- read.c	(revision 38250)
+++ read.c	(revision 38251)
@@ -454,8 +454,41 @@
 
 	grp = lht_dom_hash_get(nd, "size");
 	if ((grp != NULL) && (grp->type == LHT_HASH)) {
-		err |= parse_coord(&pcb->hidlib.dwg.X2, hash_get(grp, "x", 0));
-		err |= parse_coord(&pcb->hidlib.dwg.Y2, hash_get(grp, "y", 0));
+		lht_node_t *nx, *ny, *nx1, *ny1, *nx2, *ny2;
+		int size_box;
+		nx  = hash_get(grp, "x", 1);  ny  = hash_get(grp, "y", 1);
+		nx1 = hash_get(grp, "x1", 1); ny1 = hash_get(grp, "y1", 1);
+		nx2 = hash_get(grp, "x2", 1); ny2 = hash_get(grp, "y2", 1);
+
+		if (rctx->rdver < 9) {
+			if ((nx == &missing_ok) || (ny == &missing_ok)) {
+				iolht_error(grp, "missing nodes: lihata board version below 9 should have size/x and size/y for board dimensions\n");
+				size_box = 1;
+			}
+			else
+				size_box = 0;
+		}
+		else {
+			if ((nx1 == &missing_ok) || (ny1 == &missing_ok) || (nx2 == &missing_ok) || (ny2 == &missing_ok)) {
+				iolht_error(grp, "missing nodes: lihata board from version 9 should have size/x1, size/y1, size/x2, size/y2 for board dimensions\n");
+				size_box = 0;
+			}
+			else
+				size_box = 1;
+		}
+
+		if (size_box) {
+			err |= parse_coord(&pcb->hidlib.dwg.X1, nx1);
+			err |= parse_coord(&pcb->hidlib.dwg.Y1, ny1);
+			err |= parse_coord(&pcb->hidlib.dwg.X2, nx2);
+			err |= parse_coord(&pcb->hidlib.dwg.Y2, ny2);
+		}
+		else {
+			err |= parse_coord(&pcb->hidlib.dwg.X2, nx);
+			err |= parse_coord(&pcb->hidlib.dwg.Y2, ny);
+		}
+
+
 		err |= parse_coord_conf(rctx, "design/poly_isle_area", hash_get(grp, "isle_area_nm2", 1));
 		err |= parse_double(&pcb->ThermScale, hash_get(grp, "thermal_scale", 1));
 		if (pcb->ThermScale < 0.01) {
Index: write.c
===================================================================
--- write.c	(revision 38250)
+++ write.c	(revision 38251)
@@ -174,10 +174,18 @@
 
 	grp = lht_dom_node_alloc(LHT_HASH, "size");
 	lht_dom_hash_put(meta, grp);
-	lht_dom_hash_put(grp, build_textf("x", CFMT, pcb->hidlib.dwg.X2));
-	lht_dom_hash_put(grp, build_textf("y", CFMT, pcb->hidlib.dwg.Y2));
-	if ((pcb->hidlib.dwg.X1 != 0) || (pcb->hidlib.dwg.Y1 != 0))
-		pcb_io_incompat_save(NULL, NULL, "board", "drawing are bbox with non-zero origin (X1 or Y1)\n", "Run autocrop()");
+	if (wrver < 9) {
+		lht_dom_hash_put(grp, build_textf("x", CFMT, pcb->hidlib.dwg.X2));
+		lht_dom_hash_put(grp, build_textf("y", CFMT, pcb->hidlib.dwg.Y2));
+		if ((pcb->hidlib.dwg.X1 != 0) || (pcb->hidlib.dwg.Y1 != 0))
+			pcb_io_incompat_save(NULL, NULL, "board", "drawing are bbox with non-zero origin (X1 or Y1)\n", "Run autocrop()");
+	}
+	else {
+		lht_dom_hash_put(grp, build_textf("x1", CFMT, pcb->hidlib.dwg.X1));
+		lht_dom_hash_put(grp, build_textf("y1", CFMT, pcb->hidlib.dwg.Y1));
+		lht_dom_hash_put(grp, build_textf("x2", CFMT, pcb->hidlib.dwg.X2));
+		lht_dom_hash_put(grp, build_textf("y2", CFMT, pcb->hidlib.dwg.Y2));
+	}
 
 	if (wrver < 5) {
 		lht_dom_hash_put(grp, build_textf("isle_area_nm2", "%f", conf_core.design.poly_isle_area));
Index: write_style.c
===================================================================
--- write_style.c	(revision 38250)
+++ write_style.c	(revision 38251)
@@ -629,6 +629,10 @@
 static const char *cpat_line_cl[]  = {"te:clearance", "ha:line.*", "*", NULL};
 static const char *cpat_size_x[]   = {"te:x", "ha:size", "ha:meta", "*", NULL};
 static const char *cpat_size_y[]   = {"te:y", "ha:size", "ha:meta", "*", NULL};
+static const char *cpat_size_x1[]  = {"te:x1", "ha:size", "ha:meta", "*", NULL};
+static const char *cpat_size_y1[]  = {"te:y1", "ha:size", "ha:meta", "*", NULL};
+static const char *cpat_size_x2[]  = {"te:x2", "ha:size", "ha:meta", "*", NULL};
+static const char *cpat_size_y2[]  = {"te:y2", "ha:size", "ha:meta", "*", NULL};
 static const char *cpat_curs_x[]   = {"te:x", "ha:cursor", "ha:meta", "*", NULL};
 static const char *cpat_curs_y[]   = {"te:y", "ha:cursor", "ha:meta", "*", NULL};
 static const char *cpat_curs_z[]   = {"te:zoom", "ha:cursor", "ha:meta", "*", NULL};
@@ -684,6 +688,10 @@
 	{cpat_line_cl,  NULL, NULL},
 	{cpat_size_x,   NULL, NULL},
 	{cpat_size_y,   NULL, NULL},
+	{cpat_size_x1,  NULL, NULL},
+	{cpat_size_y1,  NULL, NULL},
+	{cpat_size_x2,  NULL, NULL},
+	{cpat_size_y2,  NULL, NULL},
 	{cpat_curs_x,   NULL, NULL},
 	{cpat_curs_y,   NULL, NULL},
 	{cpat_curs_z,   NULL, NULL},