Index: trunk/src/buffer.c =================================================================== --- trunk/src/buffer.c (revision 6105) +++ trunk/src/buffer.c (revision 6106) @@ -480,11 +480,12 @@ /* swap layer groups when balanced */ sgroup = pcb_layer_get_group(pcb_solder_silk_layer); cgroup = pcb_layer_get_group(pcb_component_silk_layer); - if (PCB->LayerGroups.Number[cgroup] == PCB->LayerGroups.Number[sgroup]) { - for (j = k = 0; j < PCB->LayerGroups.Number[sgroup]; j++) { +#warning layer TODO: revise this code for the generic physical layer support; move this code to layer*.c + if (PCB->LayerGroups.grp[cgroup].len == PCB->LayerGroups.grp[sgroup].len) { + for (j = k = 0; j < PCB->LayerGroups.grp[sgroup].len; j++) { int t1, t2; - pcb_cardinal_t cnumber = PCB->LayerGroups.Entries[cgroup][k]; - pcb_cardinal_t snumber = PCB->LayerGroups.Entries[sgroup][j]; + pcb_layer_id_t cnumber = PCB->LayerGroups.grp[cgroup].lid[k]; + pcb_layer_id_t snumber = PCB->LayerGroups.grp[sgroup].lid[j]; if (snumber >= pcb_max_copper_layer) continue; @@ -492,7 +493,7 @@ while (cnumber >= pcb_max_copper_layer) { k++; - cnumber = PCB->LayerGroups.Entries[cgroup][k]; + cnumber = PCB->LayerGroups.grp[cgroup].lid[k]; } Buffer->Data->Layer[snumber] = Buffer->Data->Layer[cnumber]; Buffer->Data->Layer[cnumber] = swap; Index: trunk/src/draw.c =================================================================== --- trunk/src/draw.c (revision 6105) +++ trunk/src/draw.c (revision 6106) @@ -502,8 +502,8 @@ int i, rv = 1; pcb_layer_id_t layernum; pcb_layer_t *Layer; - int n_entries = PCB->LayerGroups.Number[group]; - pcb_cardinal_t *layers = PCB->LayerGroups.Entries[group]; + pcb_cardinal_t n_entries = PCB->LayerGroups.grp[group].len; + pcb_layer_id_t *layers = PCB->LayerGroups.grp[group].lid; for (i = n_entries - 1; i >= 0; i--) { layernum = layers[i]; Index: trunk/src/find_lookup.c =================================================================== --- trunk/src/find_lookup.c (revision 6105) +++ trunk/src/find_lookup.c (revision 6106) @@ -435,7 +435,8 @@ static pcb_bool LookupLOConnectionsToLOList(pcb_bool AndRats) { pcb_bool done; - pcb_cardinal_t i, group, layer, ratposition, + pcb_layer_id_t layer; + pcb_cardinal_t i, group, ratposition, lineposition[PCB_MAX_LAYER], polyposition[PCB_MAX_LAYER], arcposition[PCB_MAX_LAYER], padposition[2]; /* copy the current LO list positions; the original data is changed @@ -472,8 +473,8 @@ for (group = 0; group < pcb_max_group; group++) { pcb_cardinal_t entry; - for (entry = 0; entry < PCB->LayerGroups.Number[group]; entry++) { - layer = PCB->LayerGroups.Entries[group][entry]; + for (entry = 0; entry < PCB->LayerGroups.grp[group].len; entry++) { + layer = PCB->LayerGroups.grp[group].lid[entry]; /* be aware that the layer number equal pcb_max_copper_layer * and pcb_max_copper_layer+1 have a special meaning for pads @@ -877,10 +878,10 @@ info.arc = *Arc; EXPAND_BOUNDS(&info.arc); /* loop over all layers of the group */ - for (entry = 0; entry < PCB->LayerGroups.Number[LayerGroup]; entry++) { - pcb_cardinal_t layer; + for (entry = 0; entry < PCB->LayerGroups.grp[LayerGroup].len; entry++) { + pcb_layer_id_t layer; - layer = PCB->LayerGroups.Entries[LayerGroup][entry]; + layer = PCB->LayerGroups.grp[LayerGroup].lid[entry]; /* handle normal layers */ if (layer < pcb_max_copper_layer) { @@ -996,10 +997,10 @@ return pcb_true; /* loop over all layers of the group */ - for (entry = 0; entry < PCB->LayerGroups.Number[LayerGroup]; entry++) { - pcb_cardinal_t layer; + for (entry = 0; entry < PCB->LayerGroups.grp[LayerGroup].len; entry++) { + pcb_layer_id_t layer; - layer = PCB->LayerGroups.Entries[LayerGroup][entry]; + layer = PCB->LayerGroups.grp[LayerGroup].lid[entry]; /* handle normal layers */ if (layer < pcb_max_copper_layer) { @@ -1103,10 +1104,10 @@ info.Point = Point; /* loop over all layers of this group */ - for (entry = 0; entry < PCB->LayerGroups.Number[LayerGroup]; entry++) { - pcb_cardinal_t layer; + for (entry = 0; entry < PCB->LayerGroups.grp[LayerGroup].len; entry++) { + pcb_layer_id_t layer; - layer = PCB->LayerGroups.Entries[LayerGroup][entry]; + layer = PCB->LayerGroups.grp[LayerGroup].lid[entry]; /* handle normal layers rats don't ever touch arcs by definition @@ -1229,9 +1230,9 @@ int tlayer = -1; /*fprintf(stderr, "lg===\n");*/ - for (entry = 0; entry < PCB->LayerGroups.Number[LayerGroup]; entry++) { - pcb_cardinal_t layer; - layer = PCB->LayerGroups.Entries[LayerGroup][entry]; + for (entry = 0; entry < PCB->LayerGroups.grp[LayerGroup].len; entry++) { + pcb_layer_id_t layer; + layer = PCB->LayerGroups.grp[LayerGroup].lid[entry]; /*fprintf(stderr, "lg: %d\n", layer);*/ if (layer == PCB_COMPONENT_SIDE) tlayer = PCB_COMPONENT_SIDE; @@ -1273,10 +1274,10 @@ return pcb_true; /* loop over all layers of the group */ - for (entry = 0; entry < PCB->LayerGroups.Number[LayerGroup]; entry++) { - pcb_cardinal_t layer; + for (entry = 0; entry < PCB->LayerGroups.grp[LayerGroup].len; entry++) { + pcb_layer_id_t layer; - layer = PCB->LayerGroups.Entries[LayerGroup][entry]; + layer = PCB->LayerGroups.grp[LayerGroup].lid[entry]; /* handle normal layers */ if (layer < pcb_max_copper_layer) { info.layer = layer; @@ -1386,10 +1387,10 @@ else return pcb_true; /* loop over all layers of the group */ - for (entry = 0; entry < PCB->LayerGroups.Number[LayerGroup]; entry++) { - pcb_cardinal_t layer; + for (entry = 0; entry < PCB->LayerGroups.grp[LayerGroup].len; entry++) { + pcb_layer_id_t layer; - layer = PCB->LayerGroups.Entries[LayerGroup][entry]; + layer = PCB->LayerGroups.grp[LayerGroup].lid[entry]; /* handle normal layers */ if (layer < pcb_max_copper_layer) { Index: trunk/src/hid_helper.c =================================================================== --- trunk/src/hid_helper.c (revision 6105) +++ trunk/src/hid_helper.c (revision 6106) @@ -57,7 +57,7 @@ group = pcb_layer_get_group(lid); - nlayers = PCB->LayerGroups.Number[group]; + nlayers = PCB->LayerGroups.grp[group].len; single_name = pcb_layer_name(lid); if (flags & PCB_LYT_TOP) { Index: trunk/src/layer.c =================================================================== --- trunk/src/layer.c (revision 6105) +++ trunk/src/layer.c (revision 6106) @@ -35,6 +35,7 @@ #include "undo.h" #include "event.h" #include "layer_ui.h" +#include "layer_grp.h" pcb_virt_layer_t pcb_virt_layers[] = { {"invisible", PCB_LYT_VIRTUAL + 1, -1, PCB_LYT_VIRTUAL | PCB_LYT_INVIS | PCB_LYT_LOGICAL }, @@ -138,8 +139,8 @@ pcb_bool pcb_is_layergrp_empty(pcb_layergrp_id_t num) { int i; - for (i = 0; i < PCB->LayerGroups.Number[num]; i++) - if (!pcb_layer_is_empty(PCB->LayerGroups.Entries[num][i])) + for (i = 0; i < PCB->LayerGroups.grp[num].len; i++) + if (!pcb_layer_is_empty(PCB->LayerGroups.grp[num].lid[i])) return pcb_false; return pcb_true; } @@ -208,7 +209,7 @@ goto error; } groupnum[layer] = group; - LayerGroup->Entries[group][member++] = layer; + LayerGroup->grp[group].lid[member++] = layer; while (*++s && isdigit((int) *s)); /* ignore white spaces and check for separator */ @@ -219,19 +220,19 @@ if (*s != ',') goto error; } - LayerGroup->Number[group] = member; + LayerGroup->grp[group].len = member; if (*s == ':') s++; } if (!s_set) - LayerGroup->Entries[PCB_SOLDER_SIDE][LayerGroup->Number[PCB_SOLDER_SIDE]++] = LayerN + PCB_SOLDER_SIDE; + LayerGroup->grp[PCB_SOLDER_SIDE].lid[LayerGroup->grp[PCB_SOLDER_SIDE].len++] = LayerN + PCB_SOLDER_SIDE; if (!c_set) - LayerGroup->Entries[PCB_COMPONENT_SIDE][LayerGroup->Number[PCB_COMPONENT_SIDE]++] = LayerN + PCB_COMPONENT_SIDE; + LayerGroup->grp[PCB_COMPONENT_SIDE].lid[LayerGroup->grp[PCB_COMPONENT_SIDE].len++] = LayerN + PCB_COMPONENT_SIDE; for (layer = 0; layer < LayerN && group < LayerN; layer++) if (groupnum[layer] == -1) { - LayerGroup->Entries[group][0] = layer; - LayerGroup->Number[group] = 1; + LayerGroup->grp[group].lid[0] = layer; + LayerGroup->grp[group].len = 1; group++; } return (0); @@ -257,13 +258,13 @@ { pcb_layergrp_id_t group, i; -#warning TODO: layer group cleanup: remove this +2 for the silks +#warning layer TODO: layer group cleanup: remove this +2 for the silks if ((Layer < 0) || (Layer > pcb_max_copper_layer+2)) return -1; for (group = 0; group < pcb_max_group; group++) - for (i = 0; i < PCB->LayerGroups.Number[group]; i++) - if (PCB->LayerGroups.Entries[group][i] == Layer) + for (i = 0; i < PCB->LayerGroups.grp[group].len; i++) + if (PCB->LayerGroups.grp[group].lid[i] == Layer) return (group); return -1; @@ -301,14 +302,14 @@ return prev; /* Remove layer from prev group */ - for (j = i = 0; i < PCB->LayerGroups.Number[prev]; i++) - if (PCB->LayerGroups.Entries[prev][i] != layer) - PCB->LayerGroups.Entries[prev][j++] = PCB->LayerGroups.Entries[prev][i]; - PCB->LayerGroups.Number[prev]--; + for (j = i = 0; i < PCB->LayerGroups.grp[prev].len; i++) + if (PCB->LayerGroups.grp[prev].lid[i] != layer) + PCB->LayerGroups.grp[prev].lid[j++] = PCB->LayerGroups.grp[prev].lid[i]; + PCB->LayerGroups.grp[prev].len--; /* Add layer to new group. */ - i = PCB->LayerGroups.Number[group]++; - PCB->LayerGroups.Entries[group][i] = layer; + i = PCB->LayerGroups.grp[group].len++; + PCB->LayerGroups.grp[group].lid[i] = layer; return group; } @@ -340,10 +341,10 @@ /* check whether it's top, bottom or internal */ int group, entry; for (group = 0; group < pcb_max_group; group++) { - if (PCB->LayerGroups.Number[group]) { + if (PCB->LayerGroups.grp[group].len) { unsigned int my_group = 0, gf = 0; - for (entry = 0; entry < PCB->LayerGroups.Number[group]; entry++) { - int layer = PCB->LayerGroups.Entries[group][entry]; + for (entry = 0; entry < PCB->LayerGroups.grp[group].len; entry++) { + pcb_layer_id_t layer = PCB->LayerGroups.grp[group].lid[entry]; if (layer == layer_idx) my_group = 1; if (layer == pcb_component_silk_layer) @@ -373,8 +374,8 @@ unsigned int res = 0; int layeri; - for (layeri = 0; layeri < PCB->LayerGroups.Number[group]; layeri++) - res |= pcb_layer_flags(PCB->LayerGroups.Entries[group][layeri]); + for (layeri = 0; layeri < PCB->LayerGroups.grp[group].len; layeri++) + res |= pcb_layer_flags(PCB->LayerGroups.grp[group].lid[layeri]); return res; } @@ -459,8 +460,8 @@ { int group, layeri, used = 0; for (group = 0; group < pcb_max_group; group++) { - for (layeri = 0; layeri < PCB->LayerGroups.Number[group]; layeri++) { - int layer = PCB->LayerGroups.Entries[group][layeri]; + for (layeri = 0; layeri < PCB->LayerGroups.grp[group].len; layeri++) { + pcb_layer_id_t layer = PCB->LayerGroups.grp[group].lid[layeri]; if ((pcb_layer_flags(layer) & mask) == mask) { APPEND(group); goto added; /* do not add a group twice */ @@ -475,8 +476,8 @@ { int group, layeri, used = 0; for (group = 0; group < pcb_max_group; group++) { - for (layeri = 0; layeri < PCB->LayerGroups.Number[group]; layeri++) { - int layer = PCB->LayerGroups.Entries[group][layeri]; + for (layeri = 0; layeri < PCB->LayerGroups.grp[group].len; layeri++) { + pcb_layer_id_t layer = PCB->LayerGroups.grp[group].lid[layeri]; if ((pcb_layer_flags(layer) & mask)) { APPEND(group); goto added; /* do not add a group twice */ @@ -500,8 +501,8 @@ { int group, layeri; for (group = 0; group < pcb_max_group; group++) { - for (layeri = 0; layeri < PCB->LayerGroups.Number[group]; layeri++) { - int layer = PCB->LayerGroups.Entries[group][layeri]; + for (layeri = 0; layeri < PCB->LayerGroups.grp[group].len; layeri++) { + pcb_layer_id_t layer = PCB->LayerGroups.grp[group].lid[layeri]; if (layer == layer_id) return group; } @@ -511,9 +512,9 @@ void pcb_layer_add_in_group(pcb_layer_id_t layer_id, pcb_layergrp_id_t group_id) { - int glen = PCB->LayerGroups.Number[group_id]; - PCB->LayerGroups.Entries[group_id][glen] = layer_id; - PCB->LayerGroups.Number[group_id]++; + int glen = PCB->LayerGroups.grp[group_id].len; + PCB->LayerGroups.grp[group_id].lid[glen] = layer_id; + PCB->LayerGroups.grp[group_id].len++; } @@ -530,14 +531,15 @@ /* reset layer groups */ for(n = 0; n < PCB_MAX_LAYERGRP; n++) - PCB->LayerGroups.Number[n] = 0; + PCB->LayerGroups.grp[n].len = 0; /* set up one copper layer on top and one on bottom */ +#warning layer TODO: this should use a separate group for silk PCB->Data->LayerN = 2; - PCB->LayerGroups.Number[PCB_SOLDER_SIDE] = 1; - PCB->LayerGroups.Number[PCB_COMPONENT_SIDE] = 1; - PCB->LayerGroups.Entries[PCB_SOLDER_SIDE][0] = PCB_SOLDER_SIDE; - PCB->LayerGroups.Entries[PCB_COMPONENT_SIDE][0] = PCB_COMPONENT_SIDE; + PCB->LayerGroups.grp[PCB_SOLDER_SIDE].len = 1; + PCB->LayerGroups.grp[PCB_COMPONENT_SIDE].len = 1; + PCB->LayerGroups.grp[PCB_SOLDER_SIDE].lid[0] = PCB_SOLDER_SIDE; + PCB->LayerGroups.grp[PCB_COMPONENT_SIDE].lid[0] = PCB_COMPONENT_SIDE; /* Name top and bottom layers */ if (PCB->Data->Layer[PCB_COMPONENT_SIDE].Name != NULL) @@ -591,8 +593,8 @@ case PCB_LYT_BOTTOM: return PCB_SOLDER_SIDE; case PCB_LYT_INTERN: for(grp = 2; grp < PCB_MAX_LAYERGRP; grp++) { - if (PCB->LayerGroups.Number[grp] > 0) { - id = PCB->LayerGroups.Entries[grp][0]; + if (PCB->LayerGroups.grp[grp].len > 0) { + id = PCB->LayerGroups.grp[grp].lid[0]; if (strcmp(PCB->Data->Layer[id].Name, "outline") != 0) return id; } @@ -603,8 +605,8 @@ case PCB_LYT_OUTLINE: for(grp = 2; grp < PCB_MAX_LAYERGRP; grp++) { - if (PCB->LayerGroups.Number[grp] > 0) { - id = PCB->LayerGroups.Entries[grp][0]; + if (PCB->LayerGroups.grp[grp].len > 0) { + id = PCB->LayerGroups.grp[grp].lid[0]; if (strcmp(PCB->Data->Layer[id].Name, "outline") == 0) return id; } @@ -667,8 +669,8 @@ case PCB_LYT_INTERN: /* find the first internal layer */ for(found = 0, grp = 2; grp < PCB_MAX_LAYERGRP; grp++) { - if (PCB->LayerGroups.Number[grp] > 0) { - id = PCB->LayerGroups.Entries[grp][0]; + if (PCB->LayerGroups.grp[grp].len > 0) { + id = PCB->LayerGroups.grp[grp].lid[0]; if (strcmp(PCB->Data->Layer[id].Name, "outline") != 0) { found = 1; break; @@ -688,7 +690,7 @@ if (grp < 0) { /* Also need to create a group */ for(grp = 0; grp < PCB_MAX_LAYERGRP; grp++) - if (PCB->LayerGroups.Number[grp] == 0) + if (PCB->LayerGroups.grp[grp].len == 0) break; if (grp >= PCB_MAX_LAYERGRP) return -2; @@ -703,25 +705,27 @@ } /* add layer to group */ - PCB->LayerGroups.Entries[grp][PCB->LayerGroups.Number[grp]] = id; - PCB->LayerGroups.Number[grp]++; + PCB->LayerGroups.grp[grp].lid[PCB->LayerGroups.grp[grp].len] = id; + PCB->LayerGroups.grp[grp].len++; return id; } +#warning layer TODO: remove this hack /* Temporary hack: silk layers have to be added as the last entry in the top and bottom layer groups, if they are not already in */ static void hack_in_silks() { - int sl, cl, found, n; + pcb_layer_id_t sl, cl; + int found, n; sl = PCB_SOLDER_SIDE + PCB->Data->LayerN; - for(found = 0, n = 0; n < PCB->LayerGroups.Number[PCB_SOLDER_SIDE]; n++) - if (PCB->LayerGroups.Entries[PCB_SOLDER_SIDE][n] == sl) + for(found = 0, n = 0; n < PCB->LayerGroups.grp[PCB_SOLDER_SIDE].len; n++) + if (PCB->LayerGroups.grp[PCB_SOLDER_SIDE].lid[n] == sl) found = 1; if (!found) { - PCB->LayerGroups.Entries[PCB_SOLDER_SIDE][PCB->LayerGroups.Number[PCB_SOLDER_SIDE]] = sl; - PCB->LayerGroups.Number[PCB_SOLDER_SIDE]++; + PCB->LayerGroups.grp[PCB_SOLDER_SIDE].lid[PCB->LayerGroups.grp[PCB_SOLDER_SIDE].len] = sl; + PCB->LayerGroups.grp[PCB_SOLDER_SIDE].len++; if (PCB->Data->Layer[sl].Name != NULL) free((char *)PCB->Data->Layer[sl].Name); PCB->Data->Layer[sl].Name = pcb_strdup("silk"); @@ -729,13 +733,13 @@ cl = PCB_COMPONENT_SIDE + PCB->Data->LayerN; - for(found = 0, n = 0; n < PCB->LayerGroups.Number[PCB_COMPONENT_SIDE]; n++) - if (PCB->LayerGroups.Entries[PCB_COMPONENT_SIDE][n] == cl) + for(found = 0, n = 0; n < PCB->LayerGroups.grp[PCB_COMPONENT_SIDE].len; n++) + if (PCB->LayerGroups.grp[PCB_COMPONENT_SIDE].lid[n] == cl) found = 1; if (!found) { - PCB->LayerGroups.Entries[PCB_COMPONENT_SIDE][PCB->LayerGroups.Number[PCB_COMPONENT_SIDE]] = cl; - PCB->LayerGroups.Number[PCB_COMPONENT_SIDE]++; + PCB->LayerGroups.grp[PCB_COMPONENT_SIDE].lid[PCB->LayerGroups.grp[PCB_COMPONENT_SIDE].len] = cl; + PCB->LayerGroups.grp[PCB_COMPONENT_SIDE].len++; if (PCB->Data->Layer[cl].Name != NULL) free((char *)PCB->Data->Layer[cl].Name); PCB->Data->Layer[cl].Name = pcb_strdup("silk"); @@ -809,7 +813,8 @@ { pcb_layergrp_id_t cgroup = pcb_layer_get_group(pcb_max_group + PCB_COMPONENT_SIDE); pcb_layergrp_id_t lgroup = pcb_layer_get_group(layer); - if (cgroup == lgroup && PCB->LayerGroups.Number[lgroup] == 2) +#warning layer TODO: remove this silk-specific hack? + if (cgroup == lgroup && PCB->LayerGroups.grp[lgroup].len == 2) return 1; return 0; } @@ -818,7 +823,8 @@ { int sgroup = pcb_layer_get_group(pcb_max_group + PCB_SOLDER_SIDE); int lgroup = pcb_layer_get_group(layer); - if (sgroup == lgroup && PCB->LayerGroups.Number[lgroup] == 2) +#warning layer TODO: remove this silk-specific hack? + if (sgroup == lgroup && PCB->LayerGroups.grp[lgroup].len == 2) return 1; return 0; } @@ -865,8 +871,8 @@ groups[g] = -1; for (g = 0; g < PCB_MAX_LAYERGRP; g++) - for (l = 0; l < PCB->LayerGroups.Number[g]; l++) - groups[PCB->LayerGroups.Entries[g][l]] = g; + for (l = 0; l < PCB->LayerGroups.grp[g].len; l++) + groups[PCB->LayerGroups.grp[g].lid[l]] = g; if (old_index == -1) { pcb_layer_t *lp; @@ -923,22 +929,22 @@ move_all_thermals(old_index, new_index); for (g = 0; g < PCB_MAX_LAYERGRP; g++) - PCB->LayerGroups.Number[g] = 0; + PCB->LayerGroups.grp[g].len = 0; for (l = 0; l < pcb_max_copper_layer + 2; l++) { int i; g = groups[l]; if (g >= 0) { - i = PCB->LayerGroups.Number[g]++; - PCB->LayerGroups.Entries[g][i] = l; + i = PCB->LayerGroups.grp[g].len++; + PCB->LayerGroups.grp[g].lid[i] = l; } } for (g = 0; g < PCB_MAX_LAYERGRP; g++) - if (PCB->LayerGroups.Number[g] == 0) { - memmove(&PCB->LayerGroups.Number[g], - &PCB->LayerGroups.Number[g + 1], (PCB_MAX_LAYERGRP - g - 1) * sizeof(PCB->LayerGroups.Number[g])); - memmove(&PCB->LayerGroups.Entries[g], - &PCB->LayerGroups.Entries[g + 1], (PCB_MAX_LAYERGRP - g - 1) * sizeof(PCB->LayerGroups.Entries[g])); + if (PCB->LayerGroups.grp[g].len == 0) { + memmove(&PCB->LayerGroups.grp[g].len, + &PCB->LayerGroups.grp[g + 1].len, (PCB_MAX_LAYERGRP - g - 1) * sizeof(PCB->LayerGroups.grp[g].len)); + memmove(&PCB->LayerGroups.grp[g], + &PCB->LayerGroups.grp[g + 1], (PCB_MAX_LAYERGRP - g - 1) * sizeof(PCB->LayerGroups.grp[g])); } pcb_event(PCB_EVENT_LAYERS_CHANGED, NULL); @@ -1012,7 +1018,7 @@ return 0; if (pcb_gui->set_layer_group != NULL) - return pcb_gui->set_layer_group(grp, PCB->LayerGroups.Entries[grp][0], pcb_layergrp_flags(grp), is_empty); + return pcb_gui->set_layer_group(grp, PCB->LayerGroups.grp[grp].lid[0], pcb_layergrp_flags(grp), is_empty); /* if the GUI doesn't have a set_layer, assume it wants to draw all layers */ return 1; Index: trunk/src/layer_grp.h =================================================================== --- trunk/src/layer_grp.h (revision 6105) +++ trunk/src/layer_grp.h (revision 6106) @@ -29,6 +29,7 @@ #define PCB_LAYER_GRP_H typedef long int pcb_layergrp_id_t; +typedef struct pcb_layer_group_s pcb_layer_group_t; #include "layer.h" @@ -37,10 +38,16 @@ * on/off together. */ +struct pcb_layer_group_s { + pcb_cardinal_t len; /* number of layer IDs in use */ + pcb_layer_id_t lid[PCB_MAX_LAYER + 2]; /* lid=layer ID */ +}; + + /* layer stack: an ordered list of layer groups (physical layers). */ struct pcb_layer_stack_s { - pcb_cardinal_t Number[PCB_MAX_LAYERGRP], /* number of entries per groups */ - Entries[PCB_MAX_LAYERGRP][PCB_MAX_LAYER + 2]; + pcb_cardinal_t len; + pcb_layer_group_t grp[PCB_MAX_LAYERGRP]; }; /* lookup the group to which a layer belongs to returns -1 if no group is found */ @@ -81,11 +88,11 @@ #define GROUP_LOOP(data, group) do { \ pcb_cardinal_t entry; \ - for (entry = 0; entry < ((pcb_board_t *)(data->pcb))->LayerGroups.Number[(group)]; entry++) \ + for (entry = 0; entry < ((pcb_board_t *)(data->pcb))->LayerGroups.grp[(group)].len; entry++) \ { \ pcb_layer_t *layer; \ - pcb_cardinal_t number; \ - number = ((pcb_board_t *)(data->pcb))->LayerGroups.Entries[(group)][entry]; \ + pcb_layer_id_t number; \ + number = ((pcb_board_t *)(data->pcb))->LayerGroups.grp[(group)].lid[entry]; \ if (number >= pcb_max_copper_layer) \ continue; \ layer = &data->Layer[number]; Index: trunk/src/layer_vis.c =================================================================== --- trunk/src/layer_vis.c (revision 6105) +++ trunk/src/layer_vis.c (revision 6106) @@ -189,8 +189,8 @@ /* decrement 'i' to keep stack in order of layergroup */ if ((group = pcb_layer_get_group(Layer)) >= 0) { - for (i = PCB->LayerGroups.Number[group]; i;) { - int layer = PCB->LayerGroups.Entries[group][--i]; + for (i = PCB->LayerGroups.grp[group].len; i;) { + pcb_layer_id_t layer = PCB->LayerGroups.grp[group].lid[--i]; /* don't count the passed member of the group */ if (layer != Layer && layer < pcb_max_copper_layer) { @@ -237,7 +237,7 @@ /* Bring the component group to the front and make it active. */ comp_group = pcb_layer_get_group(pcb_component_silk_layer); - pcb_layervis_change_group_vis(PCB->LayerGroups.Entries[comp_group][0], 1, 1); + pcb_layervis_change_group_vis(PCB->LayerGroups.grp[comp_group].lid[0], 1, 1); } /* --------------------------------------------------------------------------- Index: trunk/src/obj_elem.c =================================================================== --- trunk/src/obj_elem.c (revision 6105) +++ trunk/src/obj_elem.c (revision 6106) @@ -205,9 +205,9 @@ } PCB_END_LOOP; group = pcb_layer_get_group(PCB_SWAP_IDENT ? pcb_solder_silk_layer : pcb_component_silk_layer); - clayer = &Buffer->Data->Layer[PCB->LayerGroups.Entries[group][0]]; + clayer = &Buffer->Data->Layer[PCB->LayerGroups.grp[group].lid[0]]; group = pcb_layer_get_group(PCB_SWAP_IDENT ? pcb_component_silk_layer : pcb_solder_silk_layer); - slayer = &Buffer->Data->Layer[PCB->LayerGroups.Entries[group][0]]; + slayer = &Buffer->Data->Layer[PCB->LayerGroups.grp[group].lid[0]]; PCB_PAD_LOOP(element); { pcb_line_t *line; Index: trunk/src/polygon.c =================================================================== --- trunk/src/polygon.c (revision 6105) +++ trunk/src/polygon.c (revision 6106) @@ -994,8 +994,8 @@ { pcb_cardinal_t i, j; for (i = 0; i < pcb_max_group; i++) - for (j = 0; j < ((pcb_board_t *) (Data->pcb))->LayerGroups.Number[i]; j++) - if (layer == ((pcb_board_t *) (Data->pcb))->LayerGroups.Entries[i][j]) + for (j = 0; j < ((pcb_board_t *) (Data->pcb))->LayerGroups.grp[i].len; j++) + if (layer == ((pcb_board_t *) (Data->pcb))->LayerGroups.grp[i].lid[j]) return i; return i; } Index: trunk/src_plugins/autoroute/autoroute.c =================================================================== --- trunk/src_plugins/autoroute/autoroute.c (revision 6105) +++ trunk/src_plugins/autoroute/autoroute.c (revision 6106) @@ -630,7 +630,7 @@ routebox_t **rbpp; int layergroup = (PCB_FLAG_TEST(PCB_FLAG_ONSOLDER, pad) ? back : front); assert(0 <= layergroup && layergroup < pcb_max_group); - assert(PCB->LayerGroups.Number[layergroup] > 0); + assert(PCB->LayerGroups.grp[layergroup].len > 0); rbpp = (routebox_t **) vtptr_alloc_append(&layergroupboxes[layergroup], 1); assert(rbpp); *rbpp = (routebox_t *) malloc(sizeof(**rbpp)); @@ -664,7 +664,7 @@ routebox_t **rbpp; assert(layergroupboxes && line); assert(0 <= layergroup && layergroup < pcb_max_group); - assert(PCB->LayerGroups.Number[layergroup] > 0); + assert(PCB->LayerGroups.grp[layergroup].len > 0); rbpp = (routebox_t **) vtptr_alloc_append(&layergroupboxes[layergroup], 1); *rbpp = (routebox_t *) malloc(sizeof(**rbpp)); @@ -708,7 +708,7 @@ assert(layergroupboxes && parent); assert(X1 <= X2 && Y1 <= Y2); assert(0 <= layergroup && layergroup < pcb_max_group); - assert(PCB->LayerGroups.Number[layergroup] > 0); + assert(PCB->LayerGroups.grp[layergroup].len > 0); rbpp = (routebox_t **) vtptr_alloc_append(&layergroupboxes[layergroup], 1); *rbpp = (routebox_t *) malloc(sizeof(**rbpp)); @@ -858,9 +858,9 @@ /* check which layers are active first */ routing_layers = 0; for (group = 0; group < pcb_max_group; group++) { - for (i = 0; i < PCB->LayerGroups.Number[group]; i++) + for (i = 0; i < PCB->LayerGroups.grp[group].len; i++) /* layer must be 1) not silk (ie, < pcb_max_copper_layer) and 2) on */ - if ((PCB->LayerGroups.Entries[group][i] < pcb_max_copper_layer) && PCB->Data->Layer[PCB->LayerGroups.Entries[group][i]].On) { + if ((PCB->LayerGroups.grp[group].lid[i] < pcb_max_copper_layer) && PCB->Data->Layer[PCB->LayerGroups.grp[group].lid[i]].On) { routing_layers++; is_layer_group_active[group] = pcb_true; break; @@ -2981,7 +2981,7 @@ pcb_r_insert_entry(rd->layergrouptree[rb->group], &rb->box, 1); if (conf_core.editor.live_routing) { - pcb_layer_t *layer = LAYER_PTR(PCB->LayerGroups.Entries[rb->group][0]); + pcb_layer_t *layer = LAYER_PTR(PCB->LayerGroups.grp[rb->group].lid[0]); pcb_line_t *line = pcb_line_new(layer, qX1, qY1, qX2, qY2, 2 * qhthick, 0, pcb_flag_make(0)); rb->livedraw_obj.line = line; @@ -4075,7 +4075,7 @@ static void ripout_livedraw_obj(routebox_t * rb) { if (rb->type == LINE && rb->livedraw_obj.line) { - pcb_layer_t *layer = LAYER_PTR(PCB->LayerGroups.Entries[rb->group][0]); + pcb_layer_t *layer = LAYER_PTR(PCB->LayerGroups.grp[rb->group].lid[0]); EraseLine(rb->livedraw_obj.line); pcb_destroy_object(PCB->Data, PCB_TYPE_LINE, layer, rb->livedraw_obj.line, NULL); rb->livedraw_obj.line = NULL; @@ -4436,10 +4436,10 @@ { if (!p->flags.fixed) { /* find first on layer in this group */ - assert(PCB->LayerGroups.Number[p->group] > 0); + assert(PCB->LayerGroups.grp[p->group].len > 0); assert(is_layer_group_active[p->group]); - for (i = 0, layer = NULL; i < PCB->LayerGroups.Number[p->group]; i++) { - layer = LAYER_PTR(PCB->LayerGroups.Entries[p->group][i]); + for (i = 0, layer = NULL; i < PCB->LayerGroups.grp[p->group].len; i++) { + layer = LAYER_PTR(PCB->LayerGroups.grp[p->group].lid[i]); if (layer->On) break; } Index: trunk/src_plugins/diag/diag.c =================================================================== --- trunk/src_plugins/diag/diag.c (revision 6105) +++ trunk/src_plugins/diag/diag.c (revision 6106) @@ -156,7 +156,7 @@ for(n = 0; n < used; n++) { pcb_layer_id_t layer_id = arr[n]; pcb_layergrp_id_t grp = pcb_layer_get_group(layer_id); - printf(" [%lx] %04x group=%d %s\n", layer_id, pcb_layer_flags(layer_id), grp, pcb_layer_name(layer_id)); + printf(" [%lx] %04x group=%ld %s\n", layer_id, pcb_layer_flags(layer_id), grp, pcb_layer_name(layer_id)); } /* query by logical layer: any bottom copper */ @@ -171,10 +171,10 @@ used = pcb_layer_group_list(PCB_LYT_COPPER, garr, sizeof(garr)/sizeof(garr[0])); printf("All %d groups containing copper layers are:\n", used); for(g = 0; g < used; g++) { - int group_id = garr[g]; - printf(" group %d\n", group_id); - for(n = 0; n < PCB->LayerGroups.Number[group_id]; n++) { - int layer_id = PCB->LayerGroups.Entries[group_id][n]; + pcb_layergrp_id_t group_id = garr[g]; + printf(" group %ld\n", group_id); + for(n = 0; n < PCB->LayerGroups.grp[group_id].len; n++) { + pcb_layer_id_t layer_id = PCB->LayerGroups.grp[group_id].lid[n]; printf(" [%lx] %s\n", layer_id, PCB->Data->Layer[layer_id].Name); } } Index: trunk/src_plugins/djopt/djopt.c =================================================================== --- trunk/src_plugins/djopt/djopt.c (revision 6105) +++ trunk/src_plugins/djopt/djopt.c (revision 6106) @@ -2470,20 +2470,21 @@ } for (i = 0; i < pcb_max_group; i++) { f = 0; - for (j = 0; j < l->Number[i]; j++) { - if (l->Entries[i][j] == pcb_solder_silk_layer) + for (j = 0; j < l->grp[i].len; j++) { +#warning layer TODO: use flags here + if (l->grp[i].lid[j] == pcb_solder_silk_layer) f |= LT_SOLDER; - if (l->Entries[i][j] == pcb_component_silk_layer) + if (l->grp[i].lid[j] == pcb_component_silk_layer) f |= LT_COMPONENT; } - for (j = 0; j < l->Number[i]; j++) { - if (l->Entries[i][j] < pcb_max_copper_layer) { - layer_type[l->Entries[i][j]] |= f; - layer_groupings[l->Entries[i][j]] = i; + for (j = 0; j < l->grp[i].len; j++) { + if (l->grp[i].lid[j] < pcb_max_copper_layer) { + layer_type[l->grp[i].lid[j]] |= f; + layer_groupings[l->grp[i].lid[j]] = i; if (solder_layer == -1 && f == LT_SOLDER) - solder_layer = l->Entries[i][j]; + solder_layer = l->grp[i].lid[j]; if (component_layer == -1 && f == LT_COMPONENT) - component_layer = l->Entries[i][j]; + component_layer = l->grp[i].lid[j]; } } } Index: trunk/src_plugins/export_dsn/dsn.c =================================================================== --- trunk/src_plugins/export_dsn/dsn.c (revision 6105) +++ trunk/src_plugins/export_dsn/dsn.c (revision 6106) @@ -148,13 +148,14 @@ static void print_structure(FILE * fp) { - int group, top_group, bot_group, top_layer, bot_layer; + pcb_layergrp_id_t group, top_group, bot_group; + pcb_layer_id_t top_layer, bot_layer; pcb_layer_group_list(PCB_LYT_TOP | PCB_LYT_SILK, &top_group, 1); pcb_layer_group_list(PCB_LYT_BOTTOM | PCB_LYT_SILK, &bot_group, 1); - top_layer = PCB->LayerGroups.Entries[top_group][0]; - bot_layer = PCB->LayerGroups.Entries[bot_group][0]; + top_layer = PCB->LayerGroups.grp[top_group].lid[0]; + bot_layer = PCB->LayerGroups.grp[bot_group].lid[0]; g_list_free(layerlist); /* might be around from the last export */ @@ -172,10 +173,10 @@ if (group == top_group || group == bot_group) continue; - if (PCB->LayerGroups.Number[group] < 1) + if (PCB->LayerGroups.grp[group].len < 1) continue; - first_layer = &PCB->Data->Layer[PCB->LayerGroups.Entries[group][0]]; + first_layer = &PCB->Data->Layer[PCB->LayerGroups.grp[group].lid[0]]; if (!first_layer->On) continue; Index: trunk/src_plugins/export_gcode/gcode.c =================================================================== --- trunk/src_plugins/export_gcode/gcode.c (revision 6105) +++ trunk/src_plugins/export_gcode/gcode.c (revision 6106) @@ -407,7 +407,7 @@ gcode_cur_group = i; /* magic */ - idx = (i >= 0 && i < pcb_max_group) ? PCB->LayerGroups.Entries[i][0] : i; + idx = (i >= 0 && i < pcb_max_group) ? PCB->LayerGroups.grp[i].lid[0] : i; printf("idx=%d %s\n", idx, name); is_solder = (pcb_layer_get_group(idx) == pcb_layer_get_group(pcb_solder_silk_layer)) ? 1 : 0; save_drill = is_solder; /* save drills for one layer only */ Index: trunk/src_plugins/hid_gtk/gtkhid-gdk.c =================================================================== --- trunk/src_plugins/hid_gtk/gtkhid-gdk.c (revision 6105) +++ trunk/src_plugins/hid_gtk/gtkhid-gdk.c (revision 6106) @@ -62,13 +62,13 @@ { int idx = group; if (idx >= 0 && idx < pcb_max_group) { - int n = PCB->LayerGroups.Number[group]; + int n = PCB->LayerGroups.grp[group].len; for (idx = 0; idx < n - 1; idx++) { - int ni = PCB->LayerGroups.Entries[group][idx]; + int ni = PCB->LayerGroups.grp[group].lid[idx]; if (ni >= 0 && ni < pcb_max_copper_layer + 2 && PCB->Data->Layer[ni].On) break; } - idx = PCB->LayerGroups.Entries[group][idx]; + idx = PCB->LayerGroups.grp[group].lid[idx]; } if (idx >= 0 && idx < pcb_max_copper_layer && ((flags & PCB_LYT_ANYTHING) != PCB_LYT_SILK)) Index: trunk/src_plugins/hid_gtk/gui-config.c =================================================================== --- trunk/src_plugins/hid_gtk/gui-config.c (revision 6105) +++ trunk/src_plugins/hid_gtk/gui-config.c (revision 6106) @@ -1263,23 +1263,25 @@ static gchar *make_layer_group_string(pcb_layer_stack_t * lg) { GString *string; - gint group, entry, layer; + pcb_layergrp_id_t group; + pcb_layer_id_t layer; + gint entry; string = g_string_new(""); for (group = 0; group < pcb_max_group; group++) { - if (lg->Number[group] == 0) + if (lg->grp[group].len == 0) continue; - for (entry = 0; entry < lg->Number[group]; entry++) { - layer = lg->Entries[group][entry]; + for (entry = 0; entry < lg->grp[group].len; entry++) { + layer = lg->grp[group].lid[entry]; if (layer == pcb_component_silk_layer) string = g_string_append(string, "c"); else if (layer == pcb_solder_silk_layer) string = g_string_append(string, "s"); else - g_string_append_printf(string, "%d", layer + 1); + g_string_append_printf(string, "%ld", layer + 1); - if (entry != lg->Number[group] - 1) + if (entry != lg->grp[group].len - 1) string = g_string_append(string, ","); } if (group != pcb_max_group - 1) @@ -1317,12 +1319,13 @@ /* clear all entries and read layer by layer */ for (group = 0; group < pcb_max_group; group++) - layer_groups.Number[group] = 0; + layer_groups.grp[group].len = 0; for (i = 0; i < pcb_max_copper_layer + 2; i++) { group = config_layer_group[i] - 1; - layer_groups.Entries[group][layer_groups.Number[group]++] = i; + layer_groups.grp[group].lid[layer_groups.grp[group].len++] = i; +#warning layer TODO: go by flags here if (i == pcb_component_silk_layer) componentgroup = group; else if (i == pcb_solder_silk_layer) @@ -1333,7 +1336,7 @@ | solder-side and component-side must be in different groups | solder-side and component-side must not be the only one in the group */ - if (layer_groups.Number[soldergroup] <= 1 || layer_groups.Number[componentgroup] <= 1) { + if (layer_groups.grp[soldergroup].len <= 1 || layer_groups.grp[componentgroup].len <= 1) { pcb_message(PCB_MSG_ERROR, _("Both 'solder side' or 'component side' layers must have at least\n" "\tone other layer in their group.\n")); return; } @@ -1355,10 +1358,10 @@ */ groups_holdoff = TRUE; for (g = 0; g < pcb_max_group; g++) - for (i = 0; i < layer_groups.Number[g]; i++) { + for (i = 0; i < layer_groups.grp[g].len; i++) { /* printf("layer %d in group %d\n", layer_groups.Entries[g][i], g +1); */ - config_layer_group[layer_groups.Entries[g][i]] = g + 1; - gtk_toggle_button_set_active(GTK_TOGGLE_BUTTON(group_button[layer_groups.Entries[g][i]][g]), TRUE); + config_layer_group[layer_groups.grp[g].lid[i]] = g + 1; + gtk_toggle_button_set_active(GTK_TOGGLE_BUTTON(group_button[layer_groups.grp[g].lid[i]][g]), TRUE); } groups_holdoff = FALSE; } Index: trunk/src_plugins/hid_lesstif/dialogs.c =================================================================== --- trunk/src_plugins/hid_lesstif/dialogs.c (revision 6105) +++ trunk/src_plugins/hid_lesstif/dialogs.c (revision 6106) @@ -1355,9 +1355,9 @@ memset(sets, 0, sizeof(sets)); for (i = 0; i < pcb_max_group; i++) - for (j = 0; j < l->Number[i]; j++) { - sets[l->Entries[i][j]][i] = 1; - lg_setcol[l->Entries[i][j]] = i; + for (j = 0; j < l->grp[i].len; j++) { + sets[l->grp[i].lid[j]][i] = 1; + lg_setcol[l->grp[i].lid[j]] = i; } lg_label_width = 0; Index: trunk/src_plugins/hid_lesstif/main.c =================================================================== --- trunk/src_plugins/hid_lesstif/main.c (revision 6105) +++ trunk/src_plugins/hid_lesstif/main.c (revision 6106) @@ -556,9 +556,9 @@ static int group_showing(int g, int *c) { int i, l; - *c = PCB->LayerGroups.Entries[g][0]; - for (i = 0; i < PCB->LayerGroups.Number[g]; i++) { - l = PCB->LayerGroups.Entries[g][i]; + *c = PCB->LayerGroups.grp[g].lid[0]; + for (i = 0; i < PCB->LayerGroups.grp[g].len; i++) { + l = PCB->LayerGroups.grp[g].lid[i]; if (l >= 0 && l < pcb_max_copper_layer) { *c = l; if (PCB->Data->Layer[l].On) @@ -2720,13 +2720,13 @@ { int idx = group; if (idx >= 0 && idx < pcb_max_group) { - int n = PCB->LayerGroups.Number[group]; + int n = PCB->LayerGroups.grp[group].len; for (idx = 0; idx < n - 1; idx++) { - int ni = PCB->LayerGroups.Entries[group][idx]; + int ni = PCB->LayerGroups.grp[group].lid[idx]; if (ni >= 0 && ni < pcb_max_copper_layer + 2 && PCB->Data->Layer[ni].On) break; } - idx = PCB->LayerGroups.Entries[group][idx]; + idx = PCB->LayerGroups.grp[group].lid[idx]; #if 0 if (idx == pcb_layer_stack[0] || pcb_layer_get_group(idx) == pcb_layer_get_group(pcb_layer_stack[0])) Index: trunk/src_plugins/hid_lesstif/menu.c =================================================================== --- trunk/src_plugins/hid_lesstif/menu.c (revision 6105) +++ trunk/src_plugins/hid_lesstif/menu.c (revision 6106) @@ -255,8 +255,8 @@ if (layer < pcb_max_copper_layer) { int i; pcb_layergrp_id_t group = pcb_layer_get_group(layer); - for (i = 0; i < PCB->LayerGroups.Number[group]; i++) { - l = PCB->LayerGroups.Entries[group][i]; + for (i = 0; i < PCB->LayerGroups.grp[group].len; i++) { + l = PCB->LayerGroups.grp[group].lid[i]; if (l != layer && l < pcb_max_copper_layer) { show_one_layer_button(l, set); PCB->Data->Layer[l].On = set; Index: trunk/src_plugins/io_pcb/file.c =================================================================== --- trunk/src_plugins/io_pcb/file.c (revision 6105) +++ trunk/src_plugins/io_pcb/file.c (revision 6106) @@ -152,13 +152,15 @@ char *cp = buf; char sep = 0; int group, entry; +#warning layer TODO: revise this loop to save only what the original code saved for (group = 0; group < pcb_max_group; group++) - if (PCB->LayerGroups.Number[group]) { + if (PCB->LayerGroups.grp[group].len) { if (sep) *cp++ = ':'; sep = 1; - for (entry = 0; entry < PCB->LayerGroups.Number[group]; entry++) { - int layer = PCB->LayerGroups.Entries[group][entry]; + for (entry = 0; entry < PCB->LayerGroups.grp[group].len; entry++) { + pcb_layer_id_t layer = PCB->LayerGroups.grp[group].lid[entry]; +#warning layer TODO: use flags instead of layer id checks if (layer == pcb_component_silk_layer) { *cp++ = 'c'; } @@ -166,10 +168,10 @@ *cp++ = 's'; } else { - sprintf(cp, "%d", layer + 1); + sprintf(cp, "%ld", layer + 1); while (*++cp); } - if (entry != PCB->LayerGroups.Number[group] - 1) + if (entry != PCB->LayerGroups.grp[group].len - 1) *cp++ = ','; } } Index: trunk/src_plugins/lib_gtk_common/ui_zoompan.c =================================================================== --- trunk/src_plugins/lib_gtk_common/ui_zoompan.c (revision 6105) +++ trunk/src_plugins/lib_gtk_common/ui_zoompan.c (revision 6106) @@ -341,8 +341,8 @@ pcb_layergrp_id_t active_group = pcb_layer_get_group(pcb_layer_stack[0]); pcb_layergrp_id_t comp_group = pcb_layer_get_group(pcb_component_silk_layer); pcb_layergrp_id_t solder_group = pcb_layer_get_group(pcb_solder_silk_layer); - pcb_bool comp_on = LAYER_PTR(PCB->LayerGroups.Entries[comp_group][0])->On; - pcb_bool solder_on = LAYER_PTR(PCB->LayerGroups.Entries[solder_group][0])->On; + pcb_bool comp_on = LAYER_PTR(PCB->LayerGroups.grp[comp_group].lid[0])->On; + pcb_bool solder_on = LAYER_PTR(PCB->LayerGroups.grp[solder_group].lid[0])->On; pcb_draw_inhibit_inc(); if (argc > 0) { @@ -371,8 +371,8 @@ if ((active_group == comp_group && comp_on && !solder_on) || (active_group == solder_group && solder_on && !comp_on)) { pcb_bool new_solder_vis = conf_core.editor.show_solder_side; - pcb_layervis_change_group_vis(PCB->LayerGroups.Entries[comp_group][0], !new_solder_vis, !new_solder_vis); - pcb_layervis_change_group_vis(PCB->LayerGroups.Entries[solder_group][0], new_solder_vis, new_solder_vis); + pcb_layervis_change_group_vis(PCB->LayerGroups.grp[comp_group].lid[0], !new_solder_vis, !new_solder_vis); + pcb_layervis_change_group_vis(PCB->LayerGroups.grp[solder_group].lid[0], new_solder_vis, new_solder_vis); } pcb_draw_inhibit_dec();