Index: simulation/index.html
===================================================================
--- simulation/index.html	(revision 7866)
+++ simulation/index.html	(revision 7867)
@@ -18,13 +18,13 @@
 	<li> gnucap: independent implementation; may run faster than ngspice;
 	     no mixed analog/digital support in sch-rnd.
 	<li> xyce: TODO
-<ul>
+</ul>
 <p>
 At the moment <b>sch-rnd recommends using ngspice</b> because that implementation
 has the most complete support and is the most well-tested with sch-rnd.
 
 
-<h2> Two levels of simulation </h1>
+<h2> Two levels of simulation </h2>
 <p>
 Sch-rnd is designed to allow single schematics to be used for different
 workflows, e.g. both spice simulation and PCB layout. There are various
@@ -32,13 +32,13 @@
 <p>
 The low level of simulation are:
 <ul>
-	<li> The <b>raw spice</b> approach <a href="raw/">(tutorial)</a>;
+	<li> The <b>raw spice</b> approach;
 	     this assumes the user speaks spice and wants to run the simulator
 	     by hand, outside of sch-rnd (e.g. from a shell or Makefile). When
 	     using this method, the schematics will likely end up with spice
 	     commands and parameters that depend on a spice implementation.
 	     That is, "this sheet is for ngspice" or "this sheet is for gnucap".
-	<li> The more generic <b>simulation</b> approach <a href="sim/">(tutorial)</a>,
+	<li> The more generic <b>simulation</b> approach,
 	     which introduces a higher abstraction layer over spice. The advantages
 	     are that the user does not need to know as much about spice, the
 	     same sheet can be used with different spice implementations and
@@ -53,3 +53,72 @@
 For new users the recommendation is: unless you already have a lot of
 experience with spice, it is better to go for the <b>simulation</b> approach.
 
+<h2> Tutorial </h2>
+<p>
+The tutorial is a system of smallish examples. Each new example adds something
+and assumes previous examples are understood.
+<p>
+<table border=1 cellspacing=0>
+<tr>
+	<th> title
+	<th> raw ngspice
+	<th> raw gnucap
+	<th> raw xyce
+	<th> high level sim
+	<th> concepts
+
+<tr>
+	<td> 01_dc
+	<td> <a href="raw/01_dc.html"> yes </a>
+	<td> <a href="raw/01_dc.html"> yes </a>
+	<td> TODO
+	<td> TODO
+	<td>      sch-rnd: sheet setup
+	     <br> sim: dc operating point
+
+<tr>
+	<td> 04_passive_tr
+	<td> <a href="raw/04_passive_tr.html"> yes </a>
+	<td> <a href="raw/04_passive_tr.html"> yes </a>
+	<td> TODO
+	<td> TODO
+	<td> sim: transient (time domain) analysis, voltage source (pulsed)
+
+
+<tr>
+	<td> 06_passive_ac
+	<td> <a href="raw/06_passive_ac.html"> yes </a>
+	<td> <a href="raw/06_passive_ac.html"> yes </a>
+	<td> TODO
+	<td> TODO
+	<td> sim: ac (frequency domain) analysis
+
+
+<tr>
+	<td> 10_bjt_amp_tr
+	<td> <a href="raw/10_bjt_amp_tr.html"> yes </a>
+	<td> <a href="raw/10_bjt_amp_tr.html"> yes </a>
+	<td> TODO
+	<td> TODO
+	<td>      sch-rnd: spice model, spice pinout
+	     <br> sim: time domain sim and SINE() source
+
+<tr>
+	<td> 12_bjt_amp_ac
+	<td> <a href="raw/12_bjt_amp_ac.html"> yes </a>
+	<td> <a href="raw/12_bjt_amp_ac.html"> error </a>
+	<td> TODO
+	<td> TODO
+	<td>      sch-rnd: spice pinout with portmap
+	     <br> sim: ac analysis
+
+
+<tr>
+	<td> 16_opamp_dc
+	<td> <a href="raw/16_opamp_dc.html"> yes </a>
+	<td> <a href="raw/16_opamp_dc.html"> error </a>
+	<td> TODO
+	<td> TODO
+	<td> sim: dc sweep
+
+</table>