Index: layer_vis.c
===================================================================
--- layer_vis.c	(revision 8310)
+++ layer_vis.c	(revision 8311)
@@ -49,100 +49,6 @@
 } SavedStack;
 
 
-/* ----------------------------------------------------------------------
- * Given a string description of a layer stack, adjust the layer stack
- * to correspond.
-*/
-
-void pcb_layervis_parse_string(const char *layer_string)
-{
-	static int listed_layers = 0;
-	int l = strlen(layer_string);
-	char **args;
-	int i, argn, lno;
-	int prev_sep = 1;
-	char *s;
-
-	s = pcb_strdup(layer_string);
-	args = (char **) malloc(l * sizeof(char *));
-	argn = 0;
-
-	for (i = 0; i < l; i++) {
-		switch (s[i]) {
-		case ' ':
-		case '\t':
-		case ',':
-		case ';':
-		case ':':
-			prev_sep = 1;
-			s[i] = '\0';
-			break;
-		default:
-			if (prev_sep)
-				args[argn++] = s + i;
-			prev_sep = 0;
-			break;
-		}
-	}
-
-	for (i = 0; i < pcb_max_layer; i++) {
-		if (!(pcb_layer_flags(i) & PCB_LYT_SILK))
-			pcb_layer_stack[i] = i;
-		PCB->Data->Layer[i].On = pcb_false;
-	}
-	PCB->ElementOn = pcb_false;
-	PCB->InvisibleObjectsOn = pcb_false;
-	PCB->PinOn = pcb_false;
-	PCB->ViaOn = pcb_false;
-	PCB->RatOn = pcb_false;
-
-	conf_set_editor(show_mask, 0);
-	conf_set_editor(show_paste, 0);
-	conf_set_editor(show_solder_side, 0);
-
-	for (i = argn - 1; i >= 0; i--) {
-		if (pcb_strcasecmp(args[i], "rats") == 0)
-			PCB->RatOn = pcb_true;
-		else if (pcb_strcasecmp(args[i], "invisible") == 0)
-			PCB->InvisibleObjectsOn = pcb_true;
-		else if (pcb_strcasecmp(args[i], "pins") == 0)
-			PCB->PinOn = pcb_true;
-		else if (pcb_strcasecmp(args[i], "vias") == 0)
-			PCB->ViaOn = pcb_true;
-		else if (pcb_strcasecmp(args[i], "elements") == 0 || pcb_strcasecmp(args[i], "silk") == 0)
-			PCB->ElementOn = pcb_true;
-		else if (pcb_strcasecmp(args[i], "mask") == 0)
-			conf_set_editor(show_mask, 1);
-		else if (pcb_strcasecmp(args[i], "paste") == 0)
-			conf_set_editor(show_paste, 1);
-		else if (pcb_strcasecmp(args[i], "solderside") == 0)
-			conf_set_editor(show_solder_side, 1);
-		else if (isdigit((int) args[i][0])) {
-			lno = atoi(args[i]);
-			pcb_layervis_change_group_vis(lno, pcb_true, pcb_true);
-		}
-		else {
-			int found = 0;
-			for (lno = 0; lno < pcb_max_layer; lno++)
-				if (pcb_strcasecmp(args[i], PCB->Data->Layer[lno].Name) == 0) {
-					pcb_layervis_change_group_vis(lno, pcb_true, pcb_true);
-					found = 1;
-					break;
-				}
-			if (!found) {
-				fprintf(stderr, "Warning: layer \"%s\" not known\n", args[i]);
-				if (!listed_layers) {
-					fprintf(stderr, "Named layers in this board are:\n");
-					listed_layers = 1;
-					for (lno = 0; lno < pcb_max_layer; lno++)
-						fprintf(stderr, "\t%s\n", PCB->Data->Layer[lno].Name);
-					fprintf(stderr, "Also: component, solder, rats, invisible, pins, vias, elements or silk, mask, solderside.\n");
-				}
-			}
-		}
-	}
-}
-
 /* ---------------------------------------------------------------------------
  * move layer (number is passed in) to top of layerstack
  */