Index: trunk/doc/tutorial/simulation/sim/10_bjt_amp_tr/10_bjt_amp_tr.svg =================================================================== --- trunk/doc/tutorial/simulation/sim/10_bjt_amp_tr/10_bjt_amp_tr.svg (nonexistent) +++ trunk/doc/tutorial/simulation/sim/10_bjt_amp_tr/10_bjt_amp_tr.svg (revision 8805) @@ -0,0 +1,933 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Index: trunk/doc/tutorial/simulation/sim/10_bjt_amp_tr/index.html =================================================================== --- trunk/doc/tutorial/simulation/sim/10_bjt_amp_tr/index.html (nonexistent) +++ trunk/doc/tutorial/simulation/sim/10_bjt_amp_tr/index.html (revision 8805) @@ -0,0 +1,106 @@ + + +

10_bjt_amp_tr: model from the library

+ +

Scope

+

+In this simulation we are going to look at a single-transistor amplifier +in the time domain to verify how it amplifies a sine wave. + +

The schematics

+

+The single-sheet schematic contains the amplifier without simulation-specific +extra symbols. +

+

+ +
Click the image to get the sch-rnd sheet; also requires this project.lht in the same directory
+

+ +

How to specify the model

+

+In the previous examples all components used were ideal: simple +resistors and capacitors, without any special characteristics +or side effects. More complex components such as transistors typically +have a large set of parameters that differ by device type. Spice addresses +this by using models. +

+A model in spice is really two things: +

+

+The first of these, the code, is typically provided as part of the simulator software, +at least for the most common, basic component types. The second of these, the set of +model parameters, is specified by the user (normally acquired from the device +vendor or derived from the datasheet or actual measurements). +

+In sch-rnd these models are kept in the spice library, which is very much like +the symbol or devmap library: a directory tree that holds spice models, +one model per file, with models identified by file name. Spice export files +are self-contained and do not rely on external model files. This is achieved +by sch-rnd copying the content of these spice model files from the library +into the output file. +

+Furthermore there's a sheet-local library, just like with devmap (and +optionally with symbols), so that any spice model used by the sheet is +also saved within the sheet, keeping the sheet self-contained and portable. + +

Preparing for simulation

+ +

Q1

+

+This is the usual npn symbol from the stock symbol library shipped with +sch-rnd. The devmap has been set to bc817_sot23 so that the sheet can also +be used in a PCB workflow with a sot23 footprint as well. +

+The spice-specific aspects are the model and the spice pinout. The model +is specified using the spice/model attribute, with value bc817. +There is a file in the spice model library shipped with sch-rnd called +bc817.prm. The pinout is set by the spice/pinnum terminal attributes. +For the BJT spice model the pinout is always the same, so the stock +library symbol has this attribute hardwired in terminals with a low priority +(so that it can be overridden by other mechanisms). +

+The devmap file could contain the symbol's spice/model and portmap to set +spice/pinnum for each terminal, but this is not a good idea because there may be +different spice models for different complexities of simulation. Simple models, +like bc817.prm, concentrate only on the core of the functionality, while +more complex models implemented as "subcircuits" (subckt in spice slang) may +add parasitic effects, such as pin inductances and pin/package +related stray capacitances. Such complex models run slower, but may be +more accurate in some cases, while the simpler model would cover most of the +normal use cases. The user needs to decide which model to use for the given +circuit or even the given simulation; accordingly, this should not be defined +in the devmap. +

+Specifying the spice pinout from the devmap is unnecessary if both the model +and the symbol use the standard spice BJT pinout that matches the model code +in spice. However, for subcircuit models the pinout may differ, and sch-rnd +offers multiple mechanisms +to deal with different spice pinouts. +

+The simulation setup process is largely the same as in the +base example of dc op point. The simulation +setup in this example is called "ac trans". + +

Modifications

+

+This circuit needs two voltage sources, which are both added as modifications. +The first one is a DC 5V source connected to net Vcc (and GND). The second +source is connected to the input (and GND) and specifies an 1 kHz small signal +(0.01V) sine wave. + +

Sim setup: output config

+

+Output config is very similar to +the trans analysis of simpler circuit of an earlier example. Once ran, +it produces a long plot. Because of the large amplification factor, the +input (green) trace is visible only when zoomed in. +

+

+ +
Simulation setup dialog, third tab, after execution
+

+ Index: trunk/doc/tutorial/simulation/sim/10_bjt_amp_tr/sim_run.png =================================================================== Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream Index: trunk/doc/tutorial/simulation/sim/10_bjt_amp_tr/sim_run.png =================================================================== --- trunk/doc/tutorial/simulation/sim/10_bjt_amp_tr/sim_run.png (nonexistent) +++ trunk/doc/tutorial/simulation/sim/10_bjt_amp_tr/sim_run.png (revision 8805) Property changes on: trunk/doc/tutorial/simulation/sim/10_bjt_amp_tr/sim_run.png ___________________________________________________________________ Added: svn:mime-type ## -0,0 +1 ## +application/octet-stream \ No newline at end of property