Index: trunk/doc/user/06_features/simulation/index.html =================================================================== --- trunk/doc/user/06_features/simulation/index.html (revision 8840) +++ trunk/doc/user/06_features/simulation/index.html (revision 8841) @@ -182,11 +182,43 @@ expect to work (std_cschem for things like the connect attribute, std_devmap for the devmap and portmap mechanisms). -

Low level simulation

+

Low level (raw) simulation

-TODO +The low level, raw, simulation mechanism is used to enable an sch-rnd project +to export to circuit simulation, e.g. spice. The high level simulation is +built on top of the low level. +

+The low level simulation consists of: +

+

+The normal workflow is: +

+

+The extra symbols drawn for spice simulation may interfere with other workflows, +e.g. if the same project is used as a soruce for a PCB workflow. There are +multiple mechanisms to deal with this: +

-

Test benching

+

Test benching

The test bench mechanism is responsible for selecting parts of the circuit for simulation. Test benching operatos on project level. It is implemented