Index: write.c
===================================================================
--- write.c	(revision 9098)
+++ write.c	(revision 9099)
@@ -561,10 +561,10 @@
 	pcb_cardinal_t currentLayer = number;
 
 	/* write information about non empty layers */
-	if (!pcb_layer_is_empty_(PCB, layer) || (layer->Name && *layer->Name)) {
+	if (!pcb_layer_is_empty_(PCB, layer) || (layer->meta.real.name && *layer->meta.real.name)) {
 		/*
 			fprintf(FP, "Layer(%i ", (int) Number + 1);
-			pcb_print_quoted_string(FP, (char *) PCB_EMPTY(layer->Name));
+			pcb_print_quoted_string(FP, (char *) PCB_EMPTY(layer->meta.real.name));
 			fputs(")\n(\n", FP);
 			WriteAttributeList(FP, &layer->Attributes, "\t");
 		*/
@@ -605,10 +605,10 @@
 	int copperStartY; /* used for mapping geda copper arcs onto kicad copper lines */
 
 	/* write information about non empty layers */
-	if (!pcb_layer_is_empty_(PCB, layer) || (layer->Name && *layer->Name)) {
+	if (!pcb_layer_is_empty_(PCB, layer) || (layer->meta.real.name && *layer->meta.real.name)) {
 		/*
 			fprintf(FP, "Layer(%i ", (int) Number + 1);
-			pcb_print_quoted_string(FP, (char *) PCB_EMPTY(layer->Name));
+			pcb_print_quoted_string(FP, (char *) PCB_EMPTY(layer->meta.real.name));
 			fputs(")\n(\n", FP);
 			WriteAttributeList(FP, &layer->Attributes, "\t");
 		*/
@@ -683,10 +683,10 @@
 	pcb_cardinal_t currentLayer = number;
 
 	/* write information about non empty layers */
-	if (!pcb_layer_is_empty_(PCB, layer) || (layer->Name && *layer->Name)) {
+	if (!pcb_layer_is_empty_(PCB, layer) || (layer->meta.real.name && *layer->meta.real.name)) {
 		/*
 			fprintf(FP, "Layer(%i ", (int) Number + 1);
-			pcb_print_quoted_string(FP, (char *) PCB_EMPTY(layer->Name));
+			pcb_print_quoted_string(FP, (char *) PCB_EMPTY(layer->meta.real.name));
 			fputs(")\n(\n", FP);
 			WriteAttributeList(FP, &layer->Attributes, "\t");
 		*/
@@ -1213,7 +1213,7 @@
 	pcb_cardinal_t currentLayer = number;
 
 	/* write information about non empty layers */
-	if (!pcb_layer_is_empty_(PCB, layer) || (layer->Name && *layer->Name)) {
+	if (!pcb_layer_is_empty_(PCB, layer) || (layer->meta.real.name && *layer->meta.real.name)) {
 		int localFlag = 0;
 		polylist_foreach(&layer->Polygon, &it, polygon) {
 			if (polygon->HoleIndexN == 0) { /* no holes defined within polygon, which we implement support for first */