Index: work/alien_formats/eagle/eagle_bin/test_parser/eagle_bin.c
===================================================================
--- work/alien_formats/eagle/eagle_bin/test_parser/eagle_bin.c	(revision 9388)
+++ work/alien_formats/eagle/eagle_bin/test_parser/eagle_bin.c	(revision 9389)
@@ -19,8 +19,8 @@
 } pcb_eagle_type_t;
 
 typedef enum {
-	SS_DIRECT,     /* it specifies the number of direct children */
-	SS_RECURSIVE   /* it specifies the number of all children, recursively */
+	SS_DIRECT,  /* it specifies the number of direct children */
+	SS_RECURSIVE/* it specifies the number of all children, recursively */
 } pcb_eagle_ss_type_t;
 
 
@@ -44,11 +44,11 @@
 } attrs_t;
 
 typedef struct {
-	unsigned char cmd;   /* rule matches only if block[0] == cmd */
+	unsigned char cmd;/* rule matches only if block[0] == cmd */
 	char *name;
 	fmatch_t fmatch[4];  /* rule matches only if all fmatch integer fields match their val */
-	subsect_t subs[8];   /* how to extract number of subsections (direct children) */
-	attrs_t attrs[32];   /* how to extract node attributes */
+	subsect_t subs[8];/* how to extract number of subsections (direct children) */
+	attrs_t attrs[32];/* how to extract node attributes */
 } pcb_eagle_script_t;
 
 #define TERM {0}
@@ -88,10 +88,10 @@
 		{ /* attributes */
 			{"display", T_BMB, 2, 0x01},
 			{"visible", T_BMB, 2, 0x02},
-			{"unit",    T_UBF, 3, BITFIELD(1, 0, 3)},
+			{"unit", T_UBF, 3, BITFIELD(1, 0, 3)},
 			{"altunit", T_UBF, 3, BITFIELD(1, 4, 7)},
 			{"multiple",T_INT, 4, 3},
-			{"size",    T_DBL, 8, 8},
+			{"size", T_DBL, 8, 8},
 			{"altsize", T_DBL, 16, 8},
 			TERM
 		},
@@ -107,11 +107,11 @@
 			{"side", T_BMB, 2, 0x10},
 			{"visible", T_UBF, 2, BITFIELD(1, 2, 3)},
 			{"available", T_BMB, 2, 0x02},
-			{"layer",   T_INT, 3, 1},
-			{"other",   T_INT, 4, 1},
-			{"fill",    T_UBF, 5, BITFIELD(1, 0, 3)},
-			{"color",   T_UBF, 6, BITFIELD(1, 0, 5)},
-			{"name",    T_STR, 15, 9},
+			{"layer",T_INT, 3, 1},
+			{"other",T_INT, 4, 1},
+			{"fill", T_UBF, 5, BITFIELD(1, 0, 3)},
+			{"color",T_UBF, 6, BITFIELD(1, 0, 5)},
+			{"name", T_STR, 15, 9},
 			TERM
 		},
 	},
@@ -609,7 +609,7 @@
 			TERM
 		},
 	},
-	{ PCB_EGKW_SECT_TEXT, "textbasesection",  /* not much known */
+	{ PCB_EGKW_SECT_TEXT, "textbasesection",  /* basic text block */
 		{ /* field match */
 			TERM
 		},
@@ -633,9 +633,78 @@
 			TERM
 		},
 	},
-	{ PCB_EGKW_SECT_NETBUSLABEL },  /* not much known */
-	{ PCB_EGKW_SECT_SMASHEDNAME },  /* not much known */
-	{ PCB_EGKW_SECT_SMASHEDVALUE },  /* not much known */
+	{ PCB_EGKW_SECT_NETBUSLABEL, "netbuslabel",  /* text base section equiv. */
+		{ /* field match */
+			TERM
+		},
+		{ /* subsection sizes */
+			TERM
+		},
+		{ /* attributes */
+			{"layer", T_INT, 3, 1},
+			{"x",  T_INT, 4, 4},
+			{"y",  T_INT, 8, 4},
+			{"size",  T_INT, 12, 2},
+			{"ratio", T_UBF, 14, BITFIELD(2, 2, 6)},
+			/*self._get_uint8_mask(14, 0x7c) >> 2 },*/
+			{"angle" , T_UBF, 16, BITFIELD(2, 0, 11)},
+			/*self._get_uint16_mask(16, 0x0fff)*/
+			{"mirrored" , T_UBF, 16, BITFIELD(2, 12, 12)},
+			/*bool(self._get_uint16_mask(16, 0x1000))*/
+			{"spin" , T_UBF, 16, BITFIELD(2, 14, 14)},
+			/*bool(self._get_uint16_mask(16, 0x4000))*/
+			{"textfield",  T_STR, 18, 5},
+			TERM
+		},
+	},
+	{ PCB_EGKW_SECT_SMASHEDNAME, "smashedname", /* text base section equiv. */
+		{ /* field match */
+			TERM
+		},
+		{ /* subsection sizes */
+			TERM
+		},
+		{ /* attributes */
+			{"layer", T_INT, 3, 1},
+			{"x",  T_INT, 4, 4},
+			{"y",  T_INT, 8, 4},
+			{"size",  T_INT, 12, 2},
+			{"ratio", T_UBF, 14, BITFIELD(2, 2, 6)},
+			/*self._get_uint8_mask(14, 0x7c) >> 2 },*/
+			{"angle" , T_UBF, 16, BITFIELD(2, 0, 11)},
+			/*self._get_uint16_mask(16, 0x0fff)*/
+			{"mirrored" , T_UBF, 16, BITFIELD(2, 12, 12)},
+			/*bool(self._get_uint16_mask(16, 0x1000))*/
+			{"spin" , T_UBF, 16, BITFIELD(2, 14, 14)},
+			/*bool(self._get_uint16_mask(16, 0x4000))*/
+			{"textfield",  T_STR, 18, 5},
+			TERM
+		},
+	},
+	{ PCB_EGKW_SECT_SMASHEDVALUE, "smashedvalue",  /* text base section equiv. */
+		{ /* field match */
+			TERM
+		},
+		{ /* subsection sizes */
+			TERM
+		},
+		{ /* attributes */
+			{"layer", T_INT, 3, 1},
+			{"x",  T_INT, 4, 4},
+			{"y",  T_INT, 8, 4},
+			{"size",  T_INT, 12, 2},
+			{"ratio", T_UBF, 14, BITFIELD(2, 2, 6)},
+			/*self._get_uint8_mask(14, 0x7c) >> 2 },*/
+			{"angle" , T_UBF, 16, BITFIELD(2, 0, 11)},
+			/*self._get_uint16_mask(16, 0x0fff)*/
+			{"mirrored" , T_UBF, 16, BITFIELD(2, 12, 12)},
+			/*bool(self._get_uint16_mask(16, 0x1000))*/
+			{"spin" , T_UBF, 16, BITFIELD(2, 14, 14)},
+			/*bool(self._get_uint16_mask(16, 0x4000))*/
+			{"textfield",  T_STR, 18, 5},
+			TERM
+		},
+	},
 	{ PCB_EGKW_SECT_PACKAGEVARIANT },
 	{ PCB_EGKW_SECT_DEVICE },
 	{ PCB_EGKW_SECT_PART },
@@ -833,11 +902,11 @@
 	}
 	/*for (index = 0; index < DRC_length_used; index++) {
 	  printf("DRC_block index: %d and value %d\n", index, DRC_block[index]);
-	  } */
+	} */
 
 	/* first ~134 bytes contain the most useful DRC stuff, such as
 	# wire2wire wire2pad wire2via pad2pad pad2via via2via pad2smd via2smd smd2smd
-	self.clearances, data = _cut('<9I', data, 36)   i.e. 9 integers, 4 bytes each
+	self.clearances, data = _cut('<9I', data, 36)i.e. 9 integers, 4 bytes each
 	# restring order: padtop padinner padbottom viaouter viainner
 	(microviaouter microviainner)
 	restring_percentages = 7 doubles, 56 bytes total */