Index: eagle_bin/test_parser/eagle_bin.c =================================================================== --- eagle_bin/test_parser/eagle_bin.c (revision 9551) +++ eagle_bin/test_parser/eagle_bin.c (revision 9552) @@ -121,7 +121,7 @@ TERM }, }, - { PCB_EGKW_LAYERS, 0xFFFF, "layers", + { PCB_EGKW_SECT_LAYERS, 0xFFFF, "layers", { /* field match */ TERM }, @@ -140,7 +140,7 @@ TERM }, }, - { PCB_EGKW_ALT_LAYERS, 0xFFFF, "alt_layers", + { PCB_EGKW_SECT_ALT_LAYERS, 0xFFFF, "alt_layers", { /* field match */ TERM }, @@ -174,7 +174,7 @@ TERM }, }, - { PCB_EGKW_LIBRARY, 0xFFFF, "library", + { PCB_EGKW_SECT_LIBRARY, 0xFFFF, "library", { /* field match */ TERM }, @@ -218,7 +218,7 @@ TERM }, }, - { PCB_EGKW_PACKAGES, 0xFFFF, "packages", + { PCB_EGKW_SECT_PACKAGES, 0xFFFF, "packages", { /* field match */ TERM }, @@ -234,7 +234,7 @@ TERM }, }, - { PCB_EGKW_ALT_PACKAGES, 0xFFFF, "alt_packages", + { PCB_EGKW_SECT_ALT_PACKAGES, 0xFFFF, "alt_packages", { /* field match */ TERM }, @@ -250,7 +250,7 @@ TERM }, }, - { PCB_EGKW_ALT_ALT_PACKAGES, 0xFFFF, "alt_alt_packages", + { PCB_EGKW_SECT_ALT_ALT_PACKAGES, 0xFFFF, "alt_alt_packages", { /* field match */ TERM }, @@ -285,7 +285,7 @@ TERM }, }, - { PCB_EGKW_BOARD, 0xFFFF, "board", + { PCB_EGKW_SECT_BOARD, 0xFFFF, "board", { /* field match */ TERM }, @@ -307,7 +307,7 @@ TERM }, }, - { PCB_EGKW_ALT_BOARD, 0xFFFF, "alt_board", + { PCB_EGKW_SECT_ALT_BOARD, 0xFFFF, "alt_board", { /* field match */ TERM }, @@ -329,7 +329,7 @@ TERM }, }, - { PCB_EGKW_ALT_ALT_BOARD, 0xFFFF, "alt_alt_board", + { PCB_EGKW_SECT_ALT_ALT_BOARD, 0xFFFF, "alt_alt_board", { /* field match */ TERM }, @@ -351,7 +351,7 @@ TERM }, }, - { PCB_EGKW_ALT_ALT_ALT_BOARD, 0xFFFF, "alt_alt_alt_board", + { PCB_EGKW_SECT_ALT_ALT_ALT_BOARD, 0xFFFF, "alt_alt_alt_board", { /* field match */ TERM }, @@ -373,7 +373,7 @@ TERM }, }, - { PCB_EGKW_SIGNAL, 0xFFFF, "signal", + { PCB_EGKW_SECT_SIGNAL, 0xFFFF, "signal", { /* field match */ TERM }, @@ -392,7 +392,7 @@ TERM }, }, - { PCB_EGKW_ALT_SIGNAL, 0xFFFF, "alt_signal", + { PCB_EGKW_SECT_ALT_SIGNAL, 0xFFFF, "alt_signal", { /* field match */ TERM }, @@ -411,7 +411,7 @@ TERM }, }, - { PCB_EGKW_ALT_ALT_SIGNAL, 0xFFFF, "alt_alt_signal", + { PCB_EGKW_SECT_ALT_ALT_SIGNAL, 0xFFFF, "alt_alt_signal", { /* field match */ TERM }, @@ -430,7 +430,7 @@ TERM }, }, - { PCB_EGKW_ALT_ALT_ALT_SIGNAL, 0xFFFF, "alt_alt_alt_signal", + { PCB_EGKW_SECT_ALT_ALT_ALT_SIGNAL, 0xFFFF, "alt_alt_alt_signal", { /* field match */ TERM }, @@ -449,7 +449,7 @@ TERM }, }, - { PCB_EGKW_ALT_ALT_ALT_ALT_SIGNAL, 0xFFFF, "alt_alt_alt_alt_signal", + { PCB_EGKW_SECT_ALT_ALT_ALT_ALT_SIGNAL, 0xFFFF, "alt_alt_alt_alt_signal", { /* field match */ TERM }, @@ -485,7 +485,7 @@ TERM }, }, - { PCB_EGKW_PACKAGE, 0xFFFF, "package", + { PCB_EGKW_SECT_PACKAGE, 0xFFFF, "package", { /* field match */ TERM }, @@ -503,7 +503,7 @@ TERM }, }, - { PCB_EGKW_ALT_PACKAGE, 0xFFFF, "alt_package", + { PCB_EGKW_SECT_ALT_PACKAGE, 0xFFFF, "alt_package", { /* field match */ TERM }, @@ -555,7 +555,7 @@ TERM }, }, - { PCB_EGKW_POLYGON, 0xFFFF, "polygon", + { PCB_EGKW_SECT_POLYGON, 0xFFFF, "polygon", { /* field match */ TERM }, @@ -579,7 +579,7 @@ TERM }, }, - { PCB_EGKW_ALT_POLYGON, 0xFFFF, "alt_polygon", + { PCB_EGKW_SECT_ALT_POLYGON, 0xFFFF, "alt_polygon", { /* field match */ TERM }, @@ -846,7 +846,7 @@ TERM }, }, - { PCB_EGKW_CIRCLE, 0xFFFF, "circle", + { PCB_EGKW_SECT_CIRCLE, 0xFFFF, "circle", { /* field match */ TERM }, @@ -862,7 +862,7 @@ TERM }, }, - { PCB_EGKW_ALT_CIRCLE, 0xFFFF, "alt_circle", + { PCB_EGKW_SECT_ALT_CIRCLE, 0xFFFF, "alt_circle", { /* field match */ TERM }, @@ -878,7 +878,7 @@ TERM }, }, - { ALT_ALT_CIRCLE, 0xFFFF, "alt_alt_circle", + { PCB_EGKW_SECT_ALT_ALT_CIRCLE, 0xFFFF, "alt_alt_circle", { /* field match */ TERM }, @@ -894,7 +894,7 @@ TERM }, }, - { RECTANGLE, 0xFFFF, "rectangle", + { PCB_EGKW_SECT_RECTANGLE, 0xFFFF, "rectangle", { /* field match */ TERM }, @@ -911,7 +911,7 @@ TERM }, }, - { ALT_RECTANGLE, 0xFFFF, "alt_rectangle", + { PCB_EGKW_SECT_ALT_RECTANGLE, 0xFFFF, "alt_rectangle", { /* field match */ TERM }, @@ -928,7 +928,7 @@ TERM }, }, - { ALT_ALT_RECTANGLE, 0xFFFF, "alt_alt_rectangle", + { PCB_EGKW_SECT_ALT_ALT_RECTANGLE, 0xFFFF, "alt_alt_rectangle", { /* field match */ TERM }, @@ -960,7 +960,7 @@ TERM }, }, - { HOLE, 0xFFFF, "hole", + { PCB_EGKW_SECT_HOLE, 0xFFFF, "hole", { /* field match */ TERM }, @@ -974,7 +974,7 @@ TERM }, }, - { ALT_HOLE, 0xFFFF, "alt_hole", + { PCB_EGKW_SECT_ALT_HOLE, 0xFFFF, "alt_hole", { /* field match */ TERM }, @@ -988,7 +988,7 @@ TERM }, }, - { ALT_ALT_HOLE, 0xFFFF, "alt_alt_hole", + { PCB_EGKW_SECT_ALT_ALT_HOLE, 0xFFFF, "alt_alt_hole", { /* field match */ TERM }, @@ -1002,7 +1002,7 @@ TERM }, }, - { VIA, 0xFFFF, "via", + { PCB_EGKW_SECT_VIA, 0xFFFF, "via", { /* field match */ TERM }, @@ -1020,7 +1020,7 @@ TERM }, }, - { ALT_VIA, 0xFFFF, "alt_via", + { PCB_EGKW_SECT_ALT_VIA, 0xFFFF, "alt_via", { /* field match */ TERM }, @@ -1038,7 +1038,7 @@ TERM }, }, - { PAD, 0xFFFF, "pad", + { PCB_EGKW_SECT_PAD, 0xFFFF, "pad", { /* field match */ TERM }, @@ -1059,7 +1059,7 @@ TERM }, }, - { ALT_PAD, 0xFFFF, "alt_pad", + { PCB_EGKW_SECT_ALT_PAD, 0xFFFF, "alt_pad", { /* field match */ TERM }, @@ -1080,7 +1080,7 @@ TERM }, }, - { ALT_ALT_PAD, 0xFFFF, "alt_alt_pad", + { PCB_EGKW_SECT_ALT_ALT_PAD, 0xFFFF, "alt_alt_pad", { /* field match */ TERM }, @@ -1101,7 +1101,7 @@ TERM }, }, - { SMD, 0xFFFF, "smd", + { PCB_EGKW_SECT_SMD, 0xFFFF, "smd", { /* field match */ TERM }, @@ -1124,7 +1124,7 @@ TERM }, }, - { ALT_SMD, 0xFFFF, "alt_smd", + { PCB_EGKW_SECT_ALT_SMD, 0xFFFF, "alt_smd", { /* field match */ TERM }, @@ -1204,7 +1204,7 @@ TERM }, }, - { ALT_PACKAGE, 0xFFFF, "alt_package", + { PCB_EGKW_SECT_ALT_PACKAGE, 0xFFFF, "alt_package", { /* field match */ TERM }, @@ -1223,7 +1223,7 @@ TERM }, }, - { ALT_ALT_PACKAGE, 0xFFFF, "alt_alt_package", + { PCB_EGKW_SECT_ALT_ALT_PACKAGE, 0xFFFF, "alt_alt_package", { /* field match */ TERM }, @@ -1242,7 +1242,7 @@ TERM }, }, - { ALT_ALT_ALT_PACKAGE, 0xFFFF, "alt_alt_alt_package", + { PCB_EGKW_SECT_ALT_ALT_ALT_PACKAGE, 0xFFFF, "alt_alt_alt_package", { /* field match */ TERM }, @@ -1261,7 +1261,7 @@ TERM }, }, - { ALT_ALT_ALT_ALT_PACKAGE, 0xFFFF, "alt_alt_alt_alt_package", + { PCB_EGKW_SECT_ALT_ALT_ALT_ALT_PACKAGE, 0xFFFF, "alt_alt_alt_alt_package", { /* field match */ TERM }, @@ -1280,7 +1280,7 @@ TERM }, }, - { PACKAGE2, 0xFFFF, "package2", + { PCB_EGKW_SECT_PACKAGE2, 0xFFFF, "package2", { /* field match */ TERM }, @@ -1293,7 +1293,7 @@ TERM }, }, - { ALT_PACKAGE2, 0xFFFF, "alt_package2", + { PCB_EGKW_SECT_ALT_PACKAGE2, 0xFFFF, "alt_package2", { /* field match */ TERM }, @@ -1306,7 +1306,7 @@ TERM }, }, - { ALT_ALT_PACKAGE2, 0xFFFF, "alt_alt_package2", + { PCB_EGKW_SECT_ALT_ALT_PACKAGE2, 0xFFFF, "alt_alt_package2", { /* field match */ TERM }, @@ -1340,7 +1340,7 @@ TERM }, }, - { TEXT, 0xFFFF, "text", /* basic text block */ + { PCB_EGKW_SECT_TEXT, 0xFFFF, "text", /* basic text block */ { /* field match */ TERM }, @@ -1364,7 +1364,7 @@ TERM }, }, - { ALT_TEXT, 0xFFFF, "alt_text", /* basic text block */ + { PCB_EGKW_SECT_ALT_TEXT, 0xFFFF, "alt_text", /* basic text block */ { /* field match */ TERM }, @@ -1388,7 +1388,7 @@ TERM }, }, - { ALT_ALT_TEXT, 0xFFFF, "alt_alt_text", /* basic text block */ + { PCB_EGKW_SECT_ALT_ALT_TEXT, 0xFFFF, "alt_alt_text", /* basic text block */ { /* field match */ TERM }, @@ -1412,7 +1412,7 @@ TERM }, }, - { ALT_ALT_ALT_TEXT, 0xFFFF, "alt_alt_alt_text", /* basic text block */ + { PCB_EGKW_SECT_ALT_ALT_ALT_TEXT, 0xFFFF, "alt_alt_alt_text", /* basic text block */ { /* field match */ TERM }, @@ -1771,7 +1771,7 @@ TERM }, }, - { ATTRIBUTE, 0xFFFF, "attribute", /* same as text basesection */ + { PCB_EGKW_SECT_ATTRIBUTE, 0xFFFF, "attribute", /* same as text basesection */ { /* field match */ TERM }, @@ -1795,7 +1795,7 @@ TERM }, }, - { ALT_ATTRIBUTE, 0xFFFF, "alt_attribute", /* same as text basesection */ + { PCB_EGKW_SECT_ALT_ATTRIBUTE, 0xFFFF, "alt_attribute", /* same as text basesection */ { /* field match */ TERM },