Index: index.html
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Copper layer | Layer group with copper layers | designed with one to many pcb-rnd layers
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Component/Top copper layer | Layer group with copper layers | any group of copper layers defined as the 'top' of a board
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Solder/bottom copper layer | Layer group with copper layers | any group of copper layers defined as the 'bottom' of a board
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Substrate | Layer group marked as substrate, hosting no logical layers | pcb-rnd does not yet handle properties of phyiscal substrate information
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Substrate | Layer group marked as substrate, hosting no logical layers | pcb-rnd does not yet handle properties of physical substrate information
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Contour of the board | Outline layer | designed using standard pcb-rnd elemnts
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Outline routing path | Outline layer | designed using standard pcb-rnd elemnts
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Polygon pour | Polygon | an object available for design in any layer group
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Plane | Polygon | see above
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Mask (solder mask) | A layer group adjacent to the outside copper layer group | design layers available: automatic, additive, subtractive
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Silk | A layer group adjacent to the mask layer group | design layers available: automatic, additive, subtractive
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Mask (solder mask) | Layer group with implicit and potential explicit content | design layers available: automatic, additive, subtractive
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Silk | Layer group with implicit and potential explicit content | design layers available: automatic, additive, subtractive
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Paste (paste stencil) | Layer group with implicit and potential explicit content | design layers available: automatic, additive, subtractive
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N/A, or poss. net/circuit | Rats | assistive layer automatically generated with netlist and copper layer group connection data
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